{"id":2222273,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2222273/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-aspeed/patch/20260409-anacapa-devlop-phase-devicetree-v2-2-68f328671653@gmail.com/","project":{"id":57,"url":"http://patchwork.ozlabs.org/api/1.2/projects/57/?format=json","name":"Linux ASPEED SoC development","link_name":"linux-aspeed","list_id":"linux-aspeed.lists.ozlabs.org","list_email":"linux-aspeed@lists.ozlabs.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260409-anacapa-devlop-phase-devicetree-v2-2-68f328671653@gmail.com>","list_archive_url":null,"date":"2026-04-09T11:40:27","name":"[v2,2/3] ARM: dts: aspeed: anacapa: add EVT1 devicetree and point wrapper to it","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"65ca9870437ae17b2b8586adf0b04efe9152f5d5","submitter":{"id":92562,"url":"http://patchwork.ozlabs.org/api/1.2/people/92562/?format=json","name":"Colin Huang","email":"u8813345@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-aspeed/patch/20260409-anacapa-devlop-phase-devicetree-v2-2-68f328671653@gmail.com/mbox/","series":[{"id":499526,"url":"http://patchwork.ozlabs.org/api/1.2/series/499526/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-aspeed/list/?series=499526","date":"2026-04-09T11:40:28","name":"ARM: dts: aspeed: anacapa: restructure devicetree for development-phase","version":2,"mbox":"http://patchwork.ozlabs.org/series/499526/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2222273/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2222273/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-aspeed@lists.ozlabs.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=G/9T95zc;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org\n (client-ip=2404:9400:21b9:f100::1; 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charset=\"utf-8\"","Content-Transfer-Encoding":"7bit","Message-Id":"\n <20260409-anacapa-devlop-phase-devicetree-v2-2-68f328671653@gmail.com>","References":"\n <20260409-anacapa-devlop-phase-devicetree-v2-0-68f328671653@gmail.com>","In-Reply-To":"\n <20260409-anacapa-devlop-phase-devicetree-v2-0-68f328671653@gmail.com>","To":"Rob Herring , Krzysztof Kozlowski ,\n Conor Dooley , Joel Stanley ,\n Andrew Jeffery ","Cc":"devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org,\n colin.huang2@amd.com, Colin Huang ","X-Mailer":"b4 0.14.3","X-Developer-Signature":"v=1; a=ed25519-sha256; t=1775734833; l=46337;\n i=u8813345@gmail.com; s=20260202; h=from:subject:message-id;\n bh=vsiAwBhKGeIEL8aDpcAFGcbmD7z25k2Jihgu4HBgVOs=;\n b=S6teLBScBUlOqXoJHUV4ZTzLaw8u+Uj79lm4oaTTNSy9GLSGJ5vV8LkqB+Toqjx58cFY/alhr\n eSbJqspVFhiDo/TYyienYNiaFvIcp0HaJFDHBUdS2wPPEGki+ATIXBe","X-Developer-Key":"i=u8813345@gmail.com; a=ed25519;\n pk=Zlg0WqpCw4qbswOqamTBTXIchwR/3SnYZpy7rjaGMdQ=","X-Spam-Status":"No, score=0.1 required=5.0 tests=DKIM_SIGNED,DKIM_VALID,\n\tDKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_ENVFROM_END_DIGIT,FREEMAIL_FROM,\n\tRCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,WEIRD_QUOTING\n\tautolearn=disabled version=4.0.1","X-Spam-Checker-Version":"SpamAssassin 4.0.1 (2024-03-25) on lists.ozlabs.org"},"content":"This change introduces a development-phase devicetree for the\nFacebook Anacapa BMC EVT1 hardware revision and updates the Anacapa\nwrapper DTS to reference it.\n\nA dedicated EVT1 DTS is added for revision-specific hardware while\nkeeping a single, Anacapa entrypoint used by the build and deployment\nflow. The top-level aspeed-bmc-facebook-anacapa.dts\n\nSigned-off-by: Colin Huang \n---\n .../aspeed/aspeed-bmc-facebook-anacapa-evt1.dts | 1067 ++++++++++++++++++++\n .../dts/aspeed/aspeed-bmc-facebook-anacapa.dts | 1064 +------------------\n 2 files changed, 1068 insertions(+), 1063 deletions(-)","diff":"diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt1.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt1.dts\nnew file mode 100644\nindex 000000000000..81ad065e114c\n--- /dev/null\n+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt1.dts\n@@ -0,0 +1,1067 @@\n+// SPDX-License-Identifier: GPL-2.0-or-later\n+\n+/dts-v1/;\n+#include \"aspeed-g6.dtsi\"\n+#include \n+#include \n+\n+/ {\n+\tmodel = \"Facebook Anacapa BMC\";\n+\tcompatible = \"facebook,anacapa-bmc-evt1\", \"aspeed,ast2600\";\n+\n+\taliases {\n+\t\tserial0 = &uart1;\n+\t\tserial1 = &uart2;\n+\t\tserial2 = &uart3;\n+\t\tserial3 = &uart4;\n+\t\tserial4 = &uart5;\n+\t\ti2c16 = &i2c0mux0ch0;\n+\t\ti2c17 = &i2c0mux0ch1;\n+\t\ti2c18 = &i2c0mux0ch2;\n+\t\ti2c19 = &i2c0mux0ch3;\n+\t\ti2c20 = &i2c1mux0ch0;\n+\t\ti2c21 = &i2c1mux0ch1;\n+\t\ti2c22 = &i2c1mux0ch2;\n+\t\ti2c23 = &i2c1mux0ch3;\n+\t\ti2c24 = &i2c4mux0ch0;\n+\t\ti2c25 = &i2c4mux0ch1;\n+\t\ti2c26 = &i2c4mux0ch2;\n+\t\ti2c27 = &i2c4mux0ch3;\n+\t\ti2c28 = &i2c4mux0ch4;\n+\t\ti2c29 = &i2c4mux0ch5;\n+\t\ti2c30 = &i2c4mux0ch6;\n+\t\ti2c31 = &i2c4mux0ch7;\n+\t\ti2c32 = &i2c8mux0ch0;\n+\t\ti2c33 = &i2c8mux0ch1;\n+\t\ti2c34 = &i2c8mux0ch2;\n+\t\ti2c35 = &i2c8mux0ch3;\n+\t\ti2c36 = &i2c10mux0ch0;\n+\t\ti2c37 = &i2c10mux0ch1;\n+\t\ti2c38 = &i2c10mux0ch2;\n+\t\ti2c39 = &i2c10mux0ch3;\n+\t\ti2c40 = &i2c10mux0ch4;\n+\t\ti2c41 = &i2c10mux0ch5;\n+\t\ti2c42 = &i2c10mux0ch6;\n+\t\ti2c43 = &i2c10mux0ch7;\n+\t\ti2c44 = &i2c11mux0ch0;\n+\t\ti2c45 = &i2c11mux0ch1;\n+\t\ti2c46 = &i2c11mux0ch2;\n+\t\ti2c47 = &i2c11mux0ch3;\n+\t\ti2c48 = &i2c11mux0ch4;\n+\t\ti2c49 = &i2c11mux0ch5;\n+\t\ti2c50 = &i2c11mux0ch6;\n+\t\ti2c51 = &i2c11mux0ch7;\n+\t\ti2c52 = &i2c13mux0ch0;\n+\t\ti2c53 = &i2c13mux0ch1;\n+\t\ti2c54 = &i2c13mux0ch2;\n+\t\ti2c55 = &i2c13mux0ch3;\n+\t\ti2c56 = &i2c13mux0ch4;\n+\t\ti2c57 = &i2c13mux0ch5;\n+\t\ti2c58 = &i2c13mux0ch6;\n+\t\ti2c59 = &i2c13mux0ch7;\n+\t};\n+\n+\tchosen {\n+\t\tstdout-path = \"serial4:57600n8\";\n+\t};\n+\n+\tiio-hwmon {\n+\t\tcompatible = \"iio-hwmon\";\n+\t\tio-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>,\n+\t\t\t\t <&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>,\n+\t\t\t\t <&adc1 2>;\n+\t};\n+\n+\tleds {\n+\t\tcompatible = \"gpio-leds\";\n+\n+\t\tled-0 {\n+\t\t\tlabel = \"bmc_heartbeat_amber\";\n+\t\t\tgpios = <&gpio0 ASPEED_GPIO(P, 7) GPIO_ACTIVE_LOW>;\n+\t\t\tlinux,default-trigger = \"heartbeat\";\n+\t\t};\n+\n+\t\tled-1 {\n+\t\t\tlabel = \"fp_id_amber\";\n+\t\t\tdefault-state = \"off\";\n+\t\t\tgpios = <&gpio0 ASPEED_GPIO(B, 5) GPIO_ACTIVE_HIGH>;\n+\t\t};\n+\t};\n+\n+\tmemory@80000000 {\n+\t\tdevice_type = \"memory\";\n+\t\treg = <0x80000000 0x80000000>;\n+\t};\n+\n+\treserved-memory {\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <1>;\n+\t\tranges;\n+\n+\t\tvideo_engine_memory: video {\n+\t\t\tsize = <0x02c00000>;\n+\t\t\talignment = <0x00100000>;\n+\t\t\tcompatible = \"shared-dma-pool\";\n+\t\t\treusable;\n+\t\t};\n+\n+\t\tgfx_memory: framebuffer {\n+\t\t\tsize = <0x01000000>;\n+\t\t\talignment = <0x01000000>;\n+\t\t\tcompatible = \"shared-dma-pool\";\n+\t\t\treusable;\n+\t\t};\n+\t};\n+\n+\tp3v3_bmc_aux: regulator-p3v3-bmc-aux {\n+\t\tcompatible = \"regulator-fixed\";\n+\t\tregulator-name = \"p3v3_bmc_aux\";\n+\t\tregulator-min-microvolt = <3300000>;\n+\t\tregulator-max-microvolt = <3300000>;\n+\t\tregulator-always-on;\n+\t};\n+\n+\tspi_gpio: spi {\n+\t\tcompatible = \"spi-gpio\";\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <0>;\n+\n+\t\tsck-gpios = <&gpio0 ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH>;\n+\t\tmosi-gpios = <&gpio0 ASPEED_GPIO(Z, 4) GPIO_ACTIVE_HIGH>;\n+\t\tmiso-gpios = <&gpio0 ASPEED_GPIO(Z, 5) GPIO_ACTIVE_HIGH>;\n+\t\tcs-gpios = <&gpio0 ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>;\n+\t\tnum-chipselects = <1>;\n+\t\tstatus = \"okay\";\n+\n+\t\ttpm@0 {\n+\t\t\tcompatible = \"infineon,slb9670\", \"tcg,tpm_tis-spi\";\n+\t\t\tspi-max-frequency = <33000000>;\n+\t\t\treg = <0>;\n+\t\t};\n+\t};\n+};\n+\n+&adc0 {\n+\taspeed,int-vref-microvolt = <2500000>;\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default\n+\t\t&pinctrl_adc2_default &pinctrl_adc3_default\n+\t\t&pinctrl_adc4_default &pinctrl_adc5_default\n+\t\t&pinctrl_adc6_default &pinctrl_adc7_default>;\n+\tstatus = \"okay\";\n+};\n+\n+&adc1 {\n+\taspeed,int-vref-microvolt = <2500000>;\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&pinctrl_adc10_default>;\n+\tstatus = \"okay\";\n+};\n+\n+&ehci1 {\n+\tstatus = \"okay\";\n+};\n+\n+&fmc {\n+\tstatus = \"okay\";\n+\n+\tflash@0 {\n+\t\tstatus = \"okay\";\n+\t\tm25p,fast-read;\n+\t\tlabel = \"bmc\";\n+\t\tspi-max-frequency = <50000000>;\n+#include \"openbmc-flash-layout-128.dtsi\"\n+\t};\n+\n+\tflash@1 {\n+\t\tstatus = \"okay\";\n+\t\tm25p,fast-read;\n+\t\tlabel = \"alt-bmc\";\n+\t\tspi-max-frequency = <50000000>;\n+\t};\n+};\n+\n+&gfx {\n+\tstatus = \"okay\";\n+\tmemory-region = <&gfx_memory>;\n+};\n+\n+&gpio0 {\n+\tgpio-line-names =\n+\n+\t/*A0-A7*/\n+\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n+\n+\t/*B0-B7*/\n+\t\"BATTERY_DETECT\", \"\", \"\", \"BMC_READY\",\n+\t\"\", \"FM_ID_LED\", \"\", \"\",\n+\n+\t/*C0-C7*/\n+\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n+\n+\t/*D0-D7*/\n+\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n+\n+\t/*E0-E7*/\n+\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n+\n+\t/*F0-F7*/\n+\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n+\n+\t/*G0-G7*/\n+\t\"FM_MUX1_SEL\", \"\", \"\", \"\",\n+\t\"\", \"\", \"FM_DEBUG_PORT_PRSNT_N\", \"FM_BMC_DBP_PRESENT_N\",\n+\n+\t/*H0-H7*/\n+\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n+\n+\t/*I0-I7*/\n+\t\"\", \"\", \"\", \"\",\n+\t\"\", \"FLASH_WP_STATUS\", \"BMC_JTAG_MUX_SEL\", \"\",\n+\n+\t/*J0-J7*/\n+\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n+\n+\t/*K0-K7*/\n+\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n+\n+\t/*L0-L7*/\n+\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n+\n+\t/*M0-M7*/\n+\t\"\", \"BMC_FRU_WP\", \"\", \"\",\n+\t\"\", \"\", \"\", \"\",\n+\n+\t/*N0-N7*/\n+\t\"LED_POSTCODE_0\", \"LED_POSTCODE_1\", \"LED_POSTCODE_2\", \"LED_POSTCODE_3\",\n+\t\"LED_POSTCODE_4\", \"LED_POSTCODE_5\", \"LED_POSTCODE_6\", \"LED_POSTCODE_7\",\n+\n+\t/*O0-O7*/\n+\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n+\n+\t/*P0-P7*/\n+\t\"PWR_BTN_BMC_BUF_N\", \"\", \"ID_RST_BTN_BMC_N\", \"\",\n+\t\"PWR_LED\", \"\", \"\", \"BMC_HEARTBEAT_N\",\n+\n+\t/*Q0-Q7*/\n+\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n+\n+\t/*R0-R7*/\n+\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n+\n+\t/*S0-S7*/\n+\t\"\", \"\", \"SYS_BMC_PWRBTN_N\", \"\",\n+\t\"\", \"\", \"\", \"RUN_POWER_FAULT\",\n+\n+\t/*T0-T7*/\n+\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n+\n+\t/*U0-U7*/\n+\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n+\n+\t/*V0-V7*/\n+\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n+\n+\t/*W0-W7*/\n+\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n+\n+\t/*X0-X7*/\n+\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n+\n+\t/*Y0-Y7*/\n+\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n+\n+\t/*Z0-Z7*/\n+\t\"SPI_BMC_TPM_CS2_N\", \"\", \"\", \"SPI_BMC_TPM_CLK\",\n+\t\"SPI_BMC_TPM_MOSI\", \"SPI_BMC_TPM_MISO\", \"\", \"\";\n+};\n+\n+&gpio1 {\n+\tgpio-line-names =\n+\t/*18A0-18A7*/\n+\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n+\n+\t/*18B0-18B7*/\n+\t\"\",\"\",\"\",\"\",\n+\t\"FM_BOARD_BMC_REV_ID0\", \"FM_BOARD_BMC_REV_ID1\",\n+\t\"FM_BOARD_BMC_REV_ID2\", \"\",\n+\n+\t/*18C0-18C7*/\n+\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n+\n+\t/*18D0-18D7*/\n+\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n+\n+\t/*18E0-18E3*/\n+\t\"FM_BMC_PROT_LS_EN\", \"AC_PWR_BMC_BTN_N\", \"\", \"\";\n+};\n+\n+// L Bridge Board\n+&i2c0 {\n+\tstatus = \"okay\";\n+\n+\teeprom@50 {\n+\t\tcompatible = \"atmel,24c2048\";\n+\t\treg = <0x50>;\n+\t\tpagesize = <128>;\n+\t};\n+\n+\ti2c-mux@70 {\n+\t\tcompatible = \"nxp,pca9546\";\n+\t\treg = <0x70>;\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <0>;\n+\t\ti2c-mux-idle-disconnect;\n+\n+\t\ti2c0mux0ch0: i2c@0 {\n+\t\t\treg = <0>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t};\n+\t\ti2c0mux0ch1: i2c@1 {\n+\t\t\treg = <1>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t};\n+\t\ti2c0mux0ch2: i2c@2 {\n+\t\t\treg = <2>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t};\n+\t\ti2c0mux0ch3: i2c@3 {\n+\t\t\treg = <3>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t};\n+\t};\n+};\n+\n+// R Bridge Board\n+&i2c1 {\n+\tstatus = \"okay\";\n+\n+\teeprom@50 {\n+\t\tcompatible = \"atmel,24c2048\";\n+\t\treg = <0x50>;\n+\t\tpagesize = <128>;\n+\t};\n+\n+\ti2c-mux@70 {\n+\t\tcompatible = \"nxp,pca9546\";\n+\t\treg = <0x70>;\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <0>;\n+\t\ti2c-mux-idle-disconnect;\n+\n+\t\ti2c1mux0ch0: i2c@0 {\n+\t\t\treg = <0>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t};\n+\t\ti2c1mux0ch1: i2c@1 {\n+\t\t\treg = <1>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t};\n+\t\ti2c1mux0ch2: i2c@2 {\n+\t\t\treg = <2>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t};\n+\t\ti2c1mux0ch3: i2c@3 {\n+\t\t\treg = <3>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t};\n+\t};\n+};\n+\n+// MB - E1.S\n+&i2c4 {\n+\tstatus = \"okay\";\n+\n+\ti2c-mux@70 {\n+\t\tcompatible = \"nxp,pca9548\";\n+\t\treg = <0x70>;\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <0>;\n+\t\ti2c-mux-idle-disconnect;\n+\n+\t\ti2c4mux0ch0: i2c@0 {\n+\t\t\treg = <0>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t};\n+\t\ti2c4mux0ch1: i2c@1 {\n+\t\t\treg = <1>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t};\n+\t\ti2c4mux0ch2: i2c@2 {\n+\t\t\treg = <2>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t};\n+\t\ti2c4mux0ch3: i2c@3 {\n+\t\t\treg = <3>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t};\n+\t\ti2c4mux0ch4: i2c@4 {\n+\t\t\treg = <4>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t};\n+\t\ti2c4mux0ch5: i2c@5 {\n+\t\t\treg = <5>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t};\n+\t\ti2c4mux0ch6: i2c@6 {\n+\t\t\treg = <6>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t};\n+\t\ti2c4mux0ch7: i2c@7 {\n+\t\t\treg = <7>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t};\n+\t};\n+};\n+\n+// AMC\n+&i2c5 {\n+\tstatus = \"okay\";\n+};\n+\n+// MB\n+&i2c6 {\n+\tstatus = \"okay\";\n+\n+\t// HPM FRU\n+\teeprom@50 {\n+\t\tcompatible = \"atmel,24c256\";\n+\t\treg = <0x50>;\n+\t};\n+};\n+\n+// SCM\n+&i2c7 {\n+\tstatus = \"okay\";\n+\n+\n+};\n+\n+// MB - PDB\n+&i2c8 {\n+\tstatus = \"okay\";\n+\n+\ti2c-mux@72 {\n+\t\tcompatible = \"nxp,pca9546\";\n+\t\treg = <0x72>;\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <0>;\n+\t\ti2c-mux-idle-disconnect;\n+\n+\t\ti2c8mux0ch0: i2c@0 {\n+\t\t\treg = <0>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\n+\t\t\tadc@1f {\n+\t\t\t\tcompatible = \"ti,adc128d818\";\n+\t\t\t\treg = <0x1f>;\n+\t\t\t\tti,mode = /bits/ 8 <1>;\n+\t\t\t};\n+\n+\t\t\tgpio@22 {\n+\t\t\t\tcompatible = \"nxp,pca9555\";\n+\t\t\t\treg = <0x22>;\n+\t\t\t\tgpio-controller;\n+\t\t\t\t#gpio-cells = <2>;\n+\n+\t\t\t\tgpio-line-names =\n+\t\t\t\t\t\"RPDB_FAN_FULL_SPEED_R_N\", \"RPDB_I2C_TEMP75_U8_ALERT_R_N\",\n+\t\t\t\t\t\"RPDB_I2C_TMP432_U29_ALERT_R_N\", \"RPDB_GLOBAL_WP\",\n+\t\t\t\t\t\"RPDB_FAN_CT_FAN_FAIL_R_N\", \"\",\n+\t\t\t\t\t\"\", \"\",\n+\t\t\t\t\t\"RPDB_ALERT_P50V_HSC2_R_N\", \"RPDB_ALERT_P50V_HSC3_R_N\",\n+\t\t\t\t\t\"RPDB_ALERT_P50V_HSC4_R_N\", \"RPDB_ALERT_P50V_STBY_R_N\",\n+\t\t\t\t\t\"RPDB_I2C_P12V_MB_VRM_ALERT_R_N\",\n+\t\t\t\t\t\"RPDB_I2C_P12V_STBY_VRM_ALERT_R_N\",\n+\t\t\t\t\t\"RPDB_PGD_P3V3_STBY_PWRGD_R\",\n+\t\t\t\t\t\"RPDB_P12V_STBY_VRM_PWRGD_BUF_R\";\n+\t\t\t};\n+\n+\t\t\tgpio@24 {\n+\t\t\t\tcompatible = \"nxp,pca9555\";\n+\t\t\t\treg = <0x24>;\n+\t\t\t\tgpio-controller;\n+\t\t\t\t#gpio-cells = <2>;\n+\n+\t\t\t\tgpio-line-names =\n+\t\t\t\t\t\"RPDB_EAM2_PRSNT_MOS_N_R\", \"RPDB_EAM3_PRSNT_MOS_N_R\",\n+\t\t\t\t\t\"RPDB_PWRGD_P50V_HSC4_SYS_R\",\n+\t\t\t\t\t\"RPDB_PWRGD_P50V_STBY_SYS_BUF_R\",\n+\t\t\t\t\t\"RPDB_P50V_FAN1_R2_PG\", \"RPDB_P50V_FAN2_R2_PG\",\n+\t\t\t\t\t\"RPDB_P50V_FAN3_R2_PG\", \"RPDB_P50V_FAN4_R2_PG\",\n+\t\t\t\t\t\"\", \"RPDB_FAN1_PRSNT_N_R\",\n+\t\t\t\t\t\"\", \"RPDB_FAN2_PRSNT_N_R\",\n+\t\t\t\t\t\"RPDB_FAN3_PRSNT_N_R\", \"RPDB_FAN4_PRSNT_N_R\",\n+\t\t\t\t\t\"\", \"\";\n+\t\t\t};\n+\n+\t\t\t// R-PDB FRU\n+\t\t\teeprom@50 {\n+\t\t\t\tcompatible = \"atmel,24c128\";\n+\t\t\t\treg = <0x50>;\n+\t\t\t};\n+\t\t};\n+\t\ti2c8mux0ch1: i2c@1 {\n+\t\t\treg = <1>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\n+\t\t\tgpio@22 {\n+\t\t\t\tcompatible = \"nxp,pca9555\";\n+\t\t\t\treg = <0x22>;\n+\t\t\t\tgpio-controller;\n+\t\t\t\t#gpio-cells = <2>;\n+\n+\t\t\t\tgpio-line-names =\n+\t\t\t\t\t\"LPDB_FAN_FULL_SPEED_R_N\",\"LPDB_I2C_TEMP75_U8_ALERT_R_N\",\n+\t\t\t\t\t\"LPDB_I2C_TMP432_U29_ALERT_R_N\",\"LPDB_GLOBAL_WP\",\n+\t\t\t\t\t\"LPDB_FAN_CT_FAN_FAIL_R_N\",\"\",\n+\t\t\t\t\t\"\",\"\",\n+\t\t\t\t\t\"LPDB_ALERT_P50V_HSC0_R_N\",\"LPDB_ALERT_P50V_HSC1_R_N\",\n+\t\t\t\t\t\"LPDB_ALERT_P50V_HSC5_R_N\",\"LPDB_I2C_P12V_SW_VRM_ALERT_R_N\",\n+\t\t\t\t\t\"LPDB_EAM0_PRSNT_MOS_N_R\",\"LPDB_EAM1_PRSNT_MOS_N_R\",\n+\t\t\t\t\t\"LPDB_PWRGD_P50V_HSC5_SYS_R\",\"\";\n+\t\t\t};\n+\n+\t\t\tgpio@24 {\n+\t\t\t\tcompatible = \"nxp,pca9555\";\n+\t\t\t\treg = <0x24>;\n+\t\t\t\tgpio-controller;\n+\t\t\t\t#gpio-cells = <2>;\n+\n+\t\t\t\tgpio-line-names =\n+\t\t\t\t\t\"LPDB_P50V_FAN1_R2_PG\",\"LPDB_P50V_FAN2_R2_PG\",\n+\t\t\t\t\t\"LPDB_P50V_FAN3_R2_PG\",\"LPDB_P50V_FAN4_R2_PG\",\n+\t\t\t\t\t\"LPDB_P50V_FAN5_R2_PG\",\"LPDB_FAN1_PRSNT_N_R\",\n+\t\t\t\t\t\"LPDB_FAN2_PRSNT_N_R\",\"LPDB_FAN3_PRSNT_N_R\",\n+\t\t\t\t\t\"LPDB_FAN4_PRSNT_N_R\",\"LPDB_FAN5_PRSNT_N_R\",\n+\t\t\t\t\t\"\",\"\",\n+\t\t\t\t\t\"\",\"\",\n+\t\t\t\t\t\"\",\"\";\n+\t\t\t};\n+\n+\t\t\t// L-PDB FRU\n+\t\t\teeprom@50 {\n+\t\t\t\tcompatible = \"atmel,24c128\";\n+\t\t\t\treg = <0x50>;\n+\t\t\t};\n+\t\t};\n+\t\ti2c8mux0ch2: i2c@2 {\n+\t\t\treg = <2>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t};\n+\t\ti2c8mux0ch3: i2c@3 {\n+\t\t\treg = <3>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t};\n+\t};\n+};\n+\n+// SCM\n+&i2c9 {\n+\tstatus = \"okay\";\n+\n+\t// SCM FRU\n+\teeprom@50 {\n+\t\tcompatible = \"atmel,24c128\";\n+\t\treg = <0x50>;\n+\t};\n+\n+\t// BSM FRU\n+\teeprom@56 {\n+\t\tcompatible = \"atmel,24c64\";\n+\t\treg = <0x56>;\n+\t};\n+};\n+\n+// R Bridge Board\n+&i2c10 {\n+\tstatus = \"okay\";\n+\n+\ti2c-mux@71 {\n+\t\tcompatible = \"nxp,pca9548\";\n+\t\treg = <0x71>;\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <0>;\n+\t\ti2c-mux-idle-disconnect;\n+\n+\t\ti2c10mux0ch0: i2c@0 {\n+\t\t\treg = <0>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t};\n+\t\ti2c10mux0ch1: i2c@1 {\n+\t\t\treg = <1>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t};\n+\t\ti2c10mux0ch2: i2c@2 {\n+\t\t\treg = <2>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t};\n+\t\ti2c10mux0ch3: i2c@3 {\n+\t\t\treg = <3>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t};\n+\t\ti2c10mux0ch4: i2c@4 {\n+\t\t\treg = <4>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t};\n+\t\ti2c10mux0ch5: i2c@5 {\n+\t\t\treg = <5>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\n+\t\t\tgpio@22 {\n+\t\t\t\tcompatible = \"nxp,pca9555\";\n+\t\t\t\treg = <0x22>;\n+\t\t\t\tgpio-controller;\n+\t\t\t\t#gpio-cells = <2>;\n+\n+\t\t\t\tgpio-line-names =\n+\t\t\t\t\t\"\",\"\",\n+\t\t\t\t\t\"\",\"RBB_CPLD_REFRESH_IN_PRGRS_R_L\",\n+\t\t\t\t\t\"RBB_EAM0_NIC_CBL_PRSNT_R_L\",\"RBB_EAM1_NIC_CBL_PRSNT_R_L\",\n+\t\t\t\t\t\"RBB_AINIC_JTAG_MUX_R2_SEL\",\"RBB_SPI_MUX0_R2_SEL\",\n+\t\t\t\t\t\"RBB_AINIC_PRSNT_R_L\",\"RBB_AINIC_OE_R_N\",\n+\t\t\t\t\t\"RBB_AINIC_BOARD_R2_ID\",\"RBB_RST_USB2_HUB_R_N\",\n+\t\t\t\t\t\"RBB_RST_FT4222_R_N\",\"RBB_RST_MCP2210_R_N\",\n+\t\t\t\t\t\"\",\"\";\n+\t\t\t};\n+\n+\t\t\t// R Bridge Board FRU\n+\t\t\teeprom@52 {\n+\t\t\t\tcompatible = \"atmel,24c256\";\n+\t\t\t\treg = <0x52>;\n+\t\t\t};\n+\t\t};\n+\t\ti2c10mux0ch6: i2c@6 {\n+\t\t\treg = <6>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t};\n+\t\ti2c10mux0ch7: i2c@7 {\n+\t\t\treg = <7>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t};\n+\t};\n+};\n+\n+// L Bridge Board\n+&i2c11 {\n+\tstatus = \"okay\";\n+\n+\ti2c-mux@71 {\n+\t\tcompatible = \"nxp,pca9548\";\n+\t\treg = <0x71>;\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <0>;\n+\t\ti2c-mux-idle-disconnect;\n+\n+\t\ti2c11mux0ch0: i2c@0 {\n+\t\t\treg = <0>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t};\n+\t\ti2c11mux0ch1: i2c@1 {\n+\t\t\treg = <1>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t};\n+\t\ti2c11mux0ch2: i2c@2 {\n+\t\t\treg = <2>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t};\n+\t\ti2c11mux0ch3: i2c@3 {\n+\t\t\treg = <3>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t};\n+\t\ti2c11mux0ch4: i2c@4 {\n+\t\t\treg = <4>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t};\n+\t\ti2c11mux0ch5: i2c@5 {\n+\t\t\treg = <5>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\n+\t\t\tgpio@22 {\n+\t\t\t\tcompatible = \"nxp,pca9555\";\n+\t\t\t\treg = <0x22>;\n+\t\t\t\tgpio-controller;\n+\t\t\t\t#gpio-cells = <2>;\n+\n+\t\t\t\tgpio-line-names =\n+\t\t\t\t\t\"\",\"\",\n+\t\t\t\t\t\"\",\"LBB_CPLD_REFRESH_IN_PRGRS_R_L\",\n+\t\t\t\t\t\"LBB_EAM0_NIC_CBL_PRSNT_R_L\",\"LBB_EAM1_NIC_CBL_PRSNT_R_L\",\n+\t\t\t\t\t\"LBB_AINIC_JTAG_MUX_R2_SEL\",\"LBB_SPI_MUX0_R2_SEL\",\n+\t\t\t\t\t\"LBB_AINIC_PRSNT_R_L\",\"LBB_AINIC_OE_R_N\",\n+\t\t\t\t\t\"LBB_AINIC_BOARD_R2_ID\",\"LBB_RST_USB2_HUB_R_N\",\n+\t\t\t\t\t\"LBB_RST_FT4222_R_N\",\"LBB_RST_MCP2210_R_N\",\n+\t\t\t\t\t\"\",\"\";\n+\t\t\t};\n+\n+\t\t\t// L Bridge Board FRU\n+\t\t\teeprom@52 {\n+\t\t\t\tcompatible = \"atmel,24c256\";\n+\t\t\t\treg = <0x52>;\n+\t\t\t};\n+\t\t};\n+\t\ti2c11mux0ch6: i2c@6 {\n+\t\t\treg = <6>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t};\n+\t\ti2c11mux0ch7: i2c@7 {\n+\t\t\treg = <7>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t};\n+\t};\n+};\n+\n+// Debug Card\n+&i2c12 {\n+\tstatus = \"okay\";\n+};\n+\n+// MB\n+&i2c13 {\n+\tstatus = \"okay\";\n+\n+\ti2c-mux@70 {\n+\t\tcompatible = \"nxp,pca9548\";\n+\t\treg = <0x70>;\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <0>;\n+\t\ti2c-mux-idle-disconnect;\n+\n+\t\ti2c13mux0ch0: i2c@0 {\n+\t\t\treg = <0>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t};\n+\t\ti2c13mux0ch1: i2c@1 {\n+\t\t\treg = <1>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t};\n+\t\ti2c13mux0ch2: i2c@2 {\n+\t\t\treg = <2>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t};\n+\t\ti2c13mux0ch3: i2c@3 {\n+\t\t\treg = <3>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\n+\t\t\tadc@1f {\n+\t\t\t\tcompatible = \"ti,adc128d818\";\n+\t\t\t\treg = <0x1f>;\n+\t\t\t\tti,mode = /bits/ 8 <1>;\n+\t\t\t};\n+\t\t};\n+\t\ti2c13mux0ch4: i2c@4 {\n+\t\t\treg = <4>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\n+\t\t\t// HPM BRD ID FRU\n+\t\t\teeprom@51 {\n+\t\t\t\tcompatible = \"atmel,24c256\";\n+\t\t\t\treg = <0x51>;\n+\t\t\t};\n+\t\t};\n+\t\ti2c13mux0ch5: i2c@5 {\n+\t\t\treg = <5>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t};\n+\t\ti2c13mux0ch6: i2c@6 {\n+\t\t\treg = <6>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t};\n+\t\ti2c13mux0ch7: i2c@7 {\n+\t\t\treg = <7>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\n+\t\t\tnfc@28 {\n+\t\t\t\tcompatible = \"nxp,nxp-nci-i2c\";\n+\t\t\t\treg = <0x28>;\n+\n+\t\t\t\tinterrupt-parent = <&sgpiom0>;\n+\t\t\t\tinterrupts = <156 IRQ_TYPE_LEVEL_HIGH>;\n+\n+\t\t\t\tenable-gpios = <&sgpiom0 241 GPIO_ACTIVE_HIGH>;\n+\t\t\t};\n+\t\t};\n+\t};\n+};\n+\n+// SCM\n+&i2c14 {\n+\tstatus = \"okay\";\n+};\n+\n+&i2c15 {\n+\tstatus = \"okay\";\n+};\n+\n+&kcs2 {\n+\taspeed,lpc-io-reg = <0xca8>;\n+\tstatus = \"okay\";\n+};\n+\n+&kcs3 {\n+\taspeed,lpc-io-reg = <0xca2>;\n+\tstatus = \"okay\";\n+};\n+\n+&lpc_ctrl {\n+\tstatus = \"okay\";\n+};\n+\n+&mac2 {\n+\tstatus = \"okay\";\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&pinctrl_ncsi3_default>;\n+\tuse-ncsi;\n+};\n+\n+&sgpiom0 {\n+\tngpios = <128>;\n+\tbus-frequency = <2000000>;\n+\tgpio-line-names =\n+\t/*in - out - in - out */\n+\t/* A0-A7 line 0-15 */\n+\t\"\", \"FM_CPU0_SYS_RESET_N\", \"\", \"CPU0_KBRST_N\",\n+\t\"\", \"FM_CPU0_PROCHOT_trigger_N\", \"\", \"FM_CLR_CMOS_R_P0\",\n+\t\"\", \"Force_I3C_SEL\", \"\", \"SYSTEM_Force_Run_AC_Cycle\",\n+\t\"\", \"\", \"\", \"\",\n+\n+\t/* B0-B7 line 16-31 */\n+\t\"Channel0_leakage_EAM3\", \"FM_CPU_FPGA_JTAG_MUX_SEL\",\n+\t\"Channel1_leakage_EAM0\", \"FM_SCM_JTAG_MUX_SEL\",\n+\t\"Channel2_leakage_Manifold1\", \"FM_BRIDGE_JTAG_MUX_SEL\",\n+\t\"Channel3_leakage\", \"FM_CPU0_NMI_SYNC_FLOOD_N\",\n+\t\"Channel4_leakage_Manifold2\", \"\",\n+\t\"Channel5_leakage_EAM1\", \"\",\n+\t\"Channel6_leakage_CPU_DIMM\", \"\",\n+\t\"Channel7_leakage_EAM2\", \"\",\n+\n+\t/* C0-C7 line 32-47 */\n+\t\"RSVD_RMC_GPIO3\", \"\", \"\", \"\",\n+\t\"\", \"\", \"\", \"\",\n+\t\"LEAK_DETECT_RMC_N\", \"\", \"\", \"\",\n+\t\"\", \"\", \"\", \"\",\n+\n+\t/* D0-D7 line 48-63 */\n+\t\"PWRGD_PDB_EAMHSC0_CPLD_PG_R\", \"\",\n+\t\"PWRGD_PDB_EAMHSC1_CPLD_PG_R\", \"\",\n+\t\"PWRGD_PDB_EAMHSC2_CPLD_PG_R\", \"\",\n+\t\"PWRGD_PDB_EAMHSC3_CPLD_PG_R\", \"\",\n+\t\"AMC_BRD_PRSNT_CPLD_L\", \"\", \"\", \"\",\n+\t\"\", \"\", \"\", \"\",\n+\n+\t/* E0-E7 line 64-79 */\n+\t\"AMC_PDB_EAMHSC0_CPLD_EN_R\", \"\",\n+\t\"AMC_PDB_EAMHSC1_CPLD_EN_R\", \"\",\n+\t\"AMC_PDB_EAMHSC2_CPLD_EN_R\", \"\",\n+\t\"AMC_PDB_EAMHSC3_CPLD_EN_R\", \"\",\n+\t\"\", \"\", \"\", \"\",\n+\t\"\", \"\", \"\", \"\",\n+\n+\t/* F0-F7 line 80-95 */\n+\t\"PWRGD_PVDDCR_CPU1_P0\", \"SGPIO_READY\",\n+\t\"PWRGD_PVDDCR_CPU0_P0\", \"\",\n+\t\"\", \"\", \"\", \"\",\n+\t\"\", \"\", \"\", \"\",\n+\n+\t/* G0-G7 line 96-111 */\n+\t\"PWRGD_PVDDCR_SOC_P0\", \"\",\n+\t\"PWRGD_PVDDIO_P0\", \"\",\n+\t\"PWRGD_PVDDIO_MEM_S3_P0\", \"\",\n+\t\"PWRGD_CHMP_CPU0_FPGA\", \"\",\n+\t\"PWRGD_CHIL_CPU0_FPGA\", \"\",\n+\t\"PWRGD_CHEH_CPU0_FPGA\", \"\",\n+\t\"PWRGD_CHAD_CPU0_FPGA\", \"FM_BMC_READY_PLD\",\n+\t\"\", \"\",\n+\n+\t/* H0-H7 line 112-127 */\n+\t\"PWRGD_P3V3\", \"\",\n+\t\"P12V_DDR_IP_PWRGD_R\", \"\",\n+\t\"P12V_DDR_AH_PWRGD_R\", \"\",\n+\t\"PWRGD_P12V_VRM1_CPLD_PG_R\", \"\",\n+\t\"PWRGD_P12V_VRM0_CPLD_PG_R\", \"\",\n+\t\"PWRGD_PDB_HSC4_CPLD_PG_R\", \"\",\n+\t\"PWRGD_PVDD18_S5_P0_PG\", \"\",\n+\t\"PWRGD_PVDD33_S5_P0_PG\", \"\",\n+\n+\t/* I0-I7 line 128-143 */\n+\t\"EAM0_BRD_PRSNT_R_L\", \"\",\n+\t\"EAM1_BRD_PRSNT_R_L\", \"\",\n+\t\"EAM2_BRD_PRSNT_R_L\", \"\",\n+\t\"EAM3_BRD_PRSNT_R_L\", \"\",\n+\t\"EAM0_CPU_MOD_PWR_GD_R\", \"\",\n+\t\"EAM1_CPU_MOD_PWR_GD_R\", \"\",\n+\t\"EAM2_CPU_MOD_PWR_GD_R\", \"\",\n+\t\"EAM3_CPU_MOD_PWR_GD_R\", \"\",\n+\n+\t/* J0-J7 line 144-159 */\n+\t\"PRSNT_L_BIRDGE_R\", \"\",\n+\t\"PRSNT_R_BIRDGE_R\", \"\",\n+\t\"BRIDGE_L_MAIN_PG_R\", \"\",\n+\t\"BRIDGE_R_MAIN_PG_R\", \"\",\n+\t\"BRIDGE_L_STBY_PG_R\", \"\",\n+\t\"BRIDGE_R_STBY_PG_R\", \"\",\n+\t\"\", \"\", \"\", \"\",\n+\n+\t/* K0-K7 line 160-175 */\n+\t\"ADC_I2C_ALERT_N\", \"\",\n+\t\"TEMP_I2C_ALERT_R_L\", \"\",\n+\t\"CPU0_VR_SMB_ALERT_CPLD_N\", \"\",\n+\t\"COVER_INTRUDER_R_N\", \"\",\n+\t\"HANDLE_INTRUDER_CPLD_N\", \"\",\n+\t\"IRQ_MCIO_CPLD_WAKE_R_N\", \"\",\n+\t\"APML_CPU0_ALERT_R_N\", \"\",\n+\t\"PDB_ALERT_R_N\", \"\",\n+\n+\t/* L0-L7 line 176-191 */\n+\t\"CPU0_SP7R1\", \"\", \"CPU0_SP7R2\", \"\",\n+\t\"CPU0_SP7R3\", \"\", \"CPU0_SP7R4\", \"\",\n+\t\"CPU0_CORETYPE0\", \"\", \"CPU0_CORETYPE1\", \"\",\n+\t\"CPU0_CORETYPE2\", \"\", \"FM_BIOS_POST_CMPLT_R_N\", \"\",\n+\n+\t/* M0-M7 line 192-207 */\n+\t\"EAM0_SMERR_CPLD_R_L\", \"\",\n+\t\"EAM1_SMERR_CPLD_R_L\", \"\",\n+\t\"EAM2_SMERR_CPLD_R_L\", \"\",\n+\t\"EAM3_SMERR_CPLD_R_L\", \"\",\n+\t\"CPU0_SMERR_N_R\", \"\",\n+\t\"CPU0_NV_SAVE_N_R\", \"\",\n+\t\"PDB_PWR_LOSS_CPLD_N\", \"\",\n+\t\"IRQ_BMC_SMI_ACTIVE_R_N\", \"\",\n+\n+\t/* N0-N7 line 208-223 */\n+\t\"AMCROT_BMC_S5_RDY_R\", \"\",\n+\t\"AMC_RDY_R\", \"\",\n+\t\"AMC_STBY_PGOOD_R\", \"\",\n+\t\"CPU_AMC_SLP_S5_R_L\", \"\",\n+\t\"AMC_CPU_EAMPG_R\", \"\",\n+\t\"\", \"\", \"\", \"\",\n+\n+\t/* O0-O7 line 224-239 */\n+\t\"HPM_PWR_FAIL\", \"Port80_b0\",\n+\t\"FM_DIMM_IP_FAIL\", \"Port80_b1\",\n+\t\"FM_DIMM_AH_FAIL\", \"Port80_b2\",\n+\t\"HPM_AMC_THERMTRIP_R_L\", \"Port80_b3\",\n+\t\"FM_CPU0_THERMTRIP_N\", \"Port80_b4\",\n+\t\"PVDDCR_SOC_P0_OCP_L\", \"Port80_b5\",\n+\t\"CPLD_SGPIO_RDY\", \"Port80_b6\",\n+\t\"\", \"Port80_b7\",\n+\n+\t/* P0-P7 line 240-255 */\n+\t\"CPU0_SLP_S5_N_R\", \"NFC_VEN\",\n+\t\"CPU0_SLP_S3_N_R\", \"\",\n+\t\"FM_CPU0_PWRGD\", \"\",\n+\t\"PWRGD_RMC\", \"\",\n+\t\"FM_RST_CPU0_RESET_N\", \"\",\n+\t\"FM_PWRGD_CPU0_PWROK\", \"\",\n+\t\"wS5_PWR_Ready\", \"\",\n+\t\"wS0_ON_N\", \"PWRGD_P1V0_AUX\";\n+\tstatus = \"okay\";\n+};\n+\n+// BIOS Flash\n+&spi2 {\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&pinctrl_spi2_default>;\n+\tstatus = \"okay\";\n+\treg = <0x1e631000 0xc4>, <0x50000000 0x8000000>;\n+\n+\tflash@0 {\n+\t\tcompatible = \"jedec,spi-nor\";\n+\t\tlabel = \"pnor\";\n+\t\tspi-max-frequency = <12000000>;\n+\t\tspi-tx-bus-width = <2>;\n+\t\tspi-rx-bus-width = <2>;\n+\t\tstatus = \"okay\";\n+\t};\n+};\n+\n+// HOST BIOS Debug\n+&uart1 {\n+\tstatus = \"okay\";\n+};\n+\n+&uart3 {\n+\tstatus = \"okay\";\n+};\n+\n+&uart4 {\n+\tstatus = \"okay\";\n+};\n+\n+// BMC Debug Console\n+&uart5 {\n+\tstatus = \"okay\";\n+};\n+\n+&uart_routing {\n+\tstatus = \"okay\";\n+};\n+\n+&uhci {\n+\tstatus = \"okay\";\n+};\n+\n+&vhub {\n+\tstatus = \"okay\";\n+\tpinctrl-names = \"default\";\n+};\n+\n+&video {\n+\tstatus = \"okay\";\n+\tmemory-region = <&video_engine_memory>;\n+};\n+\n+&wdt1 {\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&pinctrl_wdtrst1_default>;\n+\taspeed,reset-type = \"soc\";\n+\taspeed,external-signal;\n+\taspeed,ext-push-pull;\n+\taspeed,ext-active-high;\n+\taspeed,ext-pulse-duration = <256>;\n+\tstatus = \"okay\";\n+};\ndiff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa.dts\nindex 2cb7bd128d24..980628af80b0 100644\n--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa.dts\n+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa.dts\n@@ -1,1067 +1,5 @@\n // SPDX-License-Identifier: GPL-2.0-or-later\n \n /dts-v1/;\n-#include \"aspeed-g6.dtsi\"\n-#include \n-#include \n+#include \"aspeed-bmc-facebook-anacapa-evt1.dts\"\n \n-/ {\n-\tmodel = \"Facebook Anacapa BMC\";\n-\tcompatible = \"facebook,anacapa-bmc\", \"aspeed,ast2600\";\n-\n-\taliases {\n-\t\tserial0 = &uart1;\n-\t\tserial1 = &uart2;\n-\t\tserial2 = &uart3;\n-\t\tserial3 = &uart4;\n-\t\tserial4 = &uart5;\n-\t\ti2c16 = &i2c0mux0ch0;\n-\t\ti2c17 = &i2c0mux0ch1;\n-\t\ti2c18 = &i2c0mux0ch2;\n-\t\ti2c19 = &i2c0mux0ch3;\n-\t\ti2c20 = &i2c1mux0ch0;\n-\t\ti2c21 = &i2c1mux0ch1;\n-\t\ti2c22 = &i2c1mux0ch2;\n-\t\ti2c23 = &i2c1mux0ch3;\n-\t\ti2c24 = &i2c4mux0ch0;\n-\t\ti2c25 = &i2c4mux0ch1;\n-\t\ti2c26 = &i2c4mux0ch2;\n-\t\ti2c27 = &i2c4mux0ch3;\n-\t\ti2c28 = &i2c4mux0ch4;\n-\t\ti2c29 = &i2c4mux0ch5;\n-\t\ti2c30 = &i2c4mux0ch6;\n-\t\ti2c31 = &i2c4mux0ch7;\n-\t\ti2c32 = &i2c8mux0ch0;\n-\t\ti2c33 = &i2c8mux0ch1;\n-\t\ti2c34 = &i2c8mux0ch2;\n-\t\ti2c35 = &i2c8mux0ch3;\n-\t\ti2c36 = &i2c10mux0ch0;\n-\t\ti2c37 = &i2c10mux0ch1;\n-\t\ti2c38 = &i2c10mux0ch2;\n-\t\ti2c39 = &i2c10mux0ch3;\n-\t\ti2c40 = &i2c10mux0ch4;\n-\t\ti2c41 = &i2c10mux0ch5;\n-\t\ti2c42 = &i2c10mux0ch6;\n-\t\ti2c43 = &i2c10mux0ch7;\n-\t\ti2c44 = &i2c11mux0ch0;\n-\t\ti2c45 = &i2c11mux0ch1;\n-\t\ti2c46 = &i2c11mux0ch2;\n-\t\ti2c47 = &i2c11mux0ch3;\n-\t\ti2c48 = &i2c11mux0ch4;\n-\t\ti2c49 = &i2c11mux0ch5;\n-\t\ti2c50 = &i2c11mux0ch6;\n-\t\ti2c51 = &i2c11mux0ch7;\n-\t\ti2c52 = &i2c13mux0ch0;\n-\t\ti2c53 = &i2c13mux0ch1;\n-\t\ti2c54 = &i2c13mux0ch2;\n-\t\ti2c55 = &i2c13mux0ch3;\n-\t\ti2c56 = &i2c13mux0ch4;\n-\t\ti2c57 = &i2c13mux0ch5;\n-\t\ti2c58 = &i2c13mux0ch6;\n-\t\ti2c59 = &i2c13mux0ch7;\n-\t};\n-\n-\tchosen {\n-\t\tstdout-path = \"serial4:57600n8\";\n-\t};\n-\n-\tiio-hwmon {\n-\t\tcompatible = \"iio-hwmon\";\n-\t\tio-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>,\n-\t\t\t\t <&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>,\n-\t\t\t\t <&adc1 2>;\n-\t};\n-\n-\tleds {\n-\t\tcompatible = \"gpio-leds\";\n-\n-\t\tled-0 {\n-\t\t\tlabel = \"bmc_heartbeat_amber\";\n-\t\t\tgpios = <&gpio0 ASPEED_GPIO(P, 7) GPIO_ACTIVE_LOW>;\n-\t\t\tlinux,default-trigger = \"heartbeat\";\n-\t\t};\n-\n-\t\tled-1 {\n-\t\t\tlabel = \"fp_id_amber\";\n-\t\t\tdefault-state = \"off\";\n-\t\t\tgpios = <&gpio0 ASPEED_GPIO(B, 5) GPIO_ACTIVE_HIGH>;\n-\t\t};\n-\t};\n-\n-\tmemory@80000000 {\n-\t\tdevice_type = \"memory\";\n-\t\treg = <0x80000000 0x80000000>;\n-\t};\n-\n-\treserved-memory {\n-\t\t#address-cells = <1>;\n-\t\t#size-cells = <1>;\n-\t\tranges;\n-\n-\t\tvideo_engine_memory: video {\n-\t\t\tsize = <0x02c00000>;\n-\t\t\talignment = <0x00100000>;\n-\t\t\tcompatible = \"shared-dma-pool\";\n-\t\t\treusable;\n-\t\t};\n-\n-\t\tgfx_memory: framebuffer {\n-\t\t\tsize = <0x01000000>;\n-\t\t\talignment = <0x01000000>;\n-\t\t\tcompatible = \"shared-dma-pool\";\n-\t\t\treusable;\n-\t\t};\n-\t};\n-\n-\tp3v3_bmc_aux: regulator-p3v3-bmc-aux {\n-\t\tcompatible = \"regulator-fixed\";\n-\t\tregulator-name = \"p3v3_bmc_aux\";\n-\t\tregulator-min-microvolt = <3300000>;\n-\t\tregulator-max-microvolt = <3300000>;\n-\t\tregulator-always-on;\n-\t};\n-\n-\tspi_gpio: spi {\n-\t\tcompatible = \"spi-gpio\";\n-\t\t#address-cells = <1>;\n-\t\t#size-cells = <0>;\n-\n-\t\tsck-gpios = <&gpio0 ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH>;\n-\t\tmosi-gpios = <&gpio0 ASPEED_GPIO(Z, 4) GPIO_ACTIVE_HIGH>;\n-\t\tmiso-gpios = <&gpio0 ASPEED_GPIO(Z, 5) GPIO_ACTIVE_HIGH>;\n-\t\tcs-gpios = <&gpio0 ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>;\n-\t\tnum-chipselects = <1>;\n-\t\tstatus = \"okay\";\n-\n-\t\ttpm@0 {\n-\t\t\tcompatible = \"infineon,slb9670\", \"tcg,tpm_tis-spi\";\n-\t\t\tspi-max-frequency = <33000000>;\n-\t\t\treg = <0>;\n-\t\t};\n-\t};\n-};\n-\n-&adc0 {\n-\taspeed,int-vref-microvolt = <2500000>;\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default\n-\t\t&pinctrl_adc2_default &pinctrl_adc3_default\n-\t\t&pinctrl_adc4_default &pinctrl_adc5_default\n-\t\t&pinctrl_adc6_default &pinctrl_adc7_default>;\n-\tstatus = \"okay\";\n-};\n-\n-&adc1 {\n-\taspeed,int-vref-microvolt = <2500000>;\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_adc10_default>;\n-\tstatus = \"okay\";\n-};\n-\n-&ehci1 {\n-\tstatus = \"okay\";\n-};\n-\n-&fmc {\n-\tstatus = \"okay\";\n-\n-\tflash@0 {\n-\t\tstatus = \"okay\";\n-\t\tm25p,fast-read;\n-\t\tlabel = \"bmc\";\n-\t\tspi-max-frequency = <50000000>;\n-#include \"openbmc-flash-layout-128.dtsi\"\n-\t};\n-\n-\tflash@1 {\n-\t\tstatus = \"okay\";\n-\t\tm25p,fast-read;\n-\t\tlabel = \"alt-bmc\";\n-\t\tspi-max-frequency = <50000000>;\n-\t};\n-};\n-\n-&gfx {\n-\tstatus = \"okay\";\n-\tmemory-region = <&gfx_memory>;\n-};\n-\n-&gpio0 {\n-\tgpio-line-names =\n-\n-\t/*A0-A7*/\n-\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n-\n-\t/*B0-B7*/\n-\t\"BATTERY_DETECT\", \"\", \"\", \"BMC_READY\",\n-\t\"\", \"FM_ID_LED\", \"\", \"\",\n-\n-\t/*C0-C7*/\n-\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n-\n-\t/*D0-D7*/\n-\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n-\n-\t/*E0-E7*/\n-\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n-\n-\t/*F0-F7*/\n-\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n-\n-\t/*G0-G7*/\n-\t\"FM_MUX1_SEL\", \"\", \"\", \"\",\n-\t\"\", \"\", \"FM_DEBUG_PORT_PRSNT_N\", \"FM_BMC_DBP_PRESENT_N\",\n-\n-\t/*H0-H7*/\n-\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n-\n-\t/*I0-I7*/\n-\t\"\", \"\", \"\", \"\",\n-\t\"\", \"FLASH_WP_STATUS\", \"BMC_JTAG_MUX_SEL\", \"\",\n-\n-\t/*J0-J7*/\n-\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n-\n-\t/*K0-K7*/\n-\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n-\n-\t/*L0-L7*/\n-\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n-\n-\t/*M0-M7*/\n-\t\"\", \"BMC_FRU_WP\", \"\", \"\",\n-\t\"\", \"\", \"\", \"\",\n-\n-\t/*N0-N7*/\n-\t\"LED_POSTCODE_0\", \"LED_POSTCODE_1\", \"LED_POSTCODE_2\", \"LED_POSTCODE_3\",\n-\t\"LED_POSTCODE_4\", \"LED_POSTCODE_5\", \"LED_POSTCODE_6\", \"LED_POSTCODE_7\",\n-\n-\t/*O0-O7*/\n-\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n-\n-\t/*P0-P7*/\n-\t\"PWR_BTN_BMC_BUF_N\", \"\", \"ID_RST_BTN_BMC_N\", \"\",\n-\t\"PWR_LED\", \"\", \"\", \"BMC_HEARTBEAT_N\",\n-\n-\t/*Q0-Q7*/\n-\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n-\n-\t/*R0-R7*/\n-\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n-\n-\t/*S0-S7*/\n-\t\"\", \"\", \"SYS_BMC_PWRBTN_N\", \"\",\n-\t\"\", \"\", \"\", \"RUN_POWER_FAULT\",\n-\n-\t/*T0-T7*/\n-\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n-\n-\t/*U0-U7*/\n-\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n-\n-\t/*V0-V7*/\n-\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n-\n-\t/*W0-W7*/\n-\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n-\n-\t/*X0-X7*/\n-\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n-\n-\t/*Y0-Y7*/\n-\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n-\n-\t/*Z0-Z7*/\n-\t\"SPI_BMC_TPM_CS2_N\", \"\", \"\", \"SPI_BMC_TPM_CLK\",\n-\t\"SPI_BMC_TPM_MOSI\", \"SPI_BMC_TPM_MISO\", \"\", \"\";\n-};\n-\n-&gpio1 {\n-\tgpio-line-names =\n-\t/*18A0-18A7*/\n-\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n-\n-\t/*18B0-18B7*/\n-\t\"\",\"\",\"\",\"\",\n-\t\"FM_BOARD_BMC_REV_ID0\", \"FM_BOARD_BMC_REV_ID1\",\n-\t\"FM_BOARD_BMC_REV_ID2\", \"\",\n-\n-\t/*18C0-18C7*/\n-\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n-\n-\t/*18D0-18D7*/\n-\t\"\",\"\",\"\",\"\",\"\",\"\",\"\",\"\",\n-\n-\t/*18E0-18E3*/\n-\t\"FM_BMC_PROT_LS_EN\", \"AC_PWR_BMC_BTN_N\", \"\", \"\";\n-};\n-\n-// L Bridge Board\n-&i2c0 {\n-\tstatus = \"okay\";\n-\n-\teeprom@50 {\n-\t\tcompatible = \"atmel,24c2048\";\n-\t\treg = <0x50>;\n-\t\tpagesize = <128>;\n-\t};\n-\n-\ti2c-mux@70 {\n-\t\tcompatible = \"nxp,pca9546\";\n-\t\treg = <0x70>;\n-\t\t#address-cells = <1>;\n-\t\t#size-cells = <0>;\n-\t\ti2c-mux-idle-disconnect;\n-\n-\t\ti2c0mux0ch0: i2c@0 {\n-\t\t\treg = <0>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t};\n-\t\ti2c0mux0ch1: i2c@1 {\n-\t\t\treg = <1>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t};\n-\t\ti2c0mux0ch2: i2c@2 {\n-\t\t\treg = <2>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t};\n-\t\ti2c0mux0ch3: i2c@3 {\n-\t\t\treg = <3>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t};\n-\t};\n-};\n-\n-// R Bridge Board\n-&i2c1 {\n-\tstatus = \"okay\";\n-\n-\teeprom@50 {\n-\t\tcompatible = \"atmel,24c2048\";\n-\t\treg = <0x50>;\n-\t\tpagesize = <128>;\n-\t};\n-\n-\ti2c-mux@70 {\n-\t\tcompatible = \"nxp,pca9546\";\n-\t\treg = <0x70>;\n-\t\t#address-cells = <1>;\n-\t\t#size-cells = <0>;\n-\t\ti2c-mux-idle-disconnect;\n-\n-\t\ti2c1mux0ch0: i2c@0 {\n-\t\t\treg = <0>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t};\n-\t\ti2c1mux0ch1: i2c@1 {\n-\t\t\treg = <1>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t};\n-\t\ti2c1mux0ch2: i2c@2 {\n-\t\t\treg = <2>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t};\n-\t\ti2c1mux0ch3: i2c@3 {\n-\t\t\treg = <3>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t};\n-\t};\n-};\n-\n-// MB - E1.S\n-&i2c4 {\n-\tstatus = \"okay\";\n-\n-\ti2c-mux@70 {\n-\t\tcompatible = \"nxp,pca9548\";\n-\t\treg = <0x70>;\n-\t\t#address-cells = <1>;\n-\t\t#size-cells = <0>;\n-\t\ti2c-mux-idle-disconnect;\n-\n-\t\ti2c4mux0ch0: i2c@0 {\n-\t\t\treg = <0>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t};\n-\t\ti2c4mux0ch1: i2c@1 {\n-\t\t\treg = <1>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t};\n-\t\ti2c4mux0ch2: i2c@2 {\n-\t\t\treg = <2>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t};\n-\t\ti2c4mux0ch3: i2c@3 {\n-\t\t\treg = <3>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t};\n-\t\ti2c4mux0ch4: i2c@4 {\n-\t\t\treg = <4>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t};\n-\t\ti2c4mux0ch5: i2c@5 {\n-\t\t\treg = <5>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t};\n-\t\ti2c4mux0ch6: i2c@6 {\n-\t\t\treg = <6>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t};\n-\t\ti2c4mux0ch7: i2c@7 {\n-\t\t\treg = <7>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t};\n-\t};\n-};\n-\n-// AMC\n-&i2c5 {\n-\tstatus = \"okay\";\n-};\n-\n-// MB\n-&i2c6 {\n-\tstatus = \"okay\";\n-\n-\t// HPM FRU\n-\teeprom@50 {\n-\t\tcompatible = \"atmel,24c256\";\n-\t\treg = <0x50>;\n-\t};\n-};\n-\n-// SCM\n-&i2c7 {\n-\tstatus = \"okay\";\n-\n-\n-};\n-\n-// MB - PDB\n-&i2c8 {\n-\tstatus = \"okay\";\n-\n-\ti2c-mux@72 {\n-\t\tcompatible = \"nxp,pca9546\";\n-\t\treg = <0x72>;\n-\t\t#address-cells = <1>;\n-\t\t#size-cells = <0>;\n-\t\ti2c-mux-idle-disconnect;\n-\n-\t\ti2c8mux0ch0: i2c@0 {\n-\t\t\treg = <0>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\n-\t\t\tadc@1f {\n-\t\t\t\tcompatible = \"ti,adc128d818\";\n-\t\t\t\treg = <0x1f>;\n-\t\t\t\tti,mode = /bits/ 8 <1>;\n-\t\t\t};\n-\n-\t\t\tgpio@22 {\n-\t\t\t\tcompatible = \"nxp,pca9555\";\n-\t\t\t\treg = <0x22>;\n-\t\t\t\tgpio-controller;\n-\t\t\t\t#gpio-cells = <2>;\n-\n-\t\t\t\tgpio-line-names =\n-\t\t\t\t\t\"RPDB_FAN_FULL_SPEED_R_N\", \"RPDB_I2C_TEMP75_U8_ALERT_R_N\",\n-\t\t\t\t\t\"RPDB_I2C_TMP432_U29_ALERT_R_N\", \"RPDB_GLOBAL_WP\",\n-\t\t\t\t\t\"RPDB_FAN_CT_FAN_FAIL_R_N\", \"\",\n-\t\t\t\t\t\"\", \"\",\n-\t\t\t\t\t\"RPDB_ALERT_P50V_HSC2_R_N\", \"RPDB_ALERT_P50V_HSC3_R_N\",\n-\t\t\t\t\t\"RPDB_ALERT_P50V_HSC4_R_N\", \"RPDB_ALERT_P50V_STBY_R_N\",\n-\t\t\t\t\t\"RPDB_I2C_P12V_MB_VRM_ALERT_R_N\",\n-\t\t\t\t\t\"RPDB_I2C_P12V_STBY_VRM_ALERT_R_N\",\n-\t\t\t\t\t\"RPDB_PGD_P3V3_STBY_PWRGD_R\",\n-\t\t\t\t\t\"RPDB_P12V_STBY_VRM_PWRGD_BUF_R\";\n-\t\t\t};\n-\n-\t\t\tgpio@24 {\n-\t\t\t\tcompatible = \"nxp,pca9555\";\n-\t\t\t\treg = <0x24>;\n-\t\t\t\tgpio-controller;\n-\t\t\t\t#gpio-cells = <2>;\n-\n-\t\t\t\tgpio-line-names =\n-\t\t\t\t\t\"RPDB_EAM2_PRSNT_MOS_N_R\", \"RPDB_EAM3_PRSNT_MOS_N_R\",\n-\t\t\t\t\t\"RPDB_PWRGD_P50V_HSC4_SYS_R\",\n-\t\t\t\t\t\"RPDB_PWRGD_P50V_STBY_SYS_BUF_R\",\n-\t\t\t\t\t\"RPDB_P50V_FAN1_R2_PG\", \"RPDB_P50V_FAN2_R2_PG\",\n-\t\t\t\t\t\"RPDB_P50V_FAN3_R2_PG\", \"RPDB_P50V_FAN4_R2_PG\",\n-\t\t\t\t\t\"\", \"RPDB_FAN1_PRSNT_N_R\",\n-\t\t\t\t\t\"\", \"RPDB_FAN2_PRSNT_N_R\",\n-\t\t\t\t\t\"RPDB_FAN3_PRSNT_N_R\", \"RPDB_FAN4_PRSNT_N_R\",\n-\t\t\t\t\t\"\", \"\";\n-\t\t\t};\n-\n-\t\t\t// R-PDB FRU\n-\t\t\teeprom@50 {\n-\t\t\t\tcompatible = \"atmel,24c128\";\n-\t\t\t\treg = <0x50>;\n-\t\t\t};\n-\t\t};\n-\t\ti2c8mux0ch1: i2c@1 {\n-\t\t\treg = <1>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\n-\t\t\tgpio@22 {\n-\t\t\t\tcompatible = \"nxp,pca9555\";\n-\t\t\t\treg = <0x22>;\n-\t\t\t\tgpio-controller;\n-\t\t\t\t#gpio-cells = <2>;\n-\n-\t\t\t\tgpio-line-names =\n-\t\t\t\t\t\"LPDB_FAN_FULL_SPEED_R_N\",\"LPDB_I2C_TEMP75_U8_ALERT_R_N\",\n-\t\t\t\t\t\"LPDB_I2C_TMP432_U29_ALERT_R_N\",\"LPDB_GLOBAL_WP\",\n-\t\t\t\t\t\"LPDB_FAN_CT_FAN_FAIL_R_N\",\"\",\n-\t\t\t\t\t\"\",\"\",\n-\t\t\t\t\t\"LPDB_ALERT_P50V_HSC0_R_N\",\"LPDB_ALERT_P50V_HSC1_R_N\",\n-\t\t\t\t\t\"LPDB_ALERT_P50V_HSC5_R_N\",\"LPDB_I2C_P12V_SW_VRM_ALERT_R_N\",\n-\t\t\t\t\t\"LPDB_EAM0_PRSNT_MOS_N_R\",\"LPDB_EAM1_PRSNT_MOS_N_R\",\n-\t\t\t\t\t\"LPDB_PWRGD_P50V_HSC5_SYS_R\",\"\";\n-\t\t\t};\n-\n-\t\t\tgpio@24 {\n-\t\t\t\tcompatible = \"nxp,pca9555\";\n-\t\t\t\treg = <0x24>;\n-\t\t\t\tgpio-controller;\n-\t\t\t\t#gpio-cells = <2>;\n-\n-\t\t\t\tgpio-line-names =\n-\t\t\t\t\t\"LPDB_P50V_FAN1_R2_PG\",\"LPDB_P50V_FAN2_R2_PG\",\n-\t\t\t\t\t\"LPDB_P50V_FAN3_R2_PG\",\"LPDB_P50V_FAN4_R2_PG\",\n-\t\t\t\t\t\"LPDB_P50V_FAN5_R2_PG\",\"LPDB_FAN1_PRSNT_N_R\",\n-\t\t\t\t\t\"LPDB_FAN2_PRSNT_N_R\",\"LPDB_FAN3_PRSNT_N_R\",\n-\t\t\t\t\t\"LPDB_FAN4_PRSNT_N_R\",\"LPDB_FAN5_PRSNT_N_R\",\n-\t\t\t\t\t\"\",\"\",\n-\t\t\t\t\t\"\",\"\",\n-\t\t\t\t\t\"\",\"\";\n-\t\t\t};\n-\n-\t\t\t// L-PDB FRU\n-\t\t\teeprom@50 {\n-\t\t\t\tcompatible = \"atmel,24c128\";\n-\t\t\t\treg = <0x50>;\n-\t\t\t};\n-\t\t};\n-\t\ti2c8mux0ch2: i2c@2 {\n-\t\t\treg = <2>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t};\n-\t\ti2c8mux0ch3: i2c@3 {\n-\t\t\treg = <3>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t};\n-\t};\n-};\n-\n-// SCM\n-&i2c9 {\n-\tstatus = \"okay\";\n-\n-\t// SCM FRU\n-\teeprom@50 {\n-\t\tcompatible = \"atmel,24c128\";\n-\t\treg = <0x50>;\n-\t};\n-\n-\t// BSM FRU\n-\teeprom@56 {\n-\t\tcompatible = \"atmel,24c64\";\n-\t\treg = <0x56>;\n-\t};\n-};\n-\n-// R Bridge Board\n-&i2c10 {\n-\tstatus = \"okay\";\n-\n-\ti2c-mux@71 {\n-\t\tcompatible = \"nxp,pca9548\";\n-\t\treg = <0x71>;\n-\t\t#address-cells = <1>;\n-\t\t#size-cells = <0>;\n-\t\ti2c-mux-idle-disconnect;\n-\n-\t\ti2c10mux0ch0: i2c@0 {\n-\t\t\treg = <0>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t};\n-\t\ti2c10mux0ch1: i2c@1 {\n-\t\t\treg = <1>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t};\n-\t\ti2c10mux0ch2: i2c@2 {\n-\t\t\treg = <2>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t};\n-\t\ti2c10mux0ch3: i2c@3 {\n-\t\t\treg = <3>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t};\n-\t\ti2c10mux0ch4: i2c@4 {\n-\t\t\treg = <4>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t};\n-\t\ti2c10mux0ch5: i2c@5 {\n-\t\t\treg = <5>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\n-\t\t\tgpio@22 {\n-\t\t\t\tcompatible = \"nxp,pca9555\";\n-\t\t\t\treg = <0x22>;\n-\t\t\t\tgpio-controller;\n-\t\t\t\t#gpio-cells = <2>;\n-\n-\t\t\t\tgpio-line-names =\n-\t\t\t\t\t\"\",\"\",\n-\t\t\t\t\t\"\",\"RBB_CPLD_REFRESH_IN_PRGRS_R_L\",\n-\t\t\t\t\t\"RBB_EAM0_NIC_CBL_PRSNT_R_L\",\"RBB_EAM1_NIC_CBL_PRSNT_R_L\",\n-\t\t\t\t\t\"RBB_AINIC_JTAG_MUX_R2_SEL\",\"RBB_SPI_MUX0_R2_SEL\",\n-\t\t\t\t\t\"RBB_AINIC_PRSNT_R_L\",\"RBB_AINIC_OE_R_N\",\n-\t\t\t\t\t\"RBB_AINIC_BOARD_R2_ID\",\"RBB_RST_USB2_HUB_R_N\",\n-\t\t\t\t\t\"RBB_RST_FT4222_R_N\",\"RBB_RST_MCP2210_R_N\",\n-\t\t\t\t\t\"\",\"\";\n-\t\t\t};\n-\n-\t\t\t// R Bridge Board FRU\n-\t\t\teeprom@52 {\n-\t\t\t\tcompatible = \"atmel,24c256\";\n-\t\t\t\treg = <0x52>;\n-\t\t\t};\n-\t\t};\n-\t\ti2c10mux0ch6: i2c@6 {\n-\t\t\treg = <6>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t};\n-\t\ti2c10mux0ch7: i2c@7 {\n-\t\t\treg = <7>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t};\n-\t};\n-};\n-\n-// L Bridge Board\n-&i2c11 {\n-\tstatus = \"okay\";\n-\n-\ti2c-mux@71 {\n-\t\tcompatible = \"nxp,pca9548\";\n-\t\treg = <0x71>;\n-\t\t#address-cells = <1>;\n-\t\t#size-cells = <0>;\n-\t\ti2c-mux-idle-disconnect;\n-\n-\t\ti2c11mux0ch0: i2c@0 {\n-\t\t\treg = <0>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t};\n-\t\ti2c11mux0ch1: i2c@1 {\n-\t\t\treg = <1>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t};\n-\t\ti2c11mux0ch2: i2c@2 {\n-\t\t\treg = <2>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t};\n-\t\ti2c11mux0ch3: i2c@3 {\n-\t\t\treg = <3>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t};\n-\t\ti2c11mux0ch4: i2c@4 {\n-\t\t\treg = <4>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t};\n-\t\ti2c11mux0ch5: i2c@5 {\n-\t\t\treg = <5>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\n-\t\t\tgpio@22 {\n-\t\t\t\tcompatible = \"nxp,pca9555\";\n-\t\t\t\treg = <0x22>;\n-\t\t\t\tgpio-controller;\n-\t\t\t\t#gpio-cells = <2>;\n-\n-\t\t\t\tgpio-line-names =\n-\t\t\t\t\t\"\",\"\",\n-\t\t\t\t\t\"\",\"LBB_CPLD_REFRESH_IN_PRGRS_R_L\",\n-\t\t\t\t\t\"LBB_EAM0_NIC_CBL_PRSNT_R_L\",\"LBB_EAM1_NIC_CBL_PRSNT_R_L\",\n-\t\t\t\t\t\"LBB_AINIC_JTAG_MUX_R2_SEL\",\"LBB_SPI_MUX0_R2_SEL\",\n-\t\t\t\t\t\"LBB_AINIC_PRSNT_R_L\",\"LBB_AINIC_OE_R_N\",\n-\t\t\t\t\t\"LBB_AINIC_BOARD_R2_ID\",\"LBB_RST_USB2_HUB_R_N\",\n-\t\t\t\t\t\"LBB_RST_FT4222_R_N\",\"LBB_RST_MCP2210_R_N\",\n-\t\t\t\t\t\"\",\"\";\n-\t\t\t};\n-\n-\t\t\t// L Bridge Board FRU\n-\t\t\teeprom@52 {\n-\t\t\t\tcompatible = \"atmel,24c256\";\n-\t\t\t\treg = <0x52>;\n-\t\t\t};\n-\t\t};\n-\t\ti2c11mux0ch6: i2c@6 {\n-\t\t\treg = <6>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t};\n-\t\ti2c11mux0ch7: i2c@7 {\n-\t\t\treg = <7>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t};\n-\t};\n-};\n-\n-// Debug Card\n-&i2c12 {\n-\tstatus = \"okay\";\n-};\n-\n-// MB\n-&i2c13 {\n-\tstatus = \"okay\";\n-\n-\ti2c-mux@70 {\n-\t\tcompatible = \"nxp,pca9548\";\n-\t\treg = <0x70>;\n-\t\t#address-cells = <1>;\n-\t\t#size-cells = <0>;\n-\t\ti2c-mux-idle-disconnect;\n-\n-\t\ti2c13mux0ch0: i2c@0 {\n-\t\t\treg = <0>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t};\n-\t\ti2c13mux0ch1: i2c@1 {\n-\t\t\treg = <1>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t};\n-\t\ti2c13mux0ch2: i2c@2 {\n-\t\t\treg = <2>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t};\n-\t\ti2c13mux0ch3: i2c@3 {\n-\t\t\treg = <3>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\n-\t\t\tadc@1f {\n-\t\t\t\tcompatible = \"ti,adc128d818\";\n-\t\t\t\treg = <0x1f>;\n-\t\t\t\tti,mode = /bits/ 8 <1>;\n-\t\t\t};\n-\t\t};\n-\t\ti2c13mux0ch4: i2c@4 {\n-\t\t\treg = <4>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\n-\t\t\t// HPM BRD ID FRU\n-\t\t\teeprom@51 {\n-\t\t\t\tcompatible = \"atmel,24c256\";\n-\t\t\t\treg = <0x51>;\n-\t\t\t};\n-\t\t};\n-\t\ti2c13mux0ch5: i2c@5 {\n-\t\t\treg = <5>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t};\n-\t\ti2c13mux0ch6: i2c@6 {\n-\t\t\treg = <6>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t};\n-\t\ti2c13mux0ch7: i2c@7 {\n-\t\t\treg = <7>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\n-\t\t\tnfc@28 {\n-\t\t\t\tcompatible = \"nxp,nxp-nci-i2c\";\n-\t\t\t\treg = <0x28>;\n-\n-\t\t\t\tinterrupt-parent = <&sgpiom0>;\n-\t\t\t\tinterrupts = <156 IRQ_TYPE_LEVEL_HIGH>;\n-\n-\t\t\t\tenable-gpios = <&sgpiom0 241 GPIO_ACTIVE_HIGH>;\n-\t\t\t};\n-\t\t};\n-\t};\n-};\n-\n-// SCM\n-&i2c14 {\n-\tstatus = \"okay\";\n-};\n-\n-&i2c15 {\n-\tstatus = \"okay\";\n-};\n-\n-&kcs2 {\n-\taspeed,lpc-io-reg = <0xca8>;\n-\tstatus = \"okay\";\n-};\n-\n-&kcs3 {\n-\taspeed,lpc-io-reg = <0xca2>;\n-\tstatus = \"okay\";\n-};\n-\n-&lpc_ctrl {\n-\tstatus = \"okay\";\n-};\n-\n-&mac2 {\n-\tstatus = \"okay\";\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_ncsi3_default>;\n-\tuse-ncsi;\n-};\n-\n-&sgpiom0 {\n-\tngpios = <128>;\n-\tbus-frequency = <2000000>;\n-\tgpio-line-names =\n-\t/*in - out - in - out */\n-\t/* A0-A7 line 0-15 */\n-\t\"\", \"FM_CPU0_SYS_RESET_N\", \"\", \"CPU0_KBRST_N\",\n-\t\"\", \"FM_CPU0_PROCHOT_trigger_N\", \"\", \"FM_CLR_CMOS_R_P0\",\n-\t\"\", \"Force_I3C_SEL\", \"\", \"SYSTEM_Force_Run_AC_Cycle\",\n-\t\"\", \"\", \"\", \"\",\n-\n-\t/* B0-B7 line 16-31 */\n-\t\"Channel0_leakage_EAM3\", \"FM_CPU_FPGA_JTAG_MUX_SEL\",\n-\t\"Channel1_leakage_EAM0\", \"FM_SCM_JTAG_MUX_SEL\",\n-\t\"Channel2_leakage_Manifold1\", \"FM_BRIDGE_JTAG_MUX_SEL\",\n-\t\"Channel3_leakage\", \"FM_CPU0_NMI_SYNC_FLOOD_N\",\n-\t\"Channel4_leakage_Manifold2\", \"\",\n-\t\"Channel5_leakage_EAM1\", \"\",\n-\t\"Channel6_leakage_CPU_DIMM\", \"\",\n-\t\"Channel7_leakage_EAM2\", \"\",\n-\n-\t/* C0-C7 line 32-47 */\n-\t\"RSVD_RMC_GPIO3\", \"\", \"\", \"\",\n-\t\"\", \"\", \"\", \"\",\n-\t\"LEAK_DETECT_RMC_N\", \"\", \"\", \"\",\n-\t\"\", \"\", \"\", \"\",\n-\n-\t/* D0-D7 line 48-63 */\n-\t\"PWRGD_PDB_EAMHSC0_CPLD_PG_R\", \"\",\n-\t\"PWRGD_PDB_EAMHSC1_CPLD_PG_R\", \"\",\n-\t\"PWRGD_PDB_EAMHSC2_CPLD_PG_R\", \"\",\n-\t\"PWRGD_PDB_EAMHSC3_CPLD_PG_R\", \"\",\n-\t\"AMC_BRD_PRSNT_CPLD_L\", \"\", \"\", \"\",\n-\t\"\", \"\", \"\", \"\",\n-\n-\t/* E0-E7 line 64-79 */\n-\t\"AMC_PDB_EAMHSC0_CPLD_EN_R\", \"\",\n-\t\"AMC_PDB_EAMHSC1_CPLD_EN_R\", \"\",\n-\t\"AMC_PDB_EAMHSC2_CPLD_EN_R\", \"\",\n-\t\"AMC_PDB_EAMHSC3_CPLD_EN_R\", \"\",\n-\t\"\", \"\", \"\", \"\",\n-\t\"\", \"\", \"\", \"\",\n-\n-\t/* F0-F7 line 80-95 */\n-\t\"PWRGD_PVDDCR_CPU1_P0\", \"SGPIO_READY\",\n-\t\"PWRGD_PVDDCR_CPU0_P0\", \"\",\n-\t\"\", \"\", \"\", \"\",\n-\t\"\", \"\", \"\", \"\",\n-\n-\t/* G0-G7 line 96-111 */\n-\t\"PWRGD_PVDDCR_SOC_P0\", \"\",\n-\t\"PWRGD_PVDDIO_P0\", \"\",\n-\t\"PWRGD_PVDDIO_MEM_S3_P0\", \"\",\n-\t\"PWRGD_CHMP_CPU0_FPGA\", \"\",\n-\t\"PWRGD_CHIL_CPU0_FPGA\", \"\",\n-\t\"PWRGD_CHEH_CPU0_FPGA\", \"\",\n-\t\"PWRGD_CHAD_CPU0_FPGA\", \"FM_BMC_READY_PLD\",\n-\t\"\", \"\",\n-\n-\t/* H0-H7 line 112-127 */\n-\t\"PWRGD_P3V3\", \"\",\n-\t\"P12V_DDR_IP_PWRGD_R\", \"\",\n-\t\"P12V_DDR_AH_PWRGD_R\", \"\",\n-\t\"PWRGD_P12V_VRM1_CPLD_PG_R\", \"\",\n-\t\"PWRGD_P12V_VRM0_CPLD_PG_R\", \"\",\n-\t\"PWRGD_PDB_HSC4_CPLD_PG_R\", \"\",\n-\t\"PWRGD_PVDD18_S5_P0_PG\", \"\",\n-\t\"PWRGD_PVDD33_S5_P0_PG\", \"\",\n-\n-\t/* I0-I7 line 128-143 */\n-\t\"EAM0_BRD_PRSNT_R_L\", \"\",\n-\t\"EAM1_BRD_PRSNT_R_L\", \"\",\n-\t\"EAM2_BRD_PRSNT_R_L\", \"\",\n-\t\"EAM3_BRD_PRSNT_R_L\", \"\",\n-\t\"EAM0_CPU_MOD_PWR_GD_R\", \"\",\n-\t\"EAM1_CPU_MOD_PWR_GD_R\", \"\",\n-\t\"EAM2_CPU_MOD_PWR_GD_R\", \"\",\n-\t\"EAM3_CPU_MOD_PWR_GD_R\", \"\",\n-\n-\t/* J0-J7 line 144-159 */\n-\t\"PRSNT_L_BIRDGE_R\", \"\",\n-\t\"PRSNT_R_BIRDGE_R\", \"\",\n-\t\"BRIDGE_L_MAIN_PG_R\", \"\",\n-\t\"BRIDGE_R_MAIN_PG_R\", \"\",\n-\t\"BRIDGE_L_STBY_PG_R\", \"\",\n-\t\"BRIDGE_R_STBY_PG_R\", \"\",\n-\t\"\", \"\", \"\", \"\",\n-\n-\t/* K0-K7 line 160-175 */\n-\t\"ADC_I2C_ALERT_N\", \"\",\n-\t\"TEMP_I2C_ALERT_R_L\", \"\",\n-\t\"CPU0_VR_SMB_ALERT_CPLD_N\", \"\",\n-\t\"COVER_INTRUDER_R_N\", \"\",\n-\t\"HANDLE_INTRUDER_CPLD_N\", \"\",\n-\t\"IRQ_MCIO_CPLD_WAKE_R_N\", \"\",\n-\t\"APML_CPU0_ALERT_R_N\", \"\",\n-\t\"PDB_ALERT_R_N\", \"\",\n-\n-\t/* L0-L7 line 176-191 */\n-\t\"CPU0_SP7R1\", \"\", \"CPU0_SP7R2\", \"\",\n-\t\"CPU0_SP7R3\", \"\", \"CPU0_SP7R4\", \"\",\n-\t\"CPU0_CORETYPE0\", \"\", \"CPU0_CORETYPE1\", \"\",\n-\t\"CPU0_CORETYPE2\", \"\", \"FM_BIOS_POST_CMPLT_R_N\", \"\",\n-\n-\t/* M0-M7 line 192-207 */\n-\t\"EAM0_SMERR_CPLD_R_L\", \"\",\n-\t\"EAM1_SMERR_CPLD_R_L\", \"\",\n-\t\"EAM2_SMERR_CPLD_R_L\", \"\",\n-\t\"EAM3_SMERR_CPLD_R_L\", \"\",\n-\t\"CPU0_SMERR_N_R\", \"\",\n-\t\"CPU0_NV_SAVE_N_R\", \"\",\n-\t\"PDB_PWR_LOSS_CPLD_N\", \"\",\n-\t\"IRQ_BMC_SMI_ACTIVE_R_N\", \"\",\n-\n-\t/* N0-N7 line 208-223 */\n-\t\"AMCROT_BMC_S5_RDY_R\", \"\",\n-\t\"AMC_RDY_R\", \"\",\n-\t\"AMC_STBY_PGOOD_R\", \"\",\n-\t\"CPU_AMC_SLP_S5_R_L\", \"\",\n-\t\"AMC_CPU_EAMPG_R\", \"\",\n-\t\"\", \"\", \"\", \"\",\n-\n-\t/* O0-O7 line 224-239 */\n-\t\"HPM_PWR_FAIL\", \"Port80_b0\",\n-\t\"FM_DIMM_IP_FAIL\", \"Port80_b1\",\n-\t\"FM_DIMM_AH_FAIL\", \"Port80_b2\",\n-\t\"HPM_AMC_THERMTRIP_R_L\", \"Port80_b3\",\n-\t\"FM_CPU0_THERMTRIP_N\", \"Port80_b4\",\n-\t\"PVDDCR_SOC_P0_OCP_L\", \"Port80_b5\",\n-\t\"CPLD_SGPIO_RDY\", \"Port80_b6\",\n-\t\"\", \"Port80_b7\",\n-\n-\t/* P0-P7 line 240-255 */\n-\t\"CPU0_SLP_S5_N_R\", \"NFC_VEN\",\n-\t\"CPU0_SLP_S3_N_R\", \"\",\n-\t\"FM_CPU0_PWRGD\", \"\",\n-\t\"PWRGD_RMC\", \"\",\n-\t\"FM_RST_CPU0_RESET_N\", \"\",\n-\t\"FM_PWRGD_CPU0_PWROK\", \"\",\n-\t\"wS5_PWR_Ready\", \"\",\n-\t\"wS0_ON_N\", \"PWRGD_P1V0_AUX\";\n-\tstatus = \"okay\";\n-};\n-\n-// BIOS Flash\n-&spi2 {\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_spi2_default>;\n-\tstatus = \"okay\";\n-\treg = <0x1e631000 0xc4>, <0x50000000 0x8000000>;\n-\n-\tflash@0 {\n-\t\tcompatible = \"jedec,spi-nor\";\n-\t\tlabel = \"pnor\";\n-\t\tspi-max-frequency = <12000000>;\n-\t\tspi-tx-bus-width = <2>;\n-\t\tspi-rx-bus-width = <2>;\n-\t\tstatus = \"okay\";\n-\t};\n-};\n-\n-// HOST BIOS Debug\n-&uart1 {\n-\tstatus = \"okay\";\n-};\n-\n-&uart3 {\n-\tstatus = \"okay\";\n-};\n-\n-&uart4 {\n-\tstatus = \"okay\";\n-};\n-\n-// BMC Debug Console\n-&uart5 {\n-\tstatus = \"okay\";\n-};\n-\n-&uart_routing {\n-\tstatus = \"okay\";\n-};\n-\n-&uhci {\n-\tstatus = \"okay\";\n-};\n-\n-&vhub {\n-\tstatus = \"okay\";\n-\tpinctrl-names = \"default\";\n-};\n-\n-&video {\n-\tstatus = \"okay\";\n-\tmemory-region = <&video_engine_memory>;\n-};\n-\n-&wdt1 {\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pinctrl_wdtrst1_default>;\n-\taspeed,reset-type = \"soc\";\n-\taspeed,external-signal;\n-\taspeed,ext-push-pull;\n-\taspeed,ext-active-high;\n-\taspeed,ext-pulse-duration = <256>;\n-\tstatus = \"okay\";\n-};\n","prefixes":["v2","2/3"]}