{"id":2221891,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2221891/?format=json","web_url":"http://patchwork.ozlabs.org/project/sparclinux/patch/20260410120319.462206386@kernel.org/","project":{"id":10,"url":"http://patchwork.ozlabs.org/api/1.2/projects/10/?format=json","name":"Linux SPARC Development ","link_name":"sparclinux","list_id":"sparclinux.vger.kernel.org","list_email":"sparclinux@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260410120319.462206386@kernel.org>","list_archive_url":null,"date":"2026-04-10T12:20:45","name":"[28/38] mips: Select ARCH_HAS_RANDOM_ENTROPY","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"6c7f9d0f94387264235a35a56795974d0e007028","submitter":{"id":92397,"url":"http://patchwork.ozlabs.org/api/1.2/people/92397/?format=json","name":"Thomas Gleixner","email":"tglx@kernel.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/sparclinux/patch/20260410120319.462206386@kernel.org/mbox/","series":[{"id":499450,"url":"http://patchwork.ozlabs.org/api/1.2/series/499450/?format=json","web_url":"http://patchwork.ozlabs.org/project/sparclinux/list/?series=499450","date":"2026-04-10T12:18:27","name":"treewide: Cleanup LATCH, CLOCK_TICK_RATE and get_cycles() [ab]use","version":1,"mbox":"http://patchwork.ozlabs.org/series/499450/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2221891/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2221891/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","sparclinux@vger.kernel.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","patchwork-incoming@ozlabs.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=e2TX+7hq;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=ozlabs.org\n (client-ip=2404:9400:2221:ea00::3; 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arc=none smtp.client-ip=10.30.226.201"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n\ts=k20201202; t=1775823648;\n\tbh=Rixu9UkxBpBa/pCcYjAm91Mos3e7PJEWty4VuN8Giko=;\n\th=Date:From:To:Subject:References:cc:From;\n\tb=e2TX+7hqQyBiWzo8NI5NRXrCTX+aQLO1om6YbdKnBp1t6r+3gdVVwFgSRp0YguQNn\n\t Jlc+qQUu+TDLRhNxs0vDUgKc/64bw4Xr/nrLXGcr9x8N+WxcYYAWKz/hetumLTTXiH\n\t IOZQe6vf3JeallzAbQOuDlVku9VS3q2KBCLecHsxJ+DIPpUILukw8IDg9/7PZ2ubbz\n\t C8W0nQsdyxy0TL4ubCO16dsYj5itsv1q3iQDjbYKDrJAHUzFBqI36jq5cjES+sc4w7\n\t L7ELcmmojjtISrbWTN6OaCnE72An4bb94Nrrp4eO37cDQXx+zCdhzTRuhaN3nbGiT3\n\t axWFURoe64Leg==","Date":"Fri, 10 Apr 2026 14:20:45 +0200","Message-ID":"<20260410120319.462206386@kernel.org>","User-Agent":"quilt/0.68","From":"Thomas Gleixner ","To":"LKML ","Subject":"[patch 28/38] mips: Select ARCH_HAS_RANDOM_ENTROPY","References":"<20260410120044.031381086@kernel.org>","Precedence":"bulk","X-Mailing-List":"sparclinux@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","Content-Type":"text/plain; charset=UTF-8","cc":"Arnd Bergmann ,\n x86@kernel.org,\n Lu Baolu ,\n iommu@lists.linux.dev,\n Michael Grzeschik ,\n netdev@vger.kernel.org,\n linux-wireless@vger.kernel.org,\n Herbert Xu ,\n linux-crypto@vger.kernel.org,\n Vlastimil Babka ,\n linux-mm@kvack.org,\n David Woodhouse ,\n Bernie Thompson ,\n linux-fbdev@vger.kernel.org,\n \"Theodore Tso\" ,\n linux-ext4@vger.kernel.org,\n Andrew Morton ,\n Uladzislau Rezki ,\n Marco Elver ,\n Dmitry Vyukov ,\n kasan-dev@googlegroups.com,\n Andrey Ryabinin ,\n Thomas Sailer ,\n linux-hams@vger.kernel.org,\n \"Jason A. Donenfeld\" ,\n Richard Henderson ,\n linux-alpha@vger.kernel.org,\n Russell King ,\n linux-arm-kernel@lists.infradead.org,\n Catalin Marinas ,\n Huacai Chen ,\n loongarch@lists.linux.dev,\n Geert Uytterhoeven ,\n linux-m68k@lists.linux-m68k.org,\n Dinh Nguyen ,\n Jonas Bonn ,\n linux-openrisc@vger.kernel.org,\n Helge Deller ,\n linux-parisc@vger.kernel.org,\n Michael Ellerman ,\n linuxppc-dev@lists.ozlabs.org,\n Paul Walmsley ,\n linux-riscv@lists.infradead.org,\n Heiko Carstens ,\n linux-s390@vger.kernel.org,\n \"David S. Miller\" ,\n sparclinux@vger.kernel.org","X-Spam-Status":"No, score=-1.2 required=5.0 tests=ARC_SIGNED,ARC_VALID,\n\tDKIMWL_WL_HIGH,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DMARC_PASS,\n\tMAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=disabled\n\tversion=4.0.1","X-Spam-Checker-Version":"SpamAssassin 4.0.1 (2024-03-25) on gandalf.ozlabs.org"},"content":"The only remaining usage of get_cycles() is to provide random_get_entropy().\n\nSwitch mips over to the new scheme of selecting ARCH_HAS_RANDOM_ENTROPY\nand providing random_get_entropy() in asm/random.h.\n\nAs a consequence this unearthed a nasty include dependency hell because\narbitrary code relies on a magic include of asm/timex.h. Including the\nheaders in asm/random.h turned out to be impossible as well.\n\nThe only solution for now is to uninline random_get_entropy(). Fix up all\nother dependencies on the content of asm/timex.h in those files which\nreally depend on it.\n\nRemove asm/timex.h as it has no functionality anymore.\n\nSigned-off-by: Thomas Gleixner \n---\n arch/mips/Kconfig | 1 \n arch/mips/generic/init.c | 1 \n arch/mips/include/asm/random.h | 7 +++\n arch/mips/include/asm/timex.h | 92 -----------------------------------------\n arch/mips/kernel/pm-cps.c | 1 \n arch/mips/kernel/proc.c | 1 \n arch/mips/kernel/relocate.c | 1 \n arch/mips/kernel/time.c | 53 +++++++++++++++++++++++\n arch/mips/lib/dump_tlb.c | 1 \n arch/mips/mm/cache.c | 1 \n 10 files changed, 66 insertions(+), 93 deletions(-)","diff":"--- a/arch/mips/Kconfig\n+++ b/arch/mips/Kconfig\n@@ -19,6 +19,7 @@ config MIPS\n \tselect ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST\n \tselect ARCH_HAS_UBSAN\n \tselect ARCH_HAS_GCOV_PROFILE_ALL\n+\tselect ARCH_HAS_RANDOM_ENTROPY\n \tselect ARCH_KEEP_MEMBLOCK\n \tselect ARCH_USE_BUILTIN_BSWAP\n \tselect ARCH_USE_CMPXCHG_LOCKREF if 64BIT\n--- a/arch/mips/generic/init.c\n+++ b/arch/mips/generic/init.c\n@@ -12,6 +12,7 @@\n #include \n \n #include \n+#include \n #include \n #include \n #include \n--- /dev/null\n+++ b/arch/mips/include/asm/random.h\n@@ -0,0 +1,7 @@\n+/* SPDX-License-Identifier: GPL-v2.0-only */\n+#ifndef _ASM_RANDOM_H\n+#define _ASM_RANDOM_H\n+\n+unsigned long random_get_entropy(void);\n+\n+#endif /* _ASM_RANDOM_H */\n--- a/arch/mips/include/asm/timex.h\n+++ /dev/null\n@@ -1,92 +0,0 @@\n-/*\n- * This file is subject to the terms and conditions of the GNU General Public\n- * License. See the file \"COPYING\" in the main directory of this archive\n- * for more details.\n- *\n- * Copyright (C) 1998, 1999, 2003 by Ralf Baechle\n- * Copyright (C) 2014 by Maciej W. Rozycki\n- */\n-#ifndef _ASM_TIMEX_H\n-#define _ASM_TIMEX_H\n-\n-#ifdef __KERNEL__\n-\n-#include \n-\n-#include \n-#include \n-#include \n-#include \n-\n-/*\n- * Standard way to access the cycle counter.\n- * Currently only used on SMP for scheduling.\n- *\n- * Only the low 32 bits are available as a continuously counting entity.\n- * But this only means we'll force a reschedule every 8 seconds or so,\n- * which isn't an evil thing.\n- *\n- * We know that all SMP capable CPUs have cycle counters.\n- */\n-\n-/*\n- * On R4000/R4400 an erratum exists such that if the cycle counter is\n- * read in the exact moment that it is matching the compare register,\n- * no interrupt will be generated.\n- *\n- * There is a suggested workaround and also the erratum can't strike if\n- * the compare interrupt isn't being used as the clock source device.\n- * However for now the implementation of this function doesn't get these\n- * fine details right.\n- */\n-static inline int can_use_mips_counter(unsigned int prid)\n-{\n-\tint comp = (prid & PRID_COMP_MASK) != PRID_COMP_LEGACY;\n-\n-\tif (__builtin_constant_p(cpu_has_counter) && !cpu_has_counter)\n-\t\treturn 0;\n-\telse if (__builtin_constant_p(cpu_has_mips_r) && cpu_has_mips_r)\n-\t\treturn 1;\n-\telse if (likely(!__builtin_constant_p(cpu_has_mips_r) && comp))\n-\t\treturn 1;\n-\t/* Make sure we don't peek at cpu_data[0].options in the fast path! */\n-\tif (!__builtin_constant_p(cpu_has_counter))\n-\t\tasm volatile(\"\" : \"=m\" (cpu_data[0].options));\n-\tif (likely(cpu_has_counter &&\n-\t\t prid > (PRID_IMP_R4000 | PRID_REV_ENCODE_44(15, 15))))\n-\t\treturn 1;\n-\telse\n-\t\treturn 0;\n-}\n-\n-static inline cycles_t get_cycles(void)\n-{\n-\tif (can_use_mips_counter(read_c0_prid()))\n-\t\treturn read_c0_count();\n-\telse\n-\t\treturn 0;\t/* no usable counter */\n-}\n-#define get_cycles get_cycles\n-\n-/*\n- * Like get_cycles - but where c0_count is not available we desperately\n- * use c0_random in an attempt to get at least a little bit of entropy.\n- */\n-static inline unsigned long random_get_entropy(void)\n-{\n-\tunsigned int c0_random;\n-\n-\tif (can_use_mips_counter(read_c0_prid()))\n-\t\treturn read_c0_count();\n-\n-\tif (cpu_has_3kex)\n-\t\tc0_random = (read_c0_random() >> 8) & 0x3f;\n-\telse\n-\t\tc0_random = read_c0_random() & 0x3f;\n-\treturn (random_get_entropy_fallback() << 6) | (0x3f - c0_random);\n-}\n-#define random_get_entropy random_get_entropy\n-\n-#endif /* __KERNEL__ */\n-\n-#endif /* _ASM_TIMEX_H */\n--- a/arch/mips/kernel/pm-cps.c\n+++ b/arch/mips/kernel/pm-cps.c\n@@ -13,6 +13,7 @@\n #include \n #include \n #include \n+#include \n #include \n #include \n #include \n--- a/arch/mips/kernel/proc.c\n+++ b/arch/mips/kernel/proc.c\n@@ -11,6 +11,7 @@\n #include \n #include \n #include \n+#include \n #include \n #include \n #include \n--- a/arch/mips/kernel/relocate.c\n+++ b/arch/mips/kernel/relocate.c\n@@ -13,7 +13,6 @@\n #include \n #include \n #include \n-#include \n #include \n #include \n #include \n--- a/arch/mips/kernel/time.c\n+++ b/arch/mips/kernel/time.c\n@@ -2,6 +2,7 @@\n /*\n * Copyright 2001 MontaVista Software Inc.\n * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net\n+ * Copyright (C) 1998, 1999, 2003 by Ralf Baechle\n * Copyright (c) 2003, 2004 Maciej W. Rozycki\n *\n * Common time service routines for MIPS machines.\n@@ -21,9 +22,12 @@\n #include \n #include \n \n+#include \n #include \n #include \n #include \n+#include \n+#include \n #include \n \n #ifdef CONFIG_CPU_FREQ\n@@ -150,6 +154,55 @@ static __init int cpu_has_mfc0_count_bug\n \treturn 0;\n }\n \n+\n+/*\n+ * On R4000/R4400 an erratum exists such that if the cycle counter is\n+ * read in the exact moment that it is matching the compare register,\n+ * no interrupt will be generated.\n+ *\n+ * There is a suggested workaround and also the erratum can't strike if\n+ * the compare interrupt isn't being used as the clock source device.\n+ * However for now the implementation of this function doesn't get these\n+ * fine details right.\n+ */\n+static inline int can_use_mips_counter(unsigned int prid)\n+{\n+\tint comp = (prid & PRID_COMP_MASK) != PRID_COMP_LEGACY;\n+\n+\tif (__builtin_constant_p(cpu_has_counter) && !cpu_has_counter)\n+\t\treturn 0;\n+\telse if (__builtin_constant_p(cpu_has_mips_r) && cpu_has_mips_r)\n+\t\treturn 1;\n+\telse if (likely(!__builtin_constant_p(cpu_has_mips_r) && comp))\n+\t\treturn 1;\n+\t/* Make sure we don't peek at cpu_data[0].options in the fast path! */\n+\tif (!__builtin_constant_p(cpu_has_counter))\n+\t\tasm volatile(\"\" : \"=m\" (cpu_data[0].options));\n+\tif (likely(cpu_has_counter &&\n+\t\t prid > (PRID_IMP_R4000 | PRID_REV_ENCODE_44(15, 15))))\n+\t\treturn 1;\n+\telse\n+\t\treturn 0;\n+}\n+\n+/*\n+ * Like get_cycles - but where c0_count is not available we desperately\n+ * use c0_random in an attempt to get at least a little bit of entropy.\n+ */\n+unsigned long random_get_entropy(void)\n+{\n+\tunsigned int c0_random;\n+\n+\tif (can_use_mips_counter(read_c0_prid()))\n+\t\treturn read_c0_count();\n+\n+\tif (cpu_has_3kex)\n+\t\tc0_random = (read_c0_random() >> 8) & 0x3f;\n+\telse\n+\t\tc0_random = read_c0_random() & 0x3f;\n+\treturn (random_get_entropy_fallback() << 6) | (0x3f - c0_random);\n+}\n+\n void __init time_init(void)\n {\n \tplat_time_init();\n--- a/arch/mips/lib/dump_tlb.c\n+++ b/arch/mips/lib/dump_tlb.c\n@@ -8,6 +8,7 @@\n #include \n #include \n \n+#include \n #include \n #include \n #include \n--- a/arch/mips/mm/cache.c\n+++ b/arch/mips/mm/cache.c\n@@ -22,6 +22,7 @@\n #include \n #include \n #include \n+#include \n #include \n #include \n \n","prefixes":["28/38"]}