{"id":2221765,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2221765/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/patch/20260410103005.163128-2-krzysztof.kozlowski@oss.qualcomm.com/","project":{"id":42,"url":"http://patchwork.ozlabs.org/api/1.2/projects/42/?format=json","name":"Linux GPIO development","link_name":"linux-gpio","list_id":"linux-gpio.vger.kernel.org","list_email":"linux-gpio@vger.kernel.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260410103005.163128-2-krzysztof.kozlowski@oss.qualcomm.com>","list_archive_url":null,"date":"2026-04-10T10:30:06","name":"pinctrl: tegra: Enable easier compile testing","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"424d8766fd98a2674a3380f87d8433098fe64b54","submitter":{"id":92171,"url":"http://patchwork.ozlabs.org/api/1.2/people/92171/?format=json","name":"Krzysztof Kozlowski","email":"krzysztof.kozlowski@oss.qualcomm.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-gpio/patch/20260410103005.163128-2-krzysztof.kozlowski@oss.qualcomm.com/mbox/","series":[{"id":499439,"url":"http://patchwork.ozlabs.org/api/1.2/series/499439/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/list/?series=499439","date":"2026-04-10T10:30:06","name":"pinctrl: tegra: Enable easier compile testing","version":1,"mbox":"http://patchwork.ozlabs.org/series/499439/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2221765/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2221765/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n <linux-gpio+bounces-34996-incoming=patchwork.ozlabs.org@vger.kernel.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-gpio@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=nag8hC+i;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=UBrVFlzW;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; 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a=openpgp;\n fpr=9BD07E0E0C51F8D59677B7541B93437D3B41629B","Content-Transfer-Encoding":"8bit","X-Proofpoint-GUID":"29_GSztwnzDjFQVqj2Nrk6smpX42J1fY","X-Authority-Analysis":"v=2.4 cv=b9aCJNGx c=1 sm=1 tr=0 ts=69d8d29f cx=c_pps\n a=nSjmGuzVYOmhOUYzIAhsAg==:117 a=gOEeR9iKwsj33Yj5oN/cWg==:17\n a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22\n a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=EUspDBNiAAAA:8\n a=0Y4yGymzkYLnMTyDTW8A:9 a=1zu1i0D7hVQfj8NKfPKu:22","X-Proofpoint-ORIG-GUID":"29_GSztwnzDjFQVqj2Nrk6smpX42J1fY","X-Proofpoint-Spam-Details-Enc":"AW1haW4tMjYwNDEwMDA5OCBTYWx0ZWRfXzAPK69eqJxTe\n wEVVtQcxoTFIEOPrZ+0ZMPvEhsaIOQeP0fs1yofOKiv15OZu8hTGbyLNQF0yRgbnaYpF6o4KgY0\n SswphBPAu//XtzJJmv05aKET6MzGGHTcscumW/wov1W8AP3qv6HndqizvBV0Kj+mN70i/DSlCL7\n exzzpgORVekyEPArmvwPBRWQ7j2JWkZYqYnBTV3wI3bIVtV9BVn3Q4R0XlPBEX5s7MpIf/lONt3\n /pXgndU3WeOlEFK/E+Bzi2cAHUw+L0gbHZNpZu8nLHOIvTdE/Ow02GCXDUhRFpS0Jbe1A+zh1RG\n VF9/YOpDyg2xjC6ZWon/aPJlO1mlFuyJFHUNjggrgr2X1YjZ9meNCkTGNfA0QTQmu9CT7LSU+hO\n AsFINYixwSjctRB7cmBoDswON4YxDlED92KxQGZDBKxuk+Ylq9bmX9OPXZ1KDHWYKZb+A2Ysdbb\n TQRZApJl3RDjis9v11g==","X-Proofpoint-Virus-Version":"vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-10_03,2026-04-09_02,2025-10-01_01","X-Proofpoint-Spam-Details":"rule=outbound_notspam policy=outbound score=0\n suspectscore=0 spamscore=0 impostorscore=0 adultscore=0 priorityscore=1501\n phishscore=0 lowpriorityscore=0 malwarescore=0 bulkscore=0 clxscore=1015\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.22.0-2604010000 definitions=main-2604100098"},"content":"Currently NVIDIA Tegra pin controller drivers cannot be compile tested,\nunless ARCH_TEGRA is selected.  That partially defeats the purpose of\ncompile testing, since ARCH_TEGRA is pulled when building platform\nkernels.  Solve it and allow compile testing independently of ARCH_TEGRA\nchoice which requires few less usual changes:\n\n1. Descent in Makefile in to drivers/pinctrl/tegra/ unconditionally,\n   because there is no menu option.\n\n2. Depend on COMMON_CLK for PINCTRL_TEGRA20, because it uses\n   clk_register_mux().\n\nSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>\n\n---\n\nNot extensively compile tested yet. Pushing so LKP will pick it up. My\nbuild tests are still in progress.\n---\n drivers/pinctrl/Makefile      |  2 +-\n drivers/pinctrl/tegra/Kconfig | 22 ++++++++++++----------\n 2 files changed, 13 insertions(+), 11 deletions(-)","diff":"diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile\nindex f7d5d5f76d0c..9d33fa28a096 100644\n--- a/drivers/pinctrl/Makefile\n+++ b/drivers/pinctrl/Makefile\n@@ -93,7 +93,7 @@ obj-y\t\t\t\t+= starfive/\n obj-$(CONFIG_PINCTRL_STM32)\t+= stm32/\n obj-y\t\t\t\t+= sunplus/\n obj-$(CONFIG_PINCTRL_SUNXI)\t+= sunxi/\n-obj-$(CONFIG_ARCH_TEGRA)\t+= tegra/\n+obj-y\t\t\t\t+= tegra/\n obj-y\t\t\t\t+= ti/\n obj-$(CONFIG_PINCTRL_UNIPHIER)\t+= uniphier/\n obj-$(CONFIG_PINCTRL_VISCONTI)\t+= visconti/\ndiff --git a/drivers/pinctrl/tegra/Kconfig b/drivers/pinctrl/tegra/Kconfig\nindex 660d101ea367..3e8789871f0f 100644\n--- a/drivers/pinctrl/tegra/Kconfig\n+++ b/drivers/pinctrl/tegra/Kconfig\n@@ -1,43 +1,45 @@\n # SPDX-License-Identifier: GPL-2.0-only\n config PINCTRL_TEGRA\n-\tbool\n+\tbool \"NVIDIA Tegra pin controllers common\" if COMPILE_TEST && !ARCH_TEGRA\n \tselect PINMUX\n \tselect PINCONF\n \n config PINCTRL_TEGRA20\n-\tbool\n+\tbool \"NVIDIA Tegra20 pin controller\" if COMPILE_TEST && !ARCH_TEGRA\n \tselect PINCTRL_TEGRA\n+\tdepends on COMMON_CLK\n \n config PINCTRL_TEGRA30\n-\tbool\n+\tbool \"NVIDIA Tegra30 pin controller\" if COMPILE_TEST && !ARCH_TEGRA\n \tselect PINCTRL_TEGRA\n \n config PINCTRL_TEGRA114\n-\tbool\n+\tbool \"NVIDIA Tegra114 pin controller\" if COMPILE_TEST && !ARCH_TEGRA\n \tselect PINCTRL_TEGRA\n \n config PINCTRL_TEGRA124\n-\tbool\n+\tbool \"NVIDIA Tegra124 pin controller\" if COMPILE_TEST && !ARCH_TEGRA\n \tselect PINCTRL_TEGRA\n \n config PINCTRL_TEGRA210\n-\tbool\n+\tbool \"NVIDIA Tegra210 pin controller\" if COMPILE_TEST && !ARCH_TEGRA\n \tselect PINCTRL_TEGRA\n \n config PINCTRL_TEGRA186\n-\tbool\n+\tbool \"NVIDIA Tegra186 pin controller\" if COMPILE_TEST && !ARCH_TEGRA\n \tselect PINCTRL_TEGRA\n \n config PINCTRL_TEGRA194\n-\tbool\n+\tbool \"NVIDIA Tegra194 pin controller\" if COMPILE_TEST && !ARCH_TEGRA\n \tselect PINCTRL_TEGRA\n \n config PINCTRL_TEGRA234\n-\tbool\n+\tbool \"NVIDIA Tegra234 pin controller\" if COMPILE_TEST && !ARCH_TEGRA\n \tselect PINCTRL_TEGRA\n \n config PINCTRL_TEGRA_XUSB\n-\tdef_bool y if ARCH_TEGRA\n+\tbool \"NVIDIA Tegra XUSB pin controller\" if COMPILE_TEST && !ARCH_TEGRA\n+\tdefault y if ARCH_TEGRA\n \tselect GENERIC_PHY\n \tselect PINCONF\n \tselect PINMUX\n","prefixes":[]}