{"id":2221643,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2221643/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260410023055.2439146-7-sherry.sun@nxp.com/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/1.2/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260410023055.2439146-7-sherry.sun@nxp.com>","list_archive_url":null,"date":"2026-04-10T02:30:49","name":"[V12,06/12] arm: dts: imx6sx: Add Root Port node and PERST property","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"1cfc0566d7798f9ef7040934b1aef468b23e8712","submitter":{"id":77063,"url":"http://patchwork.ozlabs.org/api/1.2/people/77063/?format=json","name":"Sherry Sun","email":"sherry.sun@nxp.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260410023055.2439146-7-sherry.sun@nxp.com/mbox/","series":[{"id":499380,"url":"http://patchwork.ozlabs.org/api/1.2/series/499380/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/list/?series=499380","date":"2026-04-10T02:30:43","name":"pci-imx6: Add support for parsing the reset property in new Root Port binding","version":12,"mbox":"http://patchwork.ozlabs.org/series/499380/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2221643/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2221643/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=nxp.com header.i=@nxp.com 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","To":"robh@kernel.org,\n\tkrzk+dt@kernel.org,\n\tconor+dt@kernel.org,\n\tFrank.Li@nxp.com,\n\ts.hauer@pengutronix.de,\n\tkernel@pengutronix.de,\n\tfestevam@gmail.com,\n\tlpieralisi@kernel.org,\n\tkwilczynski@kernel.org,\n\tmani@kernel.org,\n\tbhelgaas@google.com,\n\thongxing.zhu@nxp.com,\n\tl.stach@pengutronix.de","Cc":"imx@lists.linux.dev,\n\tlinux-pci@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tdevicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org","Subject":"[PATCH V12 06/12] arm: dts: imx6sx: Add Root Port node and PERST\n property","Date":"Fri, 10 Apr 2026 10:30:49 +0800","Message-Id":"<20260410023055.2439146-7-sherry.sun@nxp.com>","X-Mailer":"git-send-email 2.37.1","In-Reply-To":"<20260410023055.2439146-1-sherry.sun@nxp.com>","References":"<20260410023055.2439146-1-sherry.sun@nxp.com>","Content-Transfer-Encoding":"8bit","Content-Type":"text/plain","X-ClientProxiedBy":"SI1PR02CA0020.apcprd02.prod.outlook.com\n (2603:1096:4:1f4::9) To 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h7SQSPEVneyaYanXvPLfK17QuBfQ1zT5e7OP0gaWRr2Em0dF5l24Jnd2GVG8BQCHqTj6hDG+2F639V0WZTCnhvkF7usShxaXa1V9k08jRXh4LeqGYN6rwGx5J60q0+VUGQ/0bLVT5E1L40kLisuhFcql+XYczVLhi1dt4cOcmzXKmO0C5ms+xw1BMp7BnR6ueM7iIMbyCXhAUJMvyq5MwS/fEnAXlad+vEWmNZAardtyM8E6IvzzZGObZCvOg11vO/PoDYIkCrcQihiEoif6ISnCaud/j9AS62s2sABK/7EMCqKub1G6oOCNX+d42WxSbHWKuX4Bsf4FTzyV4zUQ6ZVskSTtlYGJAfia8ESd4WSS9rR9Vln7bYUZJOWhkZSbL+CQH3+srqQM4sVkyQjJioaIxhVIcbmATuDzhFA5MTVyR+6Is1XZ9VnjGWExs8kMkyPc8KAJWOMIrWgUaBcAzr1c3WLvwRQHgsReTAXuZ9aGW7J1861L55f6uYVyxGjj/c19NOMgE7OpYIFOsHKubNexRr3c3bXmtES6F8Ber5qHDbI0KvM7zxMImWMrBYh4iVHrbKqudYJeQJ6rbZNnBULShAnDRID+jx8Q4ywOBx0yCpJ3rXf6cjslKBTjyxb8H2yOWtdEkV8ZX6ai7VnkyIJpunErzAbXs0gRvEfgLNuoIPLDxn9zgwZgedWAmpMfLZJSQoF89AxG8fFqyUCYfq7LWpPbu10+veprrvelguAnF66F7h9o5PIm0BRp79DaE1Qen2AZcp+iLoVfiNq4rVLcdyg/tydmeXbZYhBc7JtXjCNeMxfOx8qZ6Jzg5Sb+GUDEl3uJt2ASKuCMhWsh5ebg2kowMpkLMV2cubDoDdTlq0BYLFGJttWAenIoW4fWuu5UDgZiiBWGjdS8L1NgLdFBaSRQNDHE3aS9brHc5v+d91SM9uY067c3C6v+ahpVcv3ITiseASIdNS51hA+y78c/goYI/K/C0MtwgvNSdW/zRymCO6eSgaZhLZZd1VjeuCGdRg3yLqBRpve8ixL1/retN1+CDd2Y2Q03doaKKLOOGygp+/WCMGGTuz/1brq1uxWhviY7Hqfr+LRJ2J/PWARywPciP0LdV5h4ldmpUrSSu4b6pWsxC6QSFAX2n0roeGa+IESfMAML+Wiokv3BPMQUZNQi7bAO/ztsUX+5qxrhiVamtQtLkfcePzdTN6dJSbGAc/79liEUksqzxmgzKwcEX2LxPHSqXmeFqUTB4xYSVmru2jGvb0m02gToUHoGrR9Z/fy74sujKGLNH0wHebG/Y2LZLlMnTu/F5pWin402wMoB5KrYgCXRpeSbLdYOiQkUSY0Op5gLawRuQjuTQdGVvimPoy0htm+kfWK2W2TCBFs801sE30q5E7FbytfLHwAggW++dqJV9tOx/6UFeaVALPUNKJY46Q824Xi2hEQ5caHKlTBpG/3ld7sUSjWnDaYXFGlREBtJKKEV7iPZw2Csfc7fdR0d097cv6Co47g1w0+B/5DXE0RxFkJPHlO+yCd8aS0lDad5C/l6/wEGlkb0A67GKXWNGblvcB1bzhE5ZVuL9g8huee/yBpubMcD6NUFVM8tVlYmEt2Ysi8GJ73EtR7xQJCM9YMT9Kr6nKiF/xa4/o/SgwtcDTSQKWG6xvWV6KQEUznsZSAxv+KQSxhN4mKTzPTYkx8SzySKRfH/w4AyHDBA8jwMlND7/iG86VmtmPj+aqFO9U7g4ccCDg==","X-OriginatorOrg":"nxp.com","X-MS-Exchange-CrossTenant-Network-Message-Id":"\n aa928aa2-c949-4ea1-b4b6-08de96a916e6","X-MS-Exchange-CrossTenant-AuthSource":"VI0PR04MB12114.eurprd04.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Internal","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"10 Apr 2026 02:30:11.3510\n (UTC)","X-MS-Exchange-CrossTenant-FromEntityHeader":"Hosted","X-MS-Exchange-CrossTenant-Id":"686ea1d3-bc2b-4c6f-a92c-d99c5c301635","X-MS-Exchange-CrossTenant-MailboxType":"HOSTED","X-MS-Exchange-CrossTenant-UserPrincipalName":"\n 5ykhNT3UgWOzbv+w5Jh7WqJfAuxSAy2O7g4JEcfpNk3iG0r692aA86EhHHzsoc8piFAx5Gb8UhC7ZSyz4ayUcA==","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"AS5PR04MB9826"},"content":"Since describing the PCIe PERST# property under Host Bridge node is now\ndeprecated, it is recommended to add it to the Root Port node, so\ncreating the Root Port node and add the reset-gpios property in Root\nPort.\n\nSigned-off-by: Sherry Sun \n---\n arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi | 5 +++++\n arch/arm/boot/dts/nxp/imx/imx6sx.dtsi | 11 +++++++++++\n 2 files changed, 16 insertions(+)","diff":"diff --git a/arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi b/arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi\nindex 3e238d8118fa..338de4d144b2 100644\n--- a/arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi\n+++ b/arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi\n@@ -282,11 +282,16 @@ codec: wm8962@1a {\n &pcie {\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&pinctrl_pcie>;\n+\t/* This property is deprecated, use reset-gpios from the Root Port node. */\n \treset-gpio = <&gpio2 0 GPIO_ACTIVE_LOW>;\n \tvpcie-supply = <®_pcie_gpio>;\n \tstatus = \"okay\";\n };\n \n+&pcie_port0 {\n+\treset-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;\n+};\n+\n &lcdif1 {\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&pinctrl_lcd>;\ndiff --git a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi b/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi\nindex aefae5a3a6be..5484c398aa37 100644\n--- a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi\n+++ b/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi\n@@ -1470,6 +1470,17 @@ pcie: pcie@8ffc000 {\n \t\t\tpower-domains = <&pd_disp>, <&pd_pci>;\n \t\t\tpower-domain-names = \"pcie\", \"pcie_phy\";\n \t\t\tstatus = \"disabled\";\n+\n+\t\t\tpcie_port0: pcie@0 {\n+\t\t\t\tcompatible = \"pciclass,0604\";\n+\t\t\t\tdevice_type = \"pci\";\n+\t\t\t\treg = <0x0 0x0 0x0 0x0 0x0>;\n+\t\t\t\tbus-range = <0x01 0xff>;\n+\n+\t\t\t\t#address-cells = <3>;\n+\t\t\t\t#size-cells = <2>;\n+\t\t\t\tranges;\n+\t\t\t};\n \t\t};\n \t};\n };\n","prefixes":["V12","06/12"]}