{"id":2221638,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2221638/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260410023055.2439146-11-sherry.sun@nxp.com/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/1.2/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260410023055.2439146-11-sherry.sun@nxp.com>","list_archive_url":null,"date":"2026-04-10T02:30:53","name":"[V12,10/12] arm64: dts: imx8mq: Add Root Port node and PERST property","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"4aeb9be7c34c8657dbafaf1b8c4af7321a90c570","submitter":{"id":77063,"url":"http://patchwork.ozlabs.org/api/1.2/people/77063/?format=json","name":"Sherry Sun","email":"sherry.sun@nxp.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260410023055.2439146-11-sherry.sun@nxp.com/mbox/","series":[{"id":499380,"url":"http://patchwork.ozlabs.org/api/1.2/series/499380/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/list/?series=499380","date":"2026-04-10T02:30:43","name":"pci-imx6: Add support for parsing the reset property in new Root Port binding","version":12,"mbox":"http://patchwork.ozlabs.org/series/499380/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2221638/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2221638/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=nxp.com header.i=@nxp.com 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","To":"robh@kernel.org,\n\tkrzk+dt@kernel.org,\n\tconor+dt@kernel.org,\n\tFrank.Li@nxp.com,\n\ts.hauer@pengutronix.de,\n\tkernel@pengutronix.de,\n\tfestevam@gmail.com,\n\tlpieralisi@kernel.org,\n\tkwilczynski@kernel.org,\n\tmani@kernel.org,\n\tbhelgaas@google.com,\n\thongxing.zhu@nxp.com,\n\tl.stach@pengutronix.de","Cc":"imx@lists.linux.dev,\n\tlinux-pci@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tdevicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org","Subject":"[PATCH V12 10/12] arm64: dts: imx8mq: Add Root Port node and PERST\n property","Date":"Fri, 10 Apr 2026 10:30:53 +0800","Message-Id":"<20260410023055.2439146-11-sherry.sun@nxp.com>","X-Mailer":"git-send-email 2.37.1","In-Reply-To":"<20260410023055.2439146-1-sherry.sun@nxp.com>","References":"<20260410023055.2439146-1-sherry.sun@nxp.com>","Content-Transfer-Encoding":"8bit","Content-Type":"text/plain","X-ClientProxiedBy":"SI1PR02CA0020.apcprd02.prod.outlook.com\n (2603:1096:4:1f4::9) To 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n4rqyWRu4up9vClFYNRRxw7C7Tche3hj3YE6FMmM7hFrh+uoL3W7MmpAOoEbULuRqwaH220oFVn/55IjuB2wFHoEYeySkZoSFqpCv8R4yashaXECAj543tn8YZx3FWJTzgUGX4PAlnk9Co6bj2TYEFGNkeOOwxLMTBBp/QQcqtoG6QqN3gwOD1kqjTfQj8hAQ8x7aY9IriGYVRYOIpR93QxIHuO/xXNrzkXMfrvrYnxyMpO75ZpoJDB+px7qM22jXeCG5vlIE5R8YtIjTf6DsTY+fIYChrNoBrzD2rUlKciIeilBK1ANAfSuMIoEnboZb0r/K+guZ+l+9yV8J42rB3aBX95vyHozFS/Xth1OFW7pKScCbUog9pLXdcOyRYptVWXQqKY76F7ho1GrPJhjEXYGMB/S1aIWGPIReeLLDdyfalab26NyYwNMj8h6fMKE5fXac5Z+ggyWa+1u4CKwqPeahAvlVmtIffAy2eH8emDCeElGq0qZiUJmsm2KJXxQeutoZup0Nwr97S2yBdSDvdqYjm/g0nlH44hiNMOAGA7VP7K3Cuzjvgg+6a8yCOCwIUByaFLJLFiLhi7hpdnbBuTcZ7lm14bD1w41ypDyHbWyGeIZAYaAB4OLWjCrGmMqUG7lWUVRwnuYiZQiDVvC8scQHo5xiN6mXIPpZmaU084daiPkSa3anzcBv3Iiqb04qa/trASOBXhlVeCLy4OpOECLYHqlmrA+YEJy71BkYnVf1dw3Ii6fbxSvZPLWKFNv3198AWGS6G5m5x573BB83+xGRbygNl3PIm/AT7jRW3yJfw2GfiQ3yudR+oNoN8PHdvplS64MOjCsu8MkgppK7ucuXOHGWBBrvmyK5YFyQH4EDTlBzqygCgSAF/WiFWIy0OAtSVyN7o/1nCjgfZ6nMEjKQuu1K7fDSi1rdA6HkNvjlu+lfXNwaK41+YinyBE16Puer2IbDY3DsyMAwOc84Z6laykJcqBSPRq0R1LU79aOhpwG6/zX8OiL8w+CgyKlAB7/7I3UvhjZfxMI6kqWFKG2hPiS4pZilnDU9UqsaYUhVTC527mKMcRul0jsDLxaNgkKJ7ZUSn4z90UGMPvpgZf8zBWIhDT2GQ8oh2R2u9dWyfAm9ZGUA6Qz3+pdCi9HskMvjzJOnmM8CCzrVEWuPyrC97TQOiLD3+kweT/FS65E/4+fRDdvbD1mdQ5o2Du/plxtBPTsZLXf5fHiYIZo/dd15iQPsa2PJyPZtt0rWPiU6h/Uu68n7RhXkzyaM9l057GKGeSqCKCliBE7DLrJv+yDGZEYPx8mnfbP9IDzPLh/0ke23K0rye6UqSDASuz36a/cKgHfeF/iMGK8a9LfiiTmGc91xR3tvWpZ8nQmQZ50z+FUuQHfiNDAiBNBeBeIeoO74H7hQA3X8ZRZrPVIBOQP0jJDUkhq9gpoI49uzmLNU/CH9gbq1CYeLmJHxBocprkCYzAPJdJERBWLEnBX3c/+6p8pTYDXpe9VhHoqoFrbnG3a08EjTJg73f8JLXSCPy1+JOW53OxgkbPd+aVKP0CQqjfetDQVPyp7K2xdTcYuE/sxWHiJftL+ZnWGg5Maepvx/3s3wcQxO+a6EIwUKJtttSXro/oSqCvSe7UEvK5GuSH1RRhATpf4j3f2m7LsNEr3knchplUIuVSOf/Pvpo7ct/CbtRKBW98g7ZGgGyrYUbpOrbwtwc8txgJTfWRV78Ijb96cS5hwEHDdrvG/Dw==","X-OriginatorOrg":"nxp.com","X-MS-Exchange-CrossTenant-Network-Message-Id":"\n 0db61c2c-6ac9-48e6-819f-08de96a92546","X-MS-Exchange-CrossTenant-AuthSource":"VI0PR04MB12114.eurprd04.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Internal","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"10 Apr 2026 02:30:35.4483\n (UTC)","X-MS-Exchange-CrossTenant-FromEntityHeader":"Hosted","X-MS-Exchange-CrossTenant-Id":"686ea1d3-bc2b-4c6f-a92c-d99c5c301635","X-MS-Exchange-CrossTenant-MailboxType":"HOSTED","X-MS-Exchange-CrossTenant-UserPrincipalName":"\n 0SRw35TUtpUI5e+lRlxgAuIhihsFxhbfS/zIWvO6s8xaRE6he2FytdLyITnSYEamJKHb6UCJyahs37JHxa1qeg==","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"AS5PR04MB9826"},"content":"Since describing the PCIe PERST# property under Host Bridge node is now\ndeprecated, it is recommended to add it to the Root Port node, so\ncreating the Root Port node and add the reset-gpios property in Root\nPort.\n\nSigned-off-by: Sherry Sun \n---\n arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 10 +++++++++\n arch/arm64/boot/dts/freescale/imx8mq.dtsi | 22 ++++++++++++++++++++\n 2 files changed, 32 insertions(+)","diff":"diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts\nindex d48f901487d4..e7d87ea81b69 100644\n--- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts\n+++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts\n@@ -369,6 +369,7 @@ mipi_dsi_out: endpoint {\n &pcie0 {\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&pinctrl_pcie0>;\n+\t/* This property is deprecated, use reset-gpios from the Root Port node. */\n \treset-gpio = <&gpio5 28 GPIO_ACTIVE_LOW>;\n \tclocks = <&clk IMX8MQ_CLK_PCIE1_ROOT>,\n \t\t <&pcie0_refclk>,\n@@ -389,9 +390,14 @@ &pcie0_ep {\n \tstatus = \"disabled\";\n };\n \n+&pcie0_port0 {\n+\treset-gpios = <&gpio5 28 GPIO_ACTIVE_LOW>;\n+};\n+\n &pcie1 {\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&pinctrl_pcie1>;\n+\t/* This property is deprecated, use reset-gpios from the Root Port node. */\n \treset-gpio = <&gpio5 12 GPIO_ACTIVE_LOW>;\n \tclocks = <&clk IMX8MQ_CLK_PCIE2_ROOT>,\n \t\t <&pcie0_refclk>,\n@@ -414,6 +420,10 @@ &pcie1_ep {\n \tstatus = \"disabled\";\n };\n \n+&pcie1_port0 {\n+\treset-gpios = <&gpio5 12 GPIO_ACTIVE_LOW>;\n+};\n+\n &pgc_gpu {\n \tpower-supply = <&sw1a_reg>;\n };\ndiff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi\nindex 6a25e219832c..e60872aeeb49 100644\n--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi\n+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi\n@@ -1768,6 +1768,17 @@ pcie0: pcie@33800000 {\n \t\t\tassigned-clock-rates = <250000000>, <100000000>,\n \t\t\t <10000000>;\n \t\t\tstatus = \"disabled\";\n+\n+\t\t\tpcie0_port0: pcie@0 {\n+\t\t\t\tcompatible = \"pciclass,0604\";\n+\t\t\t\tdevice_type = \"pci\";\n+\t\t\t\treg = <0x0 0x0 0x0 0x0 0x0>;\n+\t\t\t\tbus-range = <0x01 0xff>;\n+\n+\t\t\t\t#address-cells = <3>;\n+\t\t\t\t#size-cells = <2>;\n+\t\t\t\tranges;\n+\t\t\t};\n \t\t};\n \n \t\tpcie0_ep: pcie-ep@33800000 {\n@@ -1846,6 +1857,17 @@ pcie1: pcie@33c00000 {\n \t\t\tassigned-clock-rates = <250000000>, <100000000>,\n \t\t\t <10000000>;\n \t\t\tstatus = \"disabled\";\n+\n+\t\t\tpcie1_port0: pcie@0 {\n+\t\t\t\tcompatible = \"pciclass,0604\";\n+\t\t\t\tdevice_type = \"pci\";\n+\t\t\t\treg = <0x0 0x0 0x0 0x0 0x0>;\n+\t\t\t\tbus-range = <0x01 0xff>;\n+\n+\t\t\t\t#address-cells = <3>;\n+\t\t\t\t#size-cells = <2>;\n+\t\t\t\tranges;\n+\t\t\t};\n \t\t};\n \n \t\tpcie1_ep: pcie-ep@33c00000 {\n","prefixes":["V12","10/12"]}