{"id":2221634,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2221634/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260410023055.2439146-9-sherry.sun@nxp.com/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/1.2/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260410023055.2439146-9-sherry.sun@nxp.com>","list_archive_url":null,"date":"2026-04-10T02:30:51","name":"[V12,08/12] arm64: dts: imx8mm: Add Root Port node and PERST property","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"ffc89f47cf41525da5762048fbaa6ba79f00a818","submitter":{"id":77063,"url":"http://patchwork.ozlabs.org/api/1.2/people/77063/?format=json","name":"Sherry Sun","email":"sherry.sun@nxp.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260410023055.2439146-9-sherry.sun@nxp.com/mbox/","series":[{"id":499380,"url":"http://patchwork.ozlabs.org/api/1.2/series/499380/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/list/?series=499380","date":"2026-04-10T02:30:43","name":"pci-imx6: Add support for parsing the reset property in new Root Port binding","version":12,"mbox":"http://patchwork.ozlabs.org/series/499380/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2221634/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2221634/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=nxp.com header.i=@nxp.com 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","To":"robh@kernel.org,\n\tkrzk+dt@kernel.org,\n\tconor+dt@kernel.org,\n\tFrank.Li@nxp.com,\n\ts.hauer@pengutronix.de,\n\tkernel@pengutronix.de,\n\tfestevam@gmail.com,\n\tlpieralisi@kernel.org,\n\tkwilczynski@kernel.org,\n\tmani@kernel.org,\n\tbhelgaas@google.com,\n\thongxing.zhu@nxp.com,\n\tl.stach@pengutronix.de","Cc":"imx@lists.linux.dev,\n\tlinux-pci@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tdevicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org","Subject":"[PATCH V12 08/12] arm64: dts: imx8mm: Add Root Port node and PERST\n property","Date":"Fri, 10 Apr 2026 10:30:51 +0800","Message-Id":"<20260410023055.2439146-9-sherry.sun@nxp.com>","X-Mailer":"git-send-email 2.37.1","In-Reply-To":"<20260410023055.2439146-1-sherry.sun@nxp.com>","References":"<20260410023055.2439146-1-sherry.sun@nxp.com>","Content-Transfer-Encoding":"8bit","Content-Type":"text/plain","X-ClientProxiedBy":"SI1PR02CA0020.apcprd02.prod.outlook.com\n (2603:1096:4:1f4::9) To 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qoUIgRmzZGuZGqVjaFpsY2Kuda758ldEW4PPBMpOuWE9n4CK3LcXkGg8JRlM+FdEq3i4xm5FrZyHUhmaBflzFJGMWMY210L0Z3G5/+oXevBU5/BXAn6se6CET7K8QN3A353HxZUPP9i6Hp3R1TVSXmX6APFXZub9XDtcZEcJXtbMJfCnr9JuyLiEMpKfwJArdMMpFCwnE0aQQeAnSQRwpfrf9aD38VFIF45o674WwvGkAk4RC64OWZjL85+kQhmtIxmR2rcw0N4tftje5GVsP4YV9dq+xcSCUjkRUnaqa8JcY7IrLaN/6YgSgEqrb4JPaSZsWxJDiGyMx558jZTfzze5bnPTozAb/IwUaXOH1V+FbbSokNnNgtGf2UP0XabbMFEFbNF34Y2xIebvqHCVLw4+lR4yWRKVSGhX/T6jKyK7lmheQDE1NQGt7nzeViW1I9oJbA3mWpPIUKOSx+7iQ/0+vZsMq2clxWaH1yGi5m6c8CxsiuE81UKXwmiGKHkKxhVdz3ebAg0kXnqVzVhoxn1v82xIQBVGb8ZwoLAITR8Z55pz0bYGKBijgNRgLyB29ucMr205Glqh1A91RJhIqWOT5algsdv+qcVxNTFjqBbQVcOiTX3cV3iD2hhQcGLsH3NRE8bt+c29DSxW+c6drYDVprOBsHwgyAMqOL5s7qNKJDiXuwheTk3VQ0T/9JXA2RnSW4pOGRP7ob0/BB3NogjBVjUdjlPoO6x+gcocruzkiNEJ5MxAzvc7fEXlE1dFxbrit0GUEFb92BjgnvOPyNJcJEkaW26nBxKYsR14DLR2ex6h8e8fA0ercnRijtu8T3FVE7ATtFi3rfvKzqL0CTdDpA74JAgeVJNfjZ0Pa9PV21I3d4mVQRqPikpLOJgoq8AnW6NW5BxRZBhov1MLsqVZb+2s6ryUMuqRGqLwA8q9RPOekMCe9/ECf7diBFwMxDITUc3AQQlMuiMTub7/F43Vmp6bVRO8nGxaAtfYCZEGJStHY/56l3ds02XYt0JmgbC9GctHCikuxAzFQ1FCH38Xf5uuSR6VaMD9PgPFx96KRKQn6T6hn59G5pG7lgONNfYGvsJb4dcW8C5iPC1zXzsiEkusaRPBXQ1Ct2Hq0rCuU75REE+yPKwHW5g6CPYXOABAHiIHVTG+YRwqeDrCTP1ekAgekAo+LDXOm0F/clf24rc717G50am4LXpNEDN+sUtcBndCg8jbC3cZg0KdLC2m/de6Neus8YCu6gUzUdzENuNfrIosTjdFAfcLb81Nx3CRlq6AUQxFCftUam6WbPwZAaHaWOm0rdupuCvLfgxLUzOGPOlp0sFxR7zpEpSeDbG/h0TNGWSCxx+rKA2+jTCM/cDTWxn3rz88Ppj/1HQsmqQ89FA03oas1p7BBl9Q9POeJ53aG8Zw2nxnWMrCa5/b6oQdBeF3cRU/rLmJaYW6FK3trDbz5x0P45A7+xuAMsra/ZtKTk285E0y3MkRZ59xOK9ihBIvXxPMsXt1I6wI7jqaH0yThoGaxSLb5pZsihrsJhNjT1rO4O0A4zSJTBkY2sE6DbyHOXjWexzTzZTGugttmG0H6c/UScYCHJcJAwemIJqQPzS7h7Q8mTnrAhEaT3e7kkcsTP47IJZvUJC8T6rng5QR+rgmTmoixOCH+t++HcJLSSktBLbK7h6blrYKKtj8JMMlM2iCmrFgNAil5MXX5B+Lyr6H3X8igUxk5ClgofOliAgdsQs/lgk5ag==","X-OriginatorOrg":"nxp.com","X-MS-Exchange-CrossTenant-Network-Message-Id":"\n bfa23f52-89b2-4c53-0bb3-08de96a91e21","X-MS-Exchange-CrossTenant-AuthSource":"VI0PR04MB12114.eurprd04.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Internal","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"10 Apr 2026 02:30:23.2958\n (UTC)","X-MS-Exchange-CrossTenant-FromEntityHeader":"Hosted","X-MS-Exchange-CrossTenant-Id":"686ea1d3-bc2b-4c6f-a92c-d99c5c301635","X-MS-Exchange-CrossTenant-MailboxType":"HOSTED","X-MS-Exchange-CrossTenant-UserPrincipalName":"\n SjOX26X+fNZjt+gQjbJSu2FlU0J/cz+3eqx+RtKggKZu1/pqStUNLXkBOpmqHIW0Fjk/eXVuxW4mfeyq360hjQ==","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"AS5PR04MB9826"},"content":"Since describing the PCIe PERST# property under Host Bridge node is now\ndeprecated, it is recommended to add it to the Root Port node, so\ncreating the Root Port node and add the reset-gpios property in Root\nPort.\n\nSigned-off-by: Sherry Sun \n---\n arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi | 5 +++++\n arch/arm64/boot/dts/freescale/imx8mm.dtsi | 11 +++++++++++\n 2 files changed, 16 insertions(+)","diff":"diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi\nindex 8be44eaf4e1e..e03aba825c18 100644\n--- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi\n+++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi\n@@ -533,6 +533,7 @@ &pcie_phy {\n &pcie0 {\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&pinctrl_pcie0>;\n+\t/* This property is deprecated, use reset-gpios from the Root Port node. */\n \treset-gpio = <&gpio4 21 GPIO_ACTIVE_LOW>;\n \tclocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>,\n \t\t <&clk IMX8MM_CLK_PCIE1_AUX>;\n@@ -559,6 +560,10 @@ &pcie0_ep {\n \tstatus = \"disabled\";\n };\n \n+&pcie0_port0 {\n+\treset-gpios = <&gpio4 21 GPIO_ACTIVE_LOW>;\n+};\n+\n &sai2 {\n \t#sound-dai-cells = <0>;\n \tpinctrl-names = \"default\";\ndiff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi\nindex 4cc5ad01d0e2..5cf2998d396d 100644\n--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi\n+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi\n@@ -1370,6 +1370,17 @@ pcie0: pcie@33800000 {\n \t\t\tphys = <&pcie_phy>;\n \t\t\tphy-names = \"pcie-phy\";\n \t\t\tstatus = \"disabled\";\n+\n+\t\t\tpcie0_port0: pcie@0 {\n+\t\t\t\tcompatible = \"pciclass,0604\";\n+\t\t\t\tdevice_type = \"pci\";\n+\t\t\t\treg = <0x0 0x0 0x0 0x0 0x0>;\n+\t\t\t\tbus-range = <0x01 0xff>;\n+\n+\t\t\t\t#address-cells = <3>;\n+\t\t\t\t#size-cells = <2>;\n+\t\t\t\tranges;\n+\t\t\t};\n \t\t};\n \n \t\tpcie0_ep: pcie-ep@33800000 {\n","prefixes":["V12","08/12"]}