{"id":2221633,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2221633/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260410023055.2439146-8-sherry.sun@nxp.com/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/1.2/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260410023055.2439146-8-sherry.sun@nxp.com>","list_archive_url":null,"date":"2026-04-10T02:30:50","name":"[V12,07/12] arm: dts: imx7d: Add Root Port node and PERST property","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"d81cc971d362b5717c161690706966713b832286","submitter":{"id":77063,"url":"http://patchwork.ozlabs.org/api/1.2/people/77063/?format=json","name":"Sherry Sun","email":"sherry.sun@nxp.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260410023055.2439146-8-sherry.sun@nxp.com/mbox/","series":[{"id":499380,"url":"http://patchwork.ozlabs.org/api/1.2/series/499380/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/list/?series=499380","date":"2026-04-10T02:30:43","name":"pci-imx6: Add support for parsing the reset property in new Root Port binding","version":12,"mbox":"http://patchwork.ozlabs.org/series/499380/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2221633/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2221633/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=nxp.com header.i=@nxp.com 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","To":"robh@kernel.org,\n\tkrzk+dt@kernel.org,\n\tconor+dt@kernel.org,\n\tFrank.Li@nxp.com,\n\ts.hauer@pengutronix.de,\n\tkernel@pengutronix.de,\n\tfestevam@gmail.com,\n\tlpieralisi@kernel.org,\n\tkwilczynski@kernel.org,\n\tmani@kernel.org,\n\tbhelgaas@google.com,\n\thongxing.zhu@nxp.com,\n\tl.stach@pengutronix.de","Cc":"imx@lists.linux.dev,\n\tlinux-pci@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tdevicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org","Subject":"[PATCH V12 07/12] arm: dts: imx7d: Add Root Port node and PERST\n property","Date":"Fri, 10 Apr 2026 10:30:50 +0800","Message-Id":"<20260410023055.2439146-8-sherry.sun@nxp.com>","X-Mailer":"git-send-email 2.37.1","In-Reply-To":"<20260410023055.2439146-1-sherry.sun@nxp.com>","References":"<20260410023055.2439146-1-sherry.sun@nxp.com>","Content-Transfer-Encoding":"8bit","Content-Type":"text/plain","X-ClientProxiedBy":"SI1PR02CA0020.apcprd02.prod.outlook.com\n (2603:1096:4:1f4::9) To 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k5mqUMP1TzLwDoTSO47z8ZC+WtY4ACovVXn/LsXu7AaoGLamsjpiSqZtFaXRKhWib+HnFUF0+ozdfPU3FxNEMMeKrbkiL7bP2/05yym7BD6lwV2lz2IHWfRVbgrcRAFjBABKtqpdATKC8O17D02pMYtlxz8Q9TmXgaBe94NhS+W1jziOeYS5hYZJQZU3UJGio54TrvOyaZDpda9CCBZXx5B77ZtP+712+uBQq1FLDuTOb2ep8LYDgqXS7iuoFzU9FJT18Hg6M2VL82PF+7caGSO4jziOg/K9CE2ze7lUA3g9plNNebsAVxYgm33oJ6amkY1O2LxVlua5AgOCTB/eKgA5pco+TAlhfX0i1QgbBnHPVmk3ardbkOLwkRH74dn8d3iBKsCBjlucjWsU9BAjKdS3Y+ejnxATbqUuekwIP6WM5kGK7kXdV4Deo6TCX3LD1rjywGKSYhju4wlIEvBjjpWHWb2guaB/Cck/t2OT/YgQIu7LUMYSlRzQwqY+Jy57kuwwD4cafLKgFcor3NAn0hkBR25w3hIgovT0/E0hRvjCDfWqC1hlcVXYScSgwpqjbHp3GpEQcfg4Cnf8/f3Pdc3zkxWqf24hP6JJXsBThn4WGmzxJwzFoXfUZWqlKNJVECnaoDMJmkvSRU0FyI1UysJXKwOiufXRKiW5uczdbDv4zPvBeWyatRLhLItqKkivau3+UpsjoD/c+YFs+VkPyiKBx9bi3hT2bHZ/AqV2Ioti8+UtPpCsqFWVr3dKymb9L31A/n/3zhdOdkO41Ku7A19t7EfdZpoL1Fg+KkZyA3+h06XfK//kc4Xo6MjeSBXnejU9NdCA1BoWgRXOv3do23daWyPWFdF/AeAHi3cEh7E3DfCNJJt7P0cNG7De/VR/5qp4GszfNx7mm0u274g3+OFKmddEkcgMjs2VPQ5rms3rTtjY10khkfvyB8vyclH0JVL11lD9Q18sthetLhGxBtTRZNbJTRiqzvVBDOl9g9Q/Rc/IEMyYwihIHvas/37DDdaKQrgTFTLB4UsiIRhB5WHm+AdBQ2tqPfslkcyvlCy4lPpjWY7LaokgOmmcZM9mP7cEa+12zdAdYuIQh0//+F0hdJdpR6j2fMkcagjHq3PS+YJODyneNt/wZrVoXlZr9CfQGgX2Hb65EJkjd6Ah7zVWlC48PWYECGmvc2zn6A55qtGJ6AGjzbrf9PjYYM+C3aFWYarlqdLV+SfkjgmsfUf5/5fRZHiCYwaPGGQWX02pgSsz2ADGd634VtAsg0f0fr48/W1RJe41kT5qhzvdeH1dduo2gy8OSWuBQSXFI/xNHY/PB/YmcWhjws69uTN3uf352PxLacWaX+4uklsbVO20Cb/yffGtPJzzYxBU3Srkair0dn2lnx7B0U8hFkC41WFVuqB/14j5bMbQ2N+Ory6B5BHLDE+OUZCQ/7LqdeZ0tzxMpmvYXZtmTOVrMP0bSAroEng0nok10kJh0SzaKOrCQ2ysAdcYxPCrJNy7aDwHd44bFA4usf83mtt8jwZaE5j+ZEfMbkcMYYWwtkflS/GDoFag3X83mGsMhow3BhDX4hxYT7NCzKW410i9IJ7GVf5OEc58jytjz7q5tGyQ7hp0Wx3QilyOYGDLFEac4w7w3Min34CbETdk5h8ec6xqf4DngobXn73rX43lQzvqNW/ZgqmnKfa2/x4YMly3cSzcCNcfeYcZLXYoKkrCFGaKJqbw6YMuUWWL1J/JZ0YHnA==","X-OriginatorOrg":"nxp.com","X-MS-Exchange-CrossTenant-Network-Message-Id":"\n ff76b7c3-87e9-4cf4-d47e-08de96a91a89","X-MS-Exchange-CrossTenant-AuthSource":"VI0PR04MB12114.eurprd04.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Internal","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"10 Apr 2026 02:30:17.3525\n (UTC)","X-MS-Exchange-CrossTenant-FromEntityHeader":"Hosted","X-MS-Exchange-CrossTenant-Id":"686ea1d3-bc2b-4c6f-a92c-d99c5c301635","X-MS-Exchange-CrossTenant-MailboxType":"HOSTED","X-MS-Exchange-CrossTenant-UserPrincipalName":"\n osbmeQ5X4EAHBuEJfTG9b4CsUAYGuILmqQd6zTZluN7RWnWmd+qpTffxH+Qbq0H0bNQ79AwkXxvi7SfnfJMCpQ==","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"AS5PR04MB9826"},"content":"Since describing the PCIe PERST# property under Host Bridge node is now\ndeprecated, it is recommended to add it to the Root Port node, so\ncreating the Root Port node and add the reset-gpios property in Root\nPort.\n\nSigned-off-by: Sherry Sun \n---\n arch/arm/boot/dts/nxp/imx/imx7d-sdb.dts | 5 +++++\n arch/arm/boot/dts/nxp/imx/imx7d.dtsi | 11 +++++++++++\n 2 files changed, 16 insertions(+)","diff":"diff --git a/arch/arm/boot/dts/nxp/imx/imx7d-sdb.dts b/arch/arm/boot/dts/nxp/imx/imx7d-sdb.dts\nindex a370e868cafe..0046b276b8b9 100644\n--- a/arch/arm/boot/dts/nxp/imx/imx7d-sdb.dts\n+++ b/arch/arm/boot/dts/nxp/imx/imx7d-sdb.dts\n@@ -456,10 +456,15 @@ display_out: endpoint {\n };\n \n &pcie {\n+\t/* This property is deprecated, use reset-gpios from the Root Port node. */\n \treset-gpio = <&extended_io 1 GPIO_ACTIVE_LOW>;\n \tstatus = \"okay\";\n };\n \n+&pcie_port0 {\n+\treset-gpios = <&extended_io 1 GPIO_ACTIVE_LOW>;\n+};\n+\n ®_1p0d {\n \tvin-supply = <&sw2_reg>;\n };\ndiff --git a/arch/arm/boot/dts/nxp/imx/imx7d.dtsi b/arch/arm/boot/dts/nxp/imx/imx7d.dtsi\nindex d961c61a93af..3c5c1f2c1460 100644\n--- a/arch/arm/boot/dts/nxp/imx/imx7d.dtsi\n+++ b/arch/arm/boot/dts/nxp/imx/imx7d.dtsi\n@@ -155,6 +155,17 @@ pcie: pcie@33800000 {\n \t\t\treset-names = \"pciephy\", \"apps\", \"turnoff\";\n \t\t\tfsl,imx7d-pcie-phy = <&pcie_phy>;\n \t\t\tstatus = \"disabled\";\n+\n+\t\t\tpcie_port0: pcie@0 {\n+\t\t\t\tcompatible = \"pciclass,0604\";\n+\t\t\t\tdevice_type = \"pci\";\n+\t\t\t\treg = <0x0 0x0 0x0 0x0 0x0>;\n+\t\t\t\tbus-range = <0x01 0xff>;\n+\n+\t\t\t\t#address-cells = <3>;\n+\t\t\t\t#size-cells = <2>;\n+\t\t\t\tranges;\n+\t\t\t};\n \t\t};\n \t};\n };\n","prefixes":["V12","07/12"]}