{"id":2221629,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2221629/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/91c2295c6677a94ea34089a52a93487d8ff7caca.1775786729.git.weijie.gao@mediatek.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/1.2/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<91c2295c6677a94ea34089a52a93487d8ff7caca.1775786729.git.weijie.gao@mediatek.com>","list_archive_url":null,"date":"2026-04-10T02:13:34","name":"[2/2] clk: mediatek: fix parent rate lookup for fixed PLL clocks","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"3691e65b0bf5fe8eac30e18f508bd010aa7ccfb3","submitter":{"id":75269,"url":"http://patchwork.ozlabs.org/api/1.2/people/75269/?format=json","name":"Weijie Gao","email":"weijie.gao@mediatek.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/91c2295c6677a94ea34089a52a93487d8ff7caca.1775786729.git.weijie.gao@mediatek.com/mbox/","series":[{"id":499379,"url":"http://patchwork.ozlabs.org/api/1.2/series/499379/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=499379","date":"2026-04-10T02:12:57","name":"[1/2] clk: mediatek: remove redundant forward declarations","version":1,"mbox":"http://patchwork.ozlabs.org/series/499379/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2221629/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2221629/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=mediatek.com header.i=@mediatek.com header.a=rsa-sha256\n header.s=dk header.b=QJJHBxUT;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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Fri, 10 Apr 2026 10:13:36 +0800 (CST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=-1.3 required=5.0 tests=BAYES_00,DKIM_SIGNED,\n DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED,\n RCVD_IN_VALIDITY_CERTIFIED_BLOCKED,RCVD_IN_VALIDITY_RPBL_BLOCKED,\n RDNS_NONE,SPF_HELO_PASS,SPF_PASS,UNPARSEABLE_RELAY autolearn=no\n autolearn_force=no version=3.4.2","X-UUID":["e2cf950e348211f19a16598d5ca7f8ec-20260410","e2cf950e348211f19a16598d5ca7f8ec-20260410"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n d=mediatek.com;\n s=dk;\n h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From;\n bh=o9HNCRBRTU0RJBY9leCTlRpgPpb094sWNZS1u+2qORM=;\n b=QJJHBxUTpVmCpQmeOZW0M33m6NOyGrkqyBSHZcPMrPxsqXyDGlBkN1nMOt09iHqFOf/9KtAx/ZDmJd2CkiwuABJid0zNfzaoo96n4W0D9apkATilvX3jeHe7PGYYJkycnCMLAcfpDaKoDjq8OIJ+n3JO0mkvaGiTnCyWiKQG6ts=;","X-CID-P-RULE":"Release_Ham","X-CID-O-INFO":"VERSION:1.3.12, REQID:7424b1e3-c719-4f7e-aa67-b23265e37e89,\n IP:0,\n U\n RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION:\n release,TS:0","X-CID-META":"VersionHash:e7bac3a, CLOUDID:0473b0d5-060f-4ecc-9ee0-121eeeb4a682,\n B\n ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102|836|865|888|898,TC:-5,Cont\n ent:0|15|50,EDM:-3,IP:nil,URL:0,File:130,RT:0,Bulk:nil,QS:nil,BEC:-1,COL:0\n ,OSI:0,OSA:0,AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0","X-CID-BVR":"2,SSN|SDN","X-CID-BAS":"2,SSN|SDN,0,_","X-CID-FACTOR":"TF_CID_SPAM_SNR","X-CID-RHF":"D41D8CD98F00B204E9800998ECF8427E","From":"Weijie Gao ","To":"","CC":"GSS_MTK_Uboot_upstream , Tom Rini\n , Lukasz Majewski , Igor Belwon\n , David Lechner\n , Julien Stephan , Sam Shih\n , Weijie Gao ","Subject":"[PATCH 2/2] clk: mediatek: fix parent rate lookup for fixed PLL\n clocks","Date":"Fri, 10 Apr 2026 10:13:34 +0800","Message-ID":"\n <91c2295c6677a94ea34089a52a93487d8ff7caca.1775786729.git.weijie.gao@mediatek.com>","X-Mailer":"git-send-email 2.45.2","In-Reply-To":"\n ","References":"\n ","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","Content-Type":"text/plain","X-MTK":"N","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.39","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" ","X-Virus-Scanned":"clamav-milter 0.103.8 at phobos.denx.de","X-Virus-Status":"Clean"},"content":"From: Sam Shih \n\nThe refactoring in commit 00d0ff7f81bf (\"clk: mediatek: refactor parent\nrate lookup functions\") introduced a regression where fixed PLL clocks\nusing mtk_clk_fixed_pll_ops are not properly recognized as valid parents\nin the CLK_PARENT_APMIXED case.\n\nFixed PLL clocks are implemented using mtk_clk_fixed_pll_ops instead of\nmtk_clk_apmixedsys_ops, but they can also serve as parent clocks in the\nAPMIXED domain. The parent lookup function needs to check for both\ndriver ops to properly resolve the parent clock device.\n\nAdd mtk_clk_fixed_pll_ops checks alongside mtk_clk_apmixedsys_ops checks\nin mtk_find_parent_rate() to restore support for fixed PLL parent clocks.\n\nAlso refactor the grandparent lookup code to extract the repeated\ndev_get_parent(priv->parent) call into a local variable to keep lines\nunder 100 characters and pass checkpatch validation.\n\nFixes: 00d0ff7f81bf (\"clk: mediatek: refactor parent rate lookup functions\")\nSigned-off-by: Sam Shih \nSigned-off-by: Weijie Gao \n---\n drivers/clk/mediatek/clk-mtk.c | 20 +++++++++++++-------\n 1 file changed, 13 insertions(+), 7 deletions(-)","diff":"diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c\nindex 4adec4457b4..26db60dea7f 100644\n--- a/drivers/clk/mediatek/clk-mtk.c\n+++ b/drivers/clk/mediatek/clk-mtk.c\n@@ -207,20 +207,26 @@ static ulong mtk_clk_find_parent_rate(struct clk *clk, int id,\n static ulong mtk_find_parent_rate(struct mtk_clk_priv *priv, struct clk *clk,\n \t\t\t\t const int parent, u16 flags)\n {\n+\tstruct udevice *grandparent_dev;\n \tstruct udevice *parent_dev;\n \n \tswitch (flags & CLK_PARENT_MASK) {\n \tcase CLK_PARENT_APMIXED:\n \t\t/* APMIXEDSYS can be parent or grandparent. */\n-\t\tif (dev_get_driver_ops(clk->dev) == &mtk_clk_apmixedsys_ops)\n+\t\tif (dev_get_driver_ops(clk->dev) == &mtk_clk_apmixedsys_ops ||\n+\t\t dev_get_driver_ops(clk->dev) == &mtk_clk_fixed_pll_ops) {\n \t\t\tparent_dev = clk->dev;\n-\t\telse if (dev_get_driver_ops(priv->parent) == &mtk_clk_apmixedsys_ops)\n+\t\t} else if (dev_get_driver_ops(priv->parent) == &mtk_clk_apmixedsys_ops ||\n+\t\t\tdev_get_driver_ops(priv->parent) == &mtk_clk_fixed_pll_ops) {\n \t\t\tparent_dev = priv->parent;\n-\t\telse if (dev_get_driver_ops(dev_get_parent(priv->parent)) == &mtk_clk_apmixedsys_ops)\n-\t\t\tparent_dev = dev_get_parent(priv->parent);\n-\t\telse\n-\t\t\treturn -EINVAL;\n-\n+\t\t} else {\n+\t\t\tgrandparent_dev = dev_get_parent(priv->parent);\n+\t\t\tif (dev_get_driver_ops(grandparent_dev) == &mtk_clk_apmixedsys_ops ||\n+\t\t\t dev_get_driver_ops(grandparent_dev) == &mtk_clk_fixed_pll_ops)\n+\t\t\t\tparent_dev = grandparent_dev;\n+\t\t\telse\n+\t\t\t\treturn -EINVAL;\n+\t\t}\n \t\tbreak;\n \tcase CLK_PARENT_TOPCKGEN:\n \t\tif (dev_get_driver_ops(clk->dev) == &mtk_clk_topckgen_ops)\n","prefixes":["2/2"]}