{"id":2221282,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2221282/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260409-write_booster-v3-1-dd2f1c0119c8@samsung.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.2/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260409-write_booster-v3-1-dd2f1c0119c8@samsung.com>","list_archive_url":null,"date":"2026-04-09T05:37:45","name":"[v3,1/5] hw/ufs: Apply UFS 4.1 Specification","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"34aae76b91ce517105d400d3c740826b0fc801cd","submitter":{"id":93039,"url":"http://patchwork.ozlabs.org/api/1.2/people/93039/?format=json","name":"Jaemyung Lee","email":"ldc.jml@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260409-write_booster-v3-1-dd2f1c0119c8@samsung.com/mbox/","series":[{"id":499238,"url":"http://patchwork.ozlabs.org/api/1.2/series/499238/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=499238","date":"2026-04-09T05:37:44","name":"hw/ufs: Add Write Booster Support on UFS","version":3,"mbox":"http://patchwork.ozlabs.org/series/499238/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2221282/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2221282/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=A8yqOTsw;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4frpfC1JFbz1yCv\n\tfor ; Thu, 09 Apr 2026 15:39:31 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wAi5x-00053p-I2; Thu, 09 Apr 2026 01:38:25 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from ) id 1wAi5r-00052d-Va\n for qemu-devel@nongnu.org; Thu, 09 Apr 2026 01:38:20 -0400","from mail-pl1-x633.google.com ([2607:f8b0:4864:20::633])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from ) id 1wAi5p-0002oy-MU\n for qemu-devel@nongnu.org; Thu, 09 Apr 2026 01:38:19 -0400","by mail-pl1-x633.google.com with SMTP id\n d9443c01a7336-2ad9a9be502so3440605ad.0\n for ; Wed, 08 Apr 2026 22:38:17 -0700 (PDT)","from [172.17.0.5] ([168.126.243.22])\n by smtp.gmail.com with ESMTPSA id\n d9443c01a7336-2b2747a7115sm211108905ad.36.2026.04.08.22.38.13\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Wed, 08 Apr 2026 22:38:15 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=gmail.com; s=20251104; t=1775713096; x=1776317896; darn=nongnu.org;\n h=cc:to:in-reply-to:references:message-id:content-transfer-encoding\n :mime-version:subject:date:from:from:to:cc:subject:date:message-id\n :reply-to; bh=nEvvbdwpOxSnYp5j1qxcKcTTJ9o9BYKzkXwsXDSeBbU=;\n b=A8yqOTswW4mk1BwOnZ0wyuhuuJ42dCNsMg82ZgK2YUX379iwADs764RwT7qlohMwgw\n w1jGpyKYErQ4ChKvg5s72r4o7B+Bhc19RzRQ9MWqmm0aeL2WaBqRkPfJrSZkHklMkzXi\n ryBaAp0jGP9mOjxbMPFn112+LU002Btfv+l/cBiD/Ofd6wjclu4p0m3nCr61loRR116S\n 869qfyxx2RAScY8KxObYaKC8EcHB5d6OV4nd1gJUr0fYrUEVggxdDL/NZxZaQ9q6YGNz\n CtLoZ7s3Xzri1jFyLRh8M8nMjmqsckN6kNJUSzu/teJcAreMQ+J09OEOP8jwUuTUILSI\n Upvg==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20251104; t=1775713096; x=1776317896;\n h=cc:to:in-reply-to:references:message-id:content-transfer-encoding\n :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to\n :cc:subject:date:message-id:reply-to;\n bh=nEvvbdwpOxSnYp5j1qxcKcTTJ9o9BYKzkXwsXDSeBbU=;\n b=B9uQSaXOUjYPNUHaRtbDHLe964J6mYNGRqKNwVIdg5m4iuZtU0sRjUnuNATeFhXJMu\n 6HwPBfaVvYKzxfkgxW1a+LLtAhLloUnRlGfS4vVOzsiFhBo7/hiat9dUPDD/O6CUCooS\n ejVl1dqCccR12dy3d3KQiSdSB5OEPUSEh7ZRIyDy4GbrzXm2y4Sk8XYFVz0sBKQPuWGX\n zB+qC5BMExkhRO0HQF2vc80gJcTGp0IsPF+4OlsIjCReAxLYtW8g83unKDcg0k6C1BFY\n MeZBrAKil4BYBsCHMro1I77N5BfBRxoOrJSaXcHptJ6EnVOu0qWgWPVmYOct+qI6D+Ne\n nZoA==","X-Gm-Message-State":"AOJu0YxtchNt0V1dBLCwOYnhTkh3qTWJ/WYWNGNyUai8s64o+hNnmiRC\n iw6kCSF2dDXNbydu5YGf2+RdRzJfEmxhrWrIXXuCR95rnNMYy4NjztRztdZDTCKAjH4=","X-Gm-Gg":"AeBDieu03x8qjZEgGOuEXggm4PHmGfVHPjDnUveWPfLSLjUZUz5LqBT0gn11iQsZ8py\n JL3Y8eceIhM+5hdVhKdNFWeLg49nfLY9jauqyn8gDxI0Dbhq6vxxVqV+y/fHKVNBSe04namFogp\n xNLJBPLZaOuhLl6QYwEy3Or2XPXA7mjOfhtwRmKPRyGrYBNKoCfd4NH+Y99uaov+gPkphqawd5I\n GYeWZOR9e++ksOSFJnwtUeUY2eVyzCYehEUxbJmpEFBMRcx5yY6P7hUOEJZCWNUit9OmG0gD+qY\n TGHnfYRQsyZVZ/C1cFdo/vKughBAlAjg7WL755QIzrPbeRVQoNWjcPJ7U54X1Tk715eZnSY3M5b\n lmETZyBrVcOAVUgzjuNxulkjwzbWSToBLnl5ZN7FlvNpQP4tZHpexBgBVEkYlDUKokdYBtGSHKm\n 5jFa5IHFyK0emm0VwdBsFaA7vPnA7A6A==","X-Received":"by 2002:a17:903:9cf:b0:2b2:5428:ead8 with SMTP id\n d9443c01a7336-2b2c712e130mr25055395ad.0.1775713096020;\n Wed, 08 Apr 2026 22:38:16 -0700 (PDT)","From":"Jaemyung Lee ","X-Google-Original-From":"Jaemyung Lee ","Date":"Thu, 09 Apr 2026 14:37:45 +0900","Subject":"[PATCH v3 1/5] hw/ufs: Apply UFS 4.1 Specification","MIME-Version":"1.0","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"7bit","Message-Id":"<20260409-write_booster-v3-1-dd2f1c0119c8@samsung.com>","References":"<20260409-write_booster-v3-0-dd2f1c0119c8@samsung.com>","In-Reply-To":"<20260409-write_booster-v3-0-dd2f1c0119c8@samsung.com>","To":"qemu-devel@nongnu.org","Cc":"Jeuk Kim , Kevin Wolf ,\n Hanna Reitz , qemu-block@nongnu.org,\n Fabiano Rosas , Laurent Vivier ,\n Paolo Bonzini ,\n Jaemyung Lee ","X-Mailer":"b4 0.14.2","X-Developer-Signature":"v=1; a=ed25519-sha256; t=1775713090; l=12799;\n i=jaemyung.lee@samsung.com; s=20260402; h=from:subject:message-id;\n bh=CgN8ljzeml1hAPWOnqVTo/m8W7lnE0WV5YXREroYZ/Q=;\n b=+y1Y0wqekIM3FgLXEuqqDX3h67Sw8Wg4KsVRe3gagXaS8DXys70DyiVU/Bhm9ylKdmgGPI36o\n Bxb6TD6wzGGBt59M7s3hlWTu3bBZZebQA4vKQvV/1dcu+WPdb6fA/W+","X-Developer-Key":"i=jaemyung.lee@samsung.com; a=ed25519;\n pk=bZPd7A/kteUO62FfUM6IrI1LuBPe5QrcqfvsitM1ZjE=","Received-SPF":"pass client-ip=2607:f8b0:4864:20::633;\n envelope-from=ldc.jml@gmail.com; helo=mail-pl1-x633.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"Apply current UFS 4.1 Specification to QEMU-UFS.\n\nQEMU-UFS device emulates operation via UFS 4.0 Specification,\nbut current latest Spec. version is UFS 4.1. So extent internal\nDESCRIPTOR/FLAG/ATTRIBUTE declaration to follow UFS 4.1 Spec.\n\nIt does not implement any actual functionallity, but only adds\nminimum supportability for further implementation.\n\nSigned-off-by: Jaemyung Lee \n---\n hw/ufs/ufs.c | 69 ++++++++++++++++++++++++++++++++++++++++++++++++++---\n include/block/ufs.h | 59 ++++++++++++++++++++++++++++++++++++++++++---\n 2 files changed, 122 insertions(+), 6 deletions(-)","diff":"diff --git a/hw/ufs/ufs.c b/hw/ufs/ufs.c\nindex cb74cb56bc15ec6fb873097ccb1b6e5694639bd9..b2b70c8b38ebecd8d49ecce288614d55efd90f2e 100644\n--- a/hw/ufs/ufs.c\n+++ b/hw/ufs/ufs.c\n@@ -9,7 +9,7 @@\n */\n \n /**\n- * Reference Specs: https://www.jedec.org/, 4.0\n+ * Reference Specs: https://www.jedec.org/, 4.1\n *\n * Usage\n * -----\n@@ -29,8 +29,8 @@\n #include \"trace.h\"\n #include \"ufs.h\"\n \n-/* The QEMU-UFS device follows spec version 4.0 */\n-#define UFS_SPEC_VER 0x0400\n+/* The QEMU-UFS device follows spec version 4.1 */\n+#define UFS_SPEC_VER 0x0410\n #define UFS_MAX_NUTRS 32\n #define UFS_MAX_NUTMRS 8\n #define UFS_MCQ_QCFGPTR 2\n@@ -1000,6 +1000,7 @@ static const int flag_permission[UFS_QUERY_FLAG_IDN_COUNT] = {\n [UFS_QUERY_FLAG_IDN_WB_EN] = UFS_QUERY_FLAG_READ,\n [UFS_QUERY_FLAG_IDN_WB_BUFF_FLUSH_EN] = UFS_QUERY_FLAG_READ,\n [UFS_QUERY_FLAG_IDN_WB_BUFF_FLUSH_DURING_HIBERN8] = UFS_QUERY_FLAG_READ,\n+ [UFS_QUERY_FLAG_IDN_UNPIN_EN] = UFS_QUERY_FLAG_READ,\n };\n \n static inline QueryRespCode ufs_flag_check_idn_valid(uint8_t idn, int op)\n@@ -1057,10 +1058,31 @@ static const int attr_permission[UFS_QUERY_ATTR_IDN_COUNT] = {\n [UFS_QUERY_ATTR_IDN_AVAIL_WB_BUFF_SIZE] = UFS_QUERY_ATTR_READ,\n [UFS_QUERY_ATTR_IDN_WB_BUFF_LIFE_TIME_EST] = UFS_QUERY_ATTR_READ,\n [UFS_QUERY_ATTR_IDN_CURR_WB_BUFF_SIZE] = UFS_QUERY_ATTR_READ,\n+ [UFS_QUERY_ATTR_IDN_EXT_IID_EN] = UFS_QUERY_ATTR_READ,\n+ [UFS_QUERY_ATTR_IDN_HOST_HINT_CACHE_SIZE] = UFS_QUERY_ATTR_READ,\n /* refresh operation is not supported */\n [UFS_QUERY_ATTR_IDN_REFRESH_STATUS] = UFS_QUERY_ATTR_READ,\n [UFS_QUERY_ATTR_IDN_REFRESH_FREQ] = UFS_QUERY_ATTR_READ,\n [UFS_QUERY_ATTR_IDN_REFRESH_UNIT] = UFS_QUERY_ATTR_READ,\n+ [UFS_QUERY_ATTR_IDN_TIMESTAMP] = UFS_QUERY_ATTR_WRITE,\n+ [UFS_QUERY_ATTR_IDN_DEVICE_LEVEL_EXCEPTION_ID] = UFS_QUERY_ATTR_READ,\n+ /* host initiated defragmentation is not supported */\n+ [UFS_QUERY_ATTR_IDN_DEFRAG_OP] = UFS_QUERY_ATTR_READ,\n+ [UFS_QUERY_ATTR_IDN_HID_AVAIL_SIZE] = UFS_QUERY_ATTR_READ,\n+ [UFS_QUERY_ATTR_IDN_HID_SIZE] = UFS_QUERY_ATTR_READ,\n+ [UFS_QUERY_ATTR_IDN_HID_PROG_RATIO] = UFS_QUERY_ATTR_READ,\n+ [UFS_QUERY_ATTR_IDN_HID_STATE] = UFS_QUERY_ATTR_READ,\n+ [UFS_QUERY_ATTR_IDN_WB_BUFF_RESIZE_HINT] = UFS_QUERY_ATTR_READ,\n+ [UFS_QUERY_ATTR_IDN_WB_BUFF_RESIZE_EN] = UFS_QUERY_ATTR_READ,\n+ [UFS_QUERY_ATTR_IDN_WB_BUFF_RESIZE_STATUS] = UFS_QUERY_ATTR_READ,\n+ [UFS_QUERY_ATTR_IDN_WB_BUFF_PARTIAL_FLUSH_MODE] = UFS_QUERY_ATTR_READ,\n+ [UFS_QUERY_ATTR_IDN_MAX_FIFO_WB_PARTIAL_FLUSH_MODE] = UFS_QUERY_ATTR_READ,\n+ [UFS_QUERY_ATTR_IDN_CURR_FIFO_WB_PARTIAL_FLUSH_MODE] = UFS_QUERY_ATTR_READ,\n+ [UFS_QUERY_ATTR_IDN_PINNED_WB_BUFF_CURR_ALLOC_UNITS] = UFS_QUERY_ATTR_READ,\n+ [UFS_QUERY_ATTR_IDN_PINNED_WB_BUFF_AVAIL_PERCENT] = UFS_QUERY_ATTR_READ,\n+ [UFS_QUERY_ATTR_IDN_PINNED_WB_CUMM_WRITTEN_SIZE] = UFS_QUERY_ATTR_READ,\n+ [UFS_QUERY_ATTR_IDN_PINNED_WB_NUM_ALLOC_UNITS] = UFS_QUERY_ATTR_READ,\n+ [UFS_QUERY_ATTR_IDN_NON_PINNED_WB_MIN_NUM_ALLOC_UNITS] = UFS_QUERY_ATTR_READ,\n };\n \n static inline QueryRespCode ufs_attr_check_idn_valid(uint8_t idn, int op)\n@@ -1194,12 +1216,50 @@ static uint32_t ufs_read_attr_value(UfsHc *u, uint8_t idn)\n return u->attributes.wb_buffer_life_time_est;\n case UFS_QUERY_ATTR_IDN_CURR_WB_BUFF_SIZE:\n return be32_to_cpu(u->attributes.current_wb_buffer_size);\n+ case UFS_QUERY_ATTR_IDN_EXT_IID_EN:\n+ return u->attributes.ext_iid_en;\n+ case UFS_QUERY_ATTR_IDN_HOST_HINT_CACHE_SIZE:\n+ return be16_to_cpu(u->attributes.host_hint_cache_size);\n case UFS_QUERY_ATTR_IDN_REFRESH_STATUS:\n return u->attributes.refresh_status;\n case UFS_QUERY_ATTR_IDN_REFRESH_FREQ:\n return u->attributes.refresh_freq;\n case UFS_QUERY_ATTR_IDN_REFRESH_UNIT:\n return u->attributes.refresh_unit;\n+ case UFS_QUERY_ATTR_IDN_DEVICE_LEVEL_EXCEPTION_ID:\n+ return be64_to_cpu(u->attributes.device_level_exception_id);\n+ case UFS_QUERY_ATTR_IDN_DEFRAG_OP:\n+ return u->attributes.defrag_op;\n+ case UFS_QUERY_ATTR_IDN_HID_AVAIL_SIZE:\n+ return be32_to_cpu(u->attributes.hid_avail_size);\n+ case UFS_QUERY_ATTR_IDN_HID_SIZE:\n+ return be32_to_cpu(u->attributes.hid_size);\n+ case UFS_QUERY_ATTR_IDN_HID_PROG_RATIO:\n+ return u->attributes.hid_prog_ratio;\n+ case UFS_QUERY_ATTR_IDN_HID_STATE:\n+ return u->attributes.hid_state;\n+ case UFS_QUERY_ATTR_IDN_WB_BUFF_RESIZE_HINT:\n+ return u->attributes.wb_buffer_resize_hint;\n+ case UFS_QUERY_ATTR_IDN_WB_BUFF_RESIZE_EN:\n+ return u->attributes.wb_buffer_resize_en;\n+ case UFS_QUERY_ATTR_IDN_WB_BUFF_RESIZE_STATUS:\n+ return u->attributes.wb_buffer_resize_status;\n+ case UFS_QUERY_ATTR_IDN_WB_BUFF_PARTIAL_FLUSH_MODE:\n+ return u->attributes.wb_buffer_partial_flush_mode;\n+ case UFS_QUERY_ATTR_IDN_MAX_FIFO_WB_PARTIAL_FLUSH_MODE:\n+ return be32_to_cpu(u->attributes.max_fifo_wb_partial_flush_mode);\n+ case UFS_QUERY_ATTR_IDN_CURR_FIFO_WB_PARTIAL_FLUSH_MODE:\n+ return be32_to_cpu(u->attributes.curr_fifo_wb_partial_flush_mode);\n+ case UFS_QUERY_ATTR_IDN_PINNED_WB_BUFF_CURR_ALLOC_UNITS:\n+ return be32_to_cpu(u->attributes.pinned_wb_buffer_curr_alloc_units);\n+ case UFS_QUERY_ATTR_IDN_PINNED_WB_BUFF_AVAIL_PERCENT:\n+ return u->attributes.pinned_wb_buffer_avail_percent;\n+ case UFS_QUERY_ATTR_IDN_PINNED_WB_CUMM_WRITTEN_SIZE:\n+ return be32_to_cpu(u->attributes.pinned_wb_cumm_written_size);\n+ case UFS_QUERY_ATTR_IDN_PINNED_WB_NUM_ALLOC_UNITS:\n+ return be32_to_cpu(u->attributes.pinned_wb_num_alloc_units);\n+ case UFS_QUERY_ATTR_IDN_NON_PINNED_WB_MIN_NUM_ALLOC_UNITS:\n+ return be32_to_cpu(u->attributes.non_pinned_wb_min_num_alloc_units);\n }\n return 0;\n }\n@@ -1237,6 +1297,9 @@ static QueryRespCode ufs_write_attr_value(UfsHc *u, uint8_t idn, uint32_t value)\n case UFS_QUERY_ATTR_IDN_PSA_DATA_SIZE:\n u->attributes.psa_data_size = cpu_to_be32(value);\n break;\n+ case UFS_QUERY_ATTR_IDN_TIMESTAMP:\n+ u->attributes.timestamp = cpu_to_be64(value);\n+ break;\n }\n return UFS_QUERY_RESULT_SUCCESS;\n }\ndiff --git a/include/block/ufs.h b/include/block/ufs.h\nindex 04cb24324d7c5585be9df596738183e1924403fb..4dacfb776f947a285d86018add82115f148b7dd9 100644\n--- a/include/block/ufs.h\n+++ b/include/block/ufs.h\n@@ -294,7 +294,8 @@ typedef struct QEMU_PACKED DeviceDescriptor {\n uint32_t psa_max_data_size;\n uint8_t psa_state_timeout;\n uint8_t product_revision_level;\n- uint8_t reserved[36];\n+ uint8_t reserved[34];\n+ uint16_t extended_wb_support;\n uint32_t extended_ufs_features_support;\n uint8_t write_booster_buffer_preserve_user_space_en;\n uint8_t write_booster_buffer_type;\n@@ -342,6 +343,8 @@ typedef struct QEMU_PACKED GeometryDescriptor {\n uint8_t write_booster_buffer_cap_adj_fac;\n uint8_t supported_write_booster_buffer_user_space_reduction_types;\n uint8_t supported_write_booster_buffer_types;\n+ uint8_t reserved3[17];\n+ uint8_t cap_adj_fac_representation;\n } GeometryDescriptor;\n \n #define UFS_GEOMETRY_CAPACITY_SHIFT 9\n@@ -437,6 +440,8 @@ typedef struct QEMU_PACKED Flags {\n uint8_t wb_buffer_flush_en;\n uint8_t wb_buffer_flush_during_hibernate;\n uint8_t reserved4[2];\n+ uint8_t unpin_en;\n+ uint8_t reserved5[235];\n } Flags;\n \n typedef struct Attributes {\n@@ -457,6 +462,8 @@ typedef struct Attributes {\n uint16_t exception_event_status;\n uint32_t seconds_passed;\n uint16_t context_conf;\n+ uint8_t obsolete;\n+ uint8_t reserved2[2];\n uint8_t device_ffu_status;\n uint8_t psa_state;\n uint32_t psa_data_size;\n@@ -469,10 +476,34 @@ typedef struct Attributes {\n uint8_t available_wb_buffer_size;\n uint8_t wb_buffer_life_time_est;\n uint32_t current_wb_buffer_size;\n+ uint8_t reserved3[10];\n+ uint8_t ext_iid_en;\n+ uint16_t host_hint_cache_size;\n uint8_t refresh_status;\n uint8_t refresh_freq;\n uint8_t refresh_unit;\n uint8_t refresh_method;\n+ uint64_t timestamp;\n+ uint8_t reserved4[3];\n+ uint64_t device_level_exception_id;\n+ uint8_t defrag_op;\n+ uint32_t hid_avail_size;\n+ uint32_t hid_size;\n+ uint8_t hid_prog_ratio;\n+ uint8_t hid_state;\n+ uint8_t reserved5[2];\n+ uint8_t wb_buffer_resize_hint;\n+ uint8_t wb_buffer_resize_en;\n+ uint8_t wb_buffer_resize_status;\n+ uint8_t wb_buffer_partial_flush_mode;\n+ uint32_t max_fifo_wb_partial_flush_mode;\n+ uint32_t curr_fifo_wb_partial_flush_mode;\n+ uint32_t pinned_wb_buffer_curr_alloc_units;\n+ uint8_t pinned_wb_buffer_avail_percent;\n+ uint32_t pinned_wb_cumm_written_size;\n+ uint32_t pinned_wb_num_alloc_units;\n+ uint32_t non_pinned_wb_min_num_alloc_units;\n+ uint8_t reserved6[184];\n } Attributes;\n \n #define UFS_TRANSACTION_SPECIFIC_FIELD_SIZE 20\n@@ -856,6 +887,7 @@ enum flag_idn {\n UFS_QUERY_FLAG_IDN_WB_BUFF_FLUSH_DURING_HIBERN8 = 0x10,\n UFS_QUERY_FLAG_IDN_HPB_RESET = 0x11,\n UFS_QUERY_FLAG_IDN_HPB_EN = 0x12,\n+ UFS_QUERY_FLAG_IDN_UNPIN_EN = 0x13,\n UFS_QUERY_FLAG_IDN_COUNT,\n };\n \n@@ -893,9 +925,29 @@ enum attr_idn {\n UFS_QUERY_ATTR_IDN_AVAIL_WB_BUFF_SIZE = 0x1D,\n UFS_QUERY_ATTR_IDN_WB_BUFF_LIFE_TIME_EST = 0x1E,\n UFS_QUERY_ATTR_IDN_CURR_WB_BUFF_SIZE = 0x1F,\n+ UFS_QUERY_ATTR_IDN_EXT_IID_EN = 0x2A,\n+ UFS_QUERY_ATTR_IDN_HOST_HINT_CACHE_SIZE = 0x2B,\n UFS_QUERY_ATTR_IDN_REFRESH_STATUS = 0x2C,\n UFS_QUERY_ATTR_IDN_REFRESH_FREQ = 0x2D,\n UFS_QUERY_ATTR_IDN_REFRESH_UNIT = 0x2E,\n+ UFS_QUERY_ATTR_IDN_TIMESTAMP = 0x30,\n+ UFS_QUERY_ATTR_IDN_DEVICE_LEVEL_EXCEPTION_ID = 0x34,\n+ UFS_QUERY_ATTR_IDN_DEFRAG_OP = 0x35,\n+ UFS_QUERY_ATTR_IDN_HID_AVAIL_SIZE = 0x36,\n+ UFS_QUERY_ATTR_IDN_HID_SIZE = 0x37,\n+ UFS_QUERY_ATTR_IDN_HID_PROG_RATIO = 0x38,\n+ UFS_QUERY_ATTR_IDN_HID_STATE = 0x39,\n+ UFS_QUERY_ATTR_IDN_WB_BUFF_RESIZE_HINT = 0x3C,\n+ UFS_QUERY_ATTR_IDN_WB_BUFF_RESIZE_EN = 0x3D,\n+ UFS_QUERY_ATTR_IDN_WB_BUFF_RESIZE_STATUS = 0x3E,\n+ UFS_QUERY_ATTR_IDN_WB_BUFF_PARTIAL_FLUSH_MODE = 0x3F,\n+ UFS_QUERY_ATTR_IDN_MAX_FIFO_WB_PARTIAL_FLUSH_MODE = 0x40,\n+ UFS_QUERY_ATTR_IDN_CURR_FIFO_WB_PARTIAL_FLUSH_MODE = 0x41,\n+ UFS_QUERY_ATTR_IDN_PINNED_WB_BUFF_CURR_ALLOC_UNITS = 0x42,\n+ UFS_QUERY_ATTR_IDN_PINNED_WB_BUFF_AVAIL_PERCENT = 0x43,\n+ UFS_QUERY_ATTR_IDN_PINNED_WB_CUMM_WRITTEN_SIZE = 0x44,\n+ UFS_QUERY_ATTR_IDN_PINNED_WB_NUM_ALLOC_UNITS = 0x45,\n+ UFS_QUERY_ATTR_IDN_NON_PINNED_WB_MIN_NUM_ALLOC_UNITS = 0x46,\n UFS_QUERY_ATTR_IDN_COUNT,\n };\n \n@@ -1005,6 +1057,7 @@ enum device_desc_param {\n UFS_DEVICE_DESC_PARAM_PRDCT_REV = 0x2A,\n UFS_DEVICE_DESC_PARAM_HPB_VER = 0x40,\n UFS_DEVICE_DESC_PARAM_HPB_CONTROL = 0x42,\n+ UFS_DEVICE_DESC_PARAM_EXT_WB_SUP = 0x4D,\n UFS_DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP = 0x4F,\n UFS_DEVICE_DESC_PARAM_WB_PRESRV_USRSPC_EN = 0x53,\n UFS_DEVICE_DESC_PARAM_WB_TYPE = 0x54,\n@@ -1208,14 +1261,14 @@ static inline void _ufs_check_size(void)\n QEMU_BUILD_BUG_ON(sizeof(UfsMcqCqIntReg) != 12);\n QEMU_BUILD_BUG_ON(sizeof(UfsMcqOpReg) != 48);\n QEMU_BUILD_BUG_ON(sizeof(DeviceDescriptor) != 89);\n- QEMU_BUILD_BUG_ON(sizeof(GeometryDescriptor) != 87);\n+ QEMU_BUILD_BUG_ON(sizeof(GeometryDescriptor) != 105);\n QEMU_BUILD_BUG_ON(sizeof(UnitDescriptor) != 45);\n QEMU_BUILD_BUG_ON(sizeof(RpmbUnitDescriptor) != 35);\n QEMU_BUILD_BUG_ON(sizeof(PowerParametersDescriptor) != 98);\n QEMU_BUILD_BUG_ON(sizeof(InterconnectDescriptor) != 6);\n QEMU_BUILD_BUG_ON(sizeof(StringDescriptor) != 254);\n QEMU_BUILD_BUG_ON(sizeof(DeviceHealthDescriptor) != 45);\n- QEMU_BUILD_BUG_ON(sizeof(Flags) != 0x13);\n+ QEMU_BUILD_BUG_ON(sizeof(Flags) != 0xFF);\n QEMU_BUILD_BUG_ON(sizeof(UtpUpiuHeader) != 12);\n QEMU_BUILD_BUG_ON(sizeof(UtpUpiuQuery) != 276);\n QEMU_BUILD_BUG_ON(sizeof(UtpUpiuCmd) != 20);\n","prefixes":["v3","1/5"]}