{"id":2220737,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2220737/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/20260407223447.4956-3-andre.przywara@arm.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/1.2/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260407223447.4956-3-andre.przywara@arm.com>","list_archive_url":null,"date":"2026-04-07T22:34:46","name":"[2/3] sunxi: configs: enable power LEDs on 32-bit boards","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"88caae64f69946413dd44caf88a385aab563caa4","submitter":{"id":61837,"url":"http://patchwork.ozlabs.org/api/1.2/people/61837/?format=json","name":"Andre Przywara","email":"andre.przywara@arm.com"},"delegate":{"id":114289,"url":"http://patchwork.ozlabs.org/api/1.2/users/114289/?format=json","username":"apritzel","first_name":"Andre","last_name":"Przywara","email":"andre.przywara@arm.com"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/20260407223447.4956-3-andre.przywara@arm.com/mbox/","series":[{"id":499043,"url":"http://patchwork.ozlabs.org/api/1.2/series/499043/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=499043","date":"2026-04-07T22:34:45","name":"sunxi: Fix and extend SPL power LED support","version":1,"mbox":"http://patchwork.ozlabs.org/series/499043/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2220737/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2220737/checks/","tags":{},"related":[],"headers":{"Return-Path":"<u-boot-bounces@lists.denx.de>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n unprotected) header.d=arm.com header.i=@arm.com header.a=rsa-sha256\n header.s=foss header.b=sa507Fz8;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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Wed,  8 Apr 2026 00:35:05 +0200 (CEST)","from foss.arm.com (foss.arm.com [217.140.110.172])\n by phobos.denx.de (Postfix) with ESMTP id B1879840BE\n for <u-boot@lists.denx.de>; Wed,  8 Apr 2026 00:35:02 +0200 (CEST)","from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14])\n by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D76E139D7;\n Tue,  7 Apr 2026 15:34:55 -0700 (PDT)","from ryzen.fritz.box (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19])\n by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id\n 60AAC3F632; Tue,  7 Apr 2026 15:35:00 -0700 (PDT)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED,\n DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED,\n RCVD_IN_VALIDITY_CERTIFIED_BLOCKED,RCVD_IN_VALIDITY_RPBL_BLOCKED,\n SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2","DKIM-Signature":"v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss;\n t=1775601301; bh=6nBqkMZ2XRd4ASoDi9zBv2fvk8FpZxL3zJf07317qtg=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=sa507Fz8P2kaqYuNfv1NaPlIY9RniCBZOdSuCs2yAWNGrwiOHFCaM8TddOiWW6cYn\n svGRJGQlRH4fmHkEM32+cRRdwZh2Mp9x7rS/Mtp2tckqFzLJXhVUxIpQbgJp4o6CpP\n miZka/MnYTRu29R62CYIR/5uOHAosrR2SyABjCBk=","From":"Andre Przywara <andre.przywara@arm.com>","To":"u-boot@lists.denx.de","Cc":"Tom Rini <trini@konsulko.com>, Quentin Schulz <quentin.schulz@cherry.de>,\n Jernej Skrabec <jernej.skrabec@gmail.com>,\n Paul Kocialkowski <contact@paulk.fr>, linux-sunxi@lists.linux.dev","Subject":"[PATCH 2/3] sunxi: configs: enable power LEDs on 32-bit boards","Date":"Wed,  8 Apr 2026 00:34:46 +0200","Message-ID":"<20260407223447.4956-3-andre.przywara@arm.com>","X-Mailer":"git-send-email 2.46.4","In-Reply-To":"<20260407223447.4956-1-andre.przywara@arm.com>","References":"<20260407223447.4956-1-andre.przywara@arm.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.39","Precedence":"list","List-Id":"U-Boot discussion <u-boot.lists.denx.de>","List-Unsubscribe":"<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>","List-Archive":"<https://lists.denx.de/pipermail/u-boot/>","List-Post":"<mailto:u-boot@lists.denx.de>","List-Help":"<mailto:u-boot-request@lists.denx.de?subject=help>","List-Subscribe":"<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" <u-boot-bounces@lists.denx.de>","X-Virus-Scanned":"clamav-milter 0.103.8 at phobos.denx.de","X-Virus-Status":"Clean"},"content":"We recently gained a simple way to enable a power LED very early in the\nSPL boot, through simple Kconfig variables.\n\nAdd those symbols to those boards' defconfigs where the DT indicates a\ndefault-on power LED. The number used is <port bank> * 32 + <pin no>,\nan active low setup means CONFIG_SPL_SUNXI_LED_STATUS_STATE must be\nundefined.\n\nThis will light up the power LED very early in the (SPL) boot phase on\nthose 32-bit boards.\n\nSigned-off-by: Andre Przywara <andre.przywara@arm.com>\n---\n configs/A13-OLinuXinoM_defconfig         | 3 +++\n configs/Bananapi_M2_Ultra_defconfig      | 3 +++\n configs/Bananapi_m2m_defconfig           | 3 +++\n configs/Mele_A1000G_quad_defconfig       | 3 +++\n configs/Mele_A1000_defconfig             | 3 +++\n configs/Mele_M9_defconfig                | 3 +++\n configs/bananapi_m1_plus_defconfig       | 3 +++\n configs/bananapi_m2_berry_defconfig      | 3 +++\n configs/bananapi_m2_zero_defconfig       | 3 +++\n configs/beelink_x2_defconfig             | 3 +++\n configs/icnova-a20-adb4006_defconfig     | 3 +++\n configs/nanopi_duo2_defconfig            | 3 +++\n configs/nanopi_neo_air_defconfig         | 3 +++\n configs/orangepi_2_defconfig             | 3 +++\n configs/orangepi_lite_defconfig          | 3 +++\n configs/orangepi_one_defconfig           | 3 +++\n configs/orangepi_pc_defconfig            | 3 +++\n configs/orangepi_zero_defconfig          | 3 +++\n configs/orangepi_zero_plus2_h3_defconfig | 3 +++\n 19 files changed, 57 insertions(+)","diff":"diff --git a/configs/A13-OLinuXinoM_defconfig b/configs/A13-OLinuXinoM_defconfig\nindex f547635302f..7fbce4b6dd2 100644\n--- a/configs/A13-OLinuXinoM_defconfig\n+++ b/configs/A13-OLinuXinoM_defconfig\n@@ -10,6 +10,9 @@ CONFIG_VIDEO_VGA_VIA_LCD=y\n CONFIG_VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH=y\n CONFIG_VIDEO_LCD_POWER=\"PB10\"\n CONFIG_VIDEO_LCD_BL_PWM=\"PB2\"\n+CONFIG_SPL_SUNXI_LED_STATUS=y\n+CONFIG_SPL_SUNXI_LED_STATUS_BIT=201\n+CONFIG_SPL_SUNXI_LED_STATUS_STATE=y\n # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set\n CONFIG_SYS_I2C_MVTWSI=y\n CONFIG_SYS_I2C_SLAVE=0x7f\ndiff --git a/configs/Bananapi_M2_Ultra_defconfig b/configs/Bananapi_M2_Ultra_defconfig\nindex 375b0063c1a..6e1b5b8c921 100644\n--- a/configs/Bananapi_M2_Ultra_defconfig\n+++ b/configs/Bananapi_M2_Ultra_defconfig\n@@ -5,6 +5,9 @@ CONFIG_DRAM_CLK=576\n CONFIG_SPL=y\n CONFIG_MACH_SUN8I_R40=y\n CONFIG_MMC_SUNXI_SLOT_EXTRA=2\n+CONFIG_SPL_SUNXI_LED_STATUS=y\n+CONFIG_SPL_SUNXI_LED_STATUS_BIT=244\n+CONFIG_SPL_SUNXI_LED_STATUS_STATE=y\n # CONFIG_HAS_ARMV7_SECURE_BASE is not set\n CONFIG_AHCI=y\n # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set\ndiff --git a/configs/Bananapi_m2m_defconfig b/configs/Bananapi_m2m_defconfig\nindex 0c20cce49ea..d8f99d0c70e 100644\n--- a/configs/Bananapi_m2m_defconfig\n+++ b/configs/Bananapi_m2m_defconfig\n@@ -7,6 +7,9 @@ CONFIG_MACH_SUN8I_A33=y\n CONFIG_DRAM_ZQ=15291\n CONFIG_DRAM_ODT_EN=y\n CONFIG_MMC_SUNXI_SLOT_EXTRA=2\n+CONFIG_SPL_SUNXI_LED_STATUS=y\n+CONFIG_SPL_SUNXI_LED_STATUS_BIT=355\n+# CONFIG_SPL_SUNXI_LED_STATUS_STATE is not set\n # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set\n CONFIG_FASTBOOT_CMD_OEM_FORMAT=y\n CONFIG_USB_EHCI_HCD=y\ndiff --git a/configs/Mele_A1000G_quad_defconfig b/configs/Mele_A1000G_quad_defconfig\nindex 1f4739e0005..320856bda4e 100644\n--- a/configs/Mele_A1000G_quad_defconfig\n+++ b/configs/Mele_A1000G_quad_defconfig\n@@ -4,6 +4,9 @@ CONFIG_DEFAULT_DEVICE_TREE=\"sun6i-a31-mele-a1000g-quad\"\n CONFIG_SPL=y\n CONFIG_MACH_SUN6I=y\n CONFIG_DRAM_ZQ=120\n+CONFIG_SPL_SUNXI_LED_STATUS=y\n+CONFIG_SPL_SUNXI_LED_STATUS_BIT=237\n+CONFIG_SPL_SUNXI_LED_STATUS_STATE=y\n # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set\n CONFIG_PHY_REALTEK=y\n CONFIG_ETH_DESIGNWARE=y\ndiff --git a/configs/Mele_A1000_defconfig b/configs/Mele_A1000_defconfig\nindex 93e73ebe3f1..7bfe9afb35c 100644\n--- a/configs/Mele_A1000_defconfig\n+++ b/configs/Mele_A1000_defconfig\n@@ -5,6 +5,9 @@ CONFIG_SPL=y\n CONFIG_MACH_SUN4I=y\n CONFIG_VIDEO_VGA=y\n CONFIG_VIDEO_COMPOSITE=y\n+CONFIG_SPL_SUNXI_LED_STATUS=y\n+CONFIG_SPL_SUNXI_LED_STATUS_BIT=244\n+CONFIG_SPL_SUNXI_LED_STATUS_STATE=y\n CONFIG_AHCI=y\n # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set\n CONFIG_SPL_I2C=y\ndiff --git a/configs/Mele_M9_defconfig b/configs/Mele_M9_defconfig\nindex 9b1bb97eedd..a3dcbd21f8f 100644\n--- a/configs/Mele_M9_defconfig\n+++ b/configs/Mele_M9_defconfig\n@@ -4,6 +4,9 @@ CONFIG_DEFAULT_DEVICE_TREE=\"sun6i-a31-m9\"\n CONFIG_SPL=y\n CONFIG_MACH_SUN6I=y\n CONFIG_DRAM_ZQ=120\n+CONFIG_SPL_SUNXI_LED_STATUS=y\n+CONFIG_SPL_SUNXI_LED_STATUS_BIT=237\n+CONFIG_SPL_SUNXI_LED_STATUS_STATE=y\n # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set\n CONFIG_PHY_REALTEK=y\n CONFIG_ETH_DESIGNWARE=y\ndiff --git a/configs/bananapi_m1_plus_defconfig b/configs/bananapi_m1_plus_defconfig\nindex 22b69aa88cb..49dcd679789 100644\n--- a/configs/bananapi_m1_plus_defconfig\n+++ b/configs/bananapi_m1_plus_defconfig\n@@ -6,6 +6,9 @@ CONFIG_SPL=y\n CONFIG_MACH_SUN7I=y\n CONFIG_VIDEO_COMPOSITE=y\n CONFIG_GMAC_TX_DELAY=3\n+CONFIG_SPL_SUNXI_LED_STATUS=y\n+CONFIG_SPL_SUNXI_LED_STATUS_BIT=249\n+CONFIG_SPL_SUNXI_LED_STATUS_STATE=y\n CONFIG_AHCI=y\n # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set\n CONFIG_SPL_I2C=y\ndiff --git a/configs/bananapi_m2_berry_defconfig b/configs/bananapi_m2_berry_defconfig\nindex b406d519684..3d03b5fc596 100644\n--- a/configs/bananapi_m2_berry_defconfig\n+++ b/configs/bananapi_m2_berry_defconfig\n@@ -4,6 +4,9 @@ CONFIG_DEFAULT_DEVICE_TREE=\"sun8i-v40-bananapi-m2-berry\"\n CONFIG_DRAM_CLK=576\n CONFIG_SPL=y\n CONFIG_MACH_SUN8I_R40=y\n+CONFIG_SPL_SUNXI_LED_STATUS=y\n+CONFIG_SPL_SUNXI_LED_STATUS_BIT=244\n+CONFIG_SPL_SUNXI_LED_STATUS_STATE=y\n # CONFIG_HAS_ARMV7_SECURE_BASE is not set\n CONFIG_AHCI=y\n # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set\ndiff --git a/configs/bananapi_m2_zero_defconfig b/configs/bananapi_m2_zero_defconfig\nindex 337bafecd47..fcde63441b5 100644\n--- a/configs/bananapi_m2_zero_defconfig\n+++ b/configs/bananapi_m2_zero_defconfig\n@@ -4,4 +4,7 @@ CONFIG_DEFAULT_DEVICE_TREE=\"sun8i-h2-plus-bananapi-m2-zero\"\n CONFIG_DRAM_CLK=408\n CONFIG_SPL=y\n CONFIG_MACH_SUN8I_H3=y\n+CONFIG_SPL_SUNXI_LED_STATUS=y\n+CONFIG_SPL_SUNXI_LED_STATUS_BIT=362\n+# CONFIG_SPL_SUNXI_LED_STATUS_STATE is not set\n # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set\ndiff --git a/configs/beelink_x2_defconfig b/configs/beelink_x2_defconfig\nindex 3b0be26f063..1435ebc667d 100644\n--- a/configs/beelink_x2_defconfig\n+++ b/configs/beelink_x2_defconfig\n@@ -5,6 +5,9 @@ CONFIG_DRAM_CLK=567\n CONFIG_SPL=y\n CONFIG_MACH_SUN8I_H3=y\n CONFIG_MMC_SUNXI_SLOT_EXTRA=2\n+CONFIG_SPL_SUNXI_LED_STATUS=y\n+CONFIG_SPL_SUNXI_LED_STATUS_BIT=362\n+CONFIG_SPL_SUNXI_LED_STATUS_STATE=y\n # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set\n CONFIG_SUN8I_EMAC=y\n CONFIG_USB_EHCI_HCD=y\ndiff --git a/configs/icnova-a20-adb4006_defconfig b/configs/icnova-a20-adb4006_defconfig\nindex 507e330612e..9aed628d294 100644\n--- a/configs/icnova-a20-adb4006_defconfig\n+++ b/configs/icnova-a20-adb4006_defconfig\n@@ -4,6 +4,9 @@ CONFIG_DEFAULT_DEVICE_TREE=\"sun7i-a20-icnova-a20-adb4006\"\n CONFIG_DRAM_CLK=384\n CONFIG_SPL=y\n CONFIG_MACH_SUN7I=y\n+CONFIG_SPL_SUNXI_LED_STATUS=y\n+CONFIG_SPL_SUNXI_LED_STATUS_BIT=245\n+CONFIG_SPL_SUNXI_LED_STATUS_STATE=y\n CONFIG_AHCI=y\n # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set\n CONFIG_SPL_I2C=y\ndiff --git a/configs/nanopi_duo2_defconfig b/configs/nanopi_duo2_defconfig\nindex 41b5502d24e..3f59b2f0071 100644\n--- a/configs/nanopi_duo2_defconfig\n+++ b/configs/nanopi_duo2_defconfig\n@@ -5,6 +5,9 @@ CONFIG_DRAM_CLK=408\n CONFIG_SPL=y\n CONFIG_MACH_SUN8I_H3=y\n # CONFIG_VIDEO_DE2 is not set\n+CONFIG_SPL_SUNXI_LED_STATUS=y\n+CONFIG_SPL_SUNXI_LED_STATUS_BIT=362\n+CONFIG_SPL_SUNXI_LED_STATUS_STATE=y\n # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set\n CONFIG_CONSOLE_MUX=y\n CONFIG_USB_EHCI_HCD=y\ndiff --git a/configs/nanopi_neo_air_defconfig b/configs/nanopi_neo_air_defconfig\nindex 3b8cbbfcdba..c91a7f79b5e 100644\n--- a/configs/nanopi_neo_air_defconfig\n+++ b/configs/nanopi_neo_air_defconfig\n@@ -5,6 +5,9 @@ CONFIG_DRAM_CLK=408\n CONFIG_SPL=y\n CONFIG_MACH_SUN8I_H3=y\n # CONFIG_VIDEO_DE2 is not set\n+CONFIG_SPL_SUNXI_LED_STATUS=y\n+CONFIG_SPL_SUNXI_LED_STATUS_BIT=362\n+CONFIG_SPL_SUNXI_LED_STATUS_STATE=y\n # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set\n CONFIG_CONSOLE_MUX=y\n CONFIG_USB_EHCI_HCD=y\ndiff --git a/configs/orangepi_2_defconfig b/configs/orangepi_2_defconfig\nindex 88433808538..e12b98161fd 100644\n--- a/configs/orangepi_2_defconfig\n+++ b/configs/orangepi_2_defconfig\n@@ -5,6 +5,9 @@ CONFIG_DEFAULT_DEVICE_TREE=\"sun8i-h3-orangepi-2\"\n CONFIG_DRAM_CLK=672\n CONFIG_SPL=y\n CONFIG_MACH_SUN8I_H3=y\n+CONFIG_SPL_SUNXI_LED_STATUS=y\n+CONFIG_SPL_SUNXI_LED_STATUS_BIT=362\n+CONFIG_SPL_SUNXI_LED_STATUS_STATE=y\n # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set\n CONFIG_SPL_I2C=y\n CONFIG_SPL_SYS_I2C_LEGACY=y\ndiff --git a/configs/orangepi_lite_defconfig b/configs/orangepi_lite_defconfig\nindex ea1548f0fcd..08a7c516f89 100644\n--- a/configs/orangepi_lite_defconfig\n+++ b/configs/orangepi_lite_defconfig\n@@ -4,6 +4,9 @@ CONFIG_DEFAULT_DEVICE_TREE=\"sun8i-h3-orangepi-lite\"\n CONFIG_DRAM_CLK=672\n CONFIG_SPL=y\n CONFIG_MACH_SUN8I_H3=y\n+CONFIG_SPL_SUNXI_LED_STATUS=y\n+CONFIG_SPL_SUNXI_LED_STATUS_BIT=362\n+CONFIG_SPL_SUNXI_LED_STATUS_STATE=y\n # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set\n CONFIG_USB_EHCI_HCD=y\n CONFIG_USB_OHCI_HCD=y\ndiff --git a/configs/orangepi_one_defconfig b/configs/orangepi_one_defconfig\nindex e4de13de26b..7ee16c2dcb7 100644\n--- a/configs/orangepi_one_defconfig\n+++ b/configs/orangepi_one_defconfig\n@@ -4,6 +4,9 @@ CONFIG_DEFAULT_DEVICE_TREE=\"sun8i-h3-orangepi-one\"\n CONFIG_DRAM_CLK=672\n CONFIG_SPL=y\n CONFIG_MACH_SUN8I_H3=y\n+CONFIG_SPL_SUNXI_LED_STATUS=y\n+CONFIG_SPL_SUNXI_LED_STATUS_BIT=362\n+CONFIG_SPL_SUNXI_LED_STATUS_STATE=y\n # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set\n CONFIG_SUN8I_EMAC=y\n CONFIG_USB_EHCI_HCD=y\ndiff --git a/configs/orangepi_pc_defconfig b/configs/orangepi_pc_defconfig\nindex f857d7fa203..12903541a84 100644\n--- a/configs/orangepi_pc_defconfig\n+++ b/configs/orangepi_pc_defconfig\n@@ -4,6 +4,9 @@ CONFIG_DEFAULT_DEVICE_TREE=\"sun8i-h3-orangepi-pc\"\n CONFIG_DRAM_CLK=624\n CONFIG_SPL=y\n CONFIG_MACH_SUN8I_H3=y\n+CONFIG_SPL_SUNXI_LED_STATUS=y\n+CONFIG_SPL_SUNXI_LED_STATUS_BIT=362\n+CONFIG_SPL_SUNXI_LED_STATUS_STATE=y\n # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set\n CONFIG_SPL_I2C=y\n CONFIG_SPL_SYS_I2C_LEGACY=y\ndiff --git a/configs/orangepi_zero_defconfig b/configs/orangepi_zero_defconfig\nindex e128f5fcdb3..9a11154c9f9 100644\n--- a/configs/orangepi_zero_defconfig\n+++ b/configs/orangepi_zero_defconfig\n@@ -6,6 +6,9 @@ CONFIG_SPL=y\n CONFIG_MACH_SUN8I_H3=y\n # CONFIG_VIDEO_DE2 is not set\n CONFIG_SPL_SPI_SUNXI=y\n+CONFIG_SPL_SUNXI_LED_STATUS=y\n+CONFIG_SPL_SUNXI_LED_STATUS_BIT=362\n+CONFIG_SPL_SUNXI_LED_STATUS_STATE=y\n # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set\n CONFIG_CONSOLE_MUX=y\n CONFIG_MTD=y\ndiff --git a/configs/orangepi_zero_plus2_h3_defconfig b/configs/orangepi_zero_plus2_h3_defconfig\nindex caf515c7026..dd37b1a3fff 100644\n--- a/configs/orangepi_zero_plus2_h3_defconfig\n+++ b/configs/orangepi_zero_plus2_h3_defconfig\n@@ -6,6 +6,9 @@ CONFIG_SPL=y\n CONFIG_MACH_SUN8I_H3=y\n # CONFIG_DRAM_ODT_EN is not set\n CONFIG_MMC_SUNXI_SLOT_EXTRA=2\n+CONFIG_SPL_SUNXI_LED_STATUS=y\n+CONFIG_SPL_SUNXI_LED_STATUS_BIT=362\n+CONFIG_SPL_SUNXI_LED_STATUS_STATE=y\n # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set\n CONFIG_SUN8I_EMAC=y\n CONFIG_USB_EHCI_HCD=y\n","prefixes":["2/3"]}