{"id":833236,"url":"http://patchwork.ozlabs.org/api/1.2/covers/833236/?format=json","web_url":"http://patchwork.ozlabs.org/project/devicetree-bindings/cover/20171102065626.21835-1-chunyan.zhang@spreadtrum.com/","project":{"id":37,"url":"http://patchwork.ozlabs.org/api/1.2/projects/37/?format=json","name":"Devicetree Bindings","link_name":"devicetree-bindings","list_id":"devicetree.vger.kernel.org","list_email":"devicetree@vger.kernel.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20171102065626.21835-1-chunyan.zhang@spreadtrum.com>","list_archive_url":null,"date":"2017-11-02T06:56:15","name":"[V3,00/11] add clock driver for Spreadtrum platforms","submitter":{"id":64991,"url":"http://patchwork.ozlabs.org/api/1.2/people/64991/?format=json","name":"Chunyan Zhang","email":"chunyan.zhang@spreadtrum.com"},"mbox":"http://patchwork.ozlabs.org/project/devicetree-bindings/cover/20171102065626.21835-1-chunyan.zhang@spreadtrum.com/mbox/","series":[{"id":11448,"url":"http://patchwork.ozlabs.org/api/1.2/series/11448/?format=json","web_url":"http://patchwork.ozlabs.org/project/devicetree-bindings/list/?series=11448","date":"2017-11-02T06:56:15","name":"add clock driver for Spreadtrum platforms","version":3,"mbox":"http://patchwork.ozlabs.org/series/11448/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/covers/833236/comments/","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3ySGM15YKGz9t2V\n\tfor ;\n\tThu, 2 Nov 2017 18:05:33 +1100 (AEDT)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1754758AbdKBHFc (ORCPT\n\t);\n\tThu, 2 Nov 2017 03:05:32 -0400","from sci-ig2.spreadtrum.com ([222.66.158.135]:35787 \"EHLO\n\tSHSQR01.spreadtrum.com\" rhost-flags-OK-FAIL-OK-OK) by vger.kernel.org\n\twith ESMTP id S1752738AbdKBHFa (ORCPT\n\t); Thu, 2 Nov 2017 03:05:30 -0400","from ig2.spreadtrum.com (shmbx03.spreadtrum.com [10.0.1.208])\n\tby SHSQR01.spreadtrum.com with ESMTP id vA271Pd2012020\n\t(version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO);\n\tThu, 2 Nov 2017 15:01:25 +0800 (CST)\n\t(envelope-from Chunyan.Zhang@spreadtrum.com)","from SHCAS02.spreadtrum.com (10.0.1.202) by SHMBX03.spreadtrum.com\n\t(10.0.1.208) with Microsoft SMTP Server (TLS) id 15.0.847.32;\n\tThu, 2 Nov 2017 15:01:27 +0800","from localhost (10.0.73.143) by SHCAS02.spreadtrum.com (10.0.1.250)\n\twith Microsoft SMTP Server (TLS) id 15.0.847.32 via Frontend\n\tTransport; Thu, 2 Nov 2017 15:01:28 +0800"],"From":"Chunyan Zhang ","To":"Stephen Boyd ,\n\tMichael Turquette ,\n\tRob Herring , Mark Rutland ","CC":"Catalin Marinas ,\n\tWill Deacon , ,\n\t, Arnd Bergmann ,\n\tMark Brown ,\n\tXiaolong Zhang ,\n\tBen Li , ,\n\t, Orson Zhai ,\n\tChunyan Zhang ","Subject":"[PATCH V3 00/11] add clock driver for Spreadtrum platforms","Date":"Thu, 2 Nov 2017 14:56:15 +0800","Message-ID":"<20171102065626.21835-1-chunyan.zhang@spreadtrum.com>","X-Mailer":"git-send-email 2.12.2","MIME-Version":"1.0","Content-Type":"text/plain","X-MAIL":"SHSQR01.spreadtrum.com vA271Pd2012020","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"},"content":"This series adds Spreadtrum clock support together with its binding\ndocumentation and devicetree data.\n\nAny comments would be greatly appreciated.\n\nThanks,\nChunyan\n\nChanges from V2: (http://lkml.iu.edu/hypermail/linux/kernel/1707.1/01504.html)\n* Switch to use regmap to access registers;\n* Splited all clocks into 16 separated nodes, for each belongs to a single address area; \n* Rearranged the order of clock declaration in sc9860-clk.c, sorted them upon the address area;\n* Added syscon device tree nodes which will be quoted by the node of clocks which are in\n the same address area with the syscon device;\n* Revised the binding documentation according to the dt modification. \n\nChanges from V1: (https://lkml.org/lkml/2017/6/17/356)\n* Address Stephen's comments:\n - Switch to use platform device driver instead of the DT probing mechanism.\n - Move the common clock macro out from vendor directory, but need to remove those\n overlap code from other vendors (such as sunxi-ng) once this get merged.\n - Add support to be built as a module.\n - Add 'sprd_' prefix for all spin locks used in these drivers.\n - Mark input parameter of sprd_x with const.\n - Remove unreasonable dependencies to CONFIG_64BIT.\n - Add readl() after writing the same register.\n - Remove CLK_IS_BASIC which is no longer used.\n - Remove unnecessery CLK_IGNORE_UNUSED when defining a clock.\n - Change to expose all clock index.\n - Use clk_ instead of ccu.\n - Add Kconfig for sprd clocks.\n - Move the fixed clocks out from the soc node.\n - Switch to use 64-bit math in pll driver instead of 32-bit math.\n* Revise binding documentation according to dt modification.\n* Rename sc9860.c to sc9860-clk.c\n\n\nChunyan Zhang (11):\n drivers: move clock common macros out from vendor directories\n dt-bindings: Add Spreadtrum clock binding documentation\n clk: sprd: Add common infrastructure\n clk: sprd: add gate clock support\n clk: sprd: add mux clock support\n clk: sprd: add divider clock support\n clk: sprd: add composite clock support\n clk: sprd: add adjustable pll support\n clk: sprd: add clocks support for SC9860\n arm64: dts: add syscon for whale2 platform\n arm64: dts: add clocks for SC9860\n\n Documentation/devicetree/bindings/clock/sprd.txt | 55 +\n arch/arm64/boot/dts/sprd/sc9860.dtsi | 115 ++\n arch/arm64/boot/dts/sprd/whale2.dtsi | 48 +-\n drivers/clk/Kconfig | 1 +\n drivers/clk/Makefile | 1 +\n drivers/clk/clk_common.h | 60 +\n drivers/clk/sprd/Kconfig | 14 +\n drivers/clk/sprd/Makefile | 11 +\n drivers/clk/sprd/common.c | 112 ++\n drivers/clk/sprd/common.h | 57 +\n drivers/clk/sprd/composite.c | 65 +\n drivers/clk/sprd/composite.h | 49 +\n drivers/clk/sprd/div.c | 100 ++\n drivers/clk/sprd/div.h | 79 +\n drivers/clk/sprd/gate.c | 106 ++\n drivers/clk/sprd/gate.h | 54 +\n drivers/clk/sprd/mux.c | 89 +\n drivers/clk/sprd/mux.h | 65 +\n drivers/clk/sprd/pll.c | 268 +++\n drivers/clk/sprd/pll.h | 110 ++\n drivers/clk/sprd/sc9860-clk.c | 1987 ++++++++++++++++++++++\n include/dt-bindings/clock/sprd,sc9860-clk.h | 408 +++++\n 22 files changed, 3852 insertions(+), 2 deletions(-)\n create mode 100644 Documentation/devicetree/bindings/clock/sprd.txt\n create mode 100644 drivers/clk/clk_common.h\n create mode 100644 drivers/clk/sprd/Kconfig\n create mode 100644 drivers/clk/sprd/Makefile\n create mode 100644 drivers/clk/sprd/common.c\n create mode 100644 drivers/clk/sprd/common.h\n create mode 100644 drivers/clk/sprd/composite.c\n create mode 100644 drivers/clk/sprd/composite.h\n create mode 100644 drivers/clk/sprd/div.c\n create mode 100644 drivers/clk/sprd/div.h\n create mode 100644 drivers/clk/sprd/gate.c\n create mode 100644 drivers/clk/sprd/gate.h\n create mode 100644 drivers/clk/sprd/mux.c\n create mode 100644 drivers/clk/sprd/mux.h\n create mode 100644 drivers/clk/sprd/pll.c\n create mode 100644 drivers/clk/sprd/pll.h\n create mode 100644 drivers/clk/sprd/sc9860-clk.c\n create mode 100644 include/dt-bindings/clock/sprd,sc9860-clk.h"}