{"id":812708,"url":"http://patchwork.ozlabs.org/api/1.2/covers/812708/?format=json","web_url":"http://patchwork.ozlabs.org/project/devicetree-bindings/cover/1505200909-23552-1-git-send-email-weiyi.lu@mediatek.com/","project":{"id":37,"url":"http://patchwork.ozlabs.org/api/1.2/projects/37/?format=json","name":"Devicetree Bindings","link_name":"devicetree-bindings","list_id":"devicetree.vger.kernel.org","list_email":"devicetree@vger.kernel.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1505200909-23552-1-git-send-email-weiyi.lu@mediatek.com>","list_archive_url":null,"date":"2017-09-12T07:21:40","name":"[v3,0/9] Mediatek MT2712 clock and scpsys support","submitter":{"id":72166,"url":"http://patchwork.ozlabs.org/api/1.2/people/72166/?format=json","name":"Weiyi Lu","email":"weiyi.lu@mediatek.com"},"mbox":"http://patchwork.ozlabs.org/project/devicetree-bindings/cover/1505200909-23552-1-git-send-email-weiyi.lu@mediatek.com/mbox/","series":[{"id":2622,"url":"http://patchwork.ozlabs.org/api/1.2/series/2622/?format=json","web_url":"http://patchwork.ozlabs.org/project/devicetree-bindings/list/?series=2622","date":"2017-09-12T07:21:45","name":"Mediatek MT2712 clock and scpsys support","version":3,"mbox":"http://patchwork.ozlabs.org/series/2622/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/covers/812708/comments/","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xrx9c6N2rz9s8J\n\tfor ;\n\tTue, 12 Sep 2017 17:23:48 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751289AbdILHWK (ORCPT\n\t);\n\tTue, 12 Sep 2017 03:22:10 -0400","from mailgw01.mediatek.com ([210.61.82.183]:3691 \"EHLO\n\tmailgw01.mediatek.com\" rhost-flags-OK-FAIL-OK-FAIL) by\n\tvger.kernel.org with ESMTP id S1751119AbdILHWH (ORCPT\n\t); Tue, 12 Sep 2017 03:22:07 -0400","from mtkcas09.mediatek.inc [(172.21.101.178)] by\n\tmailgw01.mediatek.com (envelope-from )\n\t(mhqrelay.mediatek.com ESMTP with TLS)\n\twith ESMTP id 231410403; Tue, 12 Sep 2017 15:22:02 +0800","from mtkcas07.mediatek.inc (172.21.101.84) by\n\tmtkmbs03n2.mediatek.inc (172.21.101.182) with Microsoft SMTP Server\n\t(TLS) id 15.0.1210.3; Tue, 12 Sep 2017 15:22:01 +0800","from mtkslt210.mediatek.inc (10.21.14.14) by mtkcas07.mediatek.inc\n\t(172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via\n\tFrontend Transport; Tue, 12 Sep 2017 15:22:01 +0800"],"X-UUID":"e2e2162b52714290a5c30e6e1af5201f-20170912","From":"Weiyi Lu ","To":"Matthias Brugger ,\n\tStephen Boyd , Rob Herring ","CC":"James Liao ,\n\tFan Chen , ,\n\t, ,\n\t, ,\n\t","Subject":"[PATCH v3 0/9] Mediatek MT2712 clock and scpsys support ","Date":"Tue, 12 Sep 2017 15:21:40 +0800","Message-ID":"<1505200909-23552-1-git-send-email-weiyi.lu@mediatek.com>","X-Mailer":"git-send-email 1.9.1","MIME-Version":"1.0","Content-Type":"text/plain","X-MTK":"N","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"},"content":"This series is based on v4.13-next-soc and composed of\nclock control (PATCH 1-4) and scpsys control (PATCH 5-9)\n\nchanges since v2:\n- ensure the clocks used by clocksource driver are registered\n before clocksource init() by using CLK_OF_DECLARE()\n- correct the frequency of clk32k/clkrtc_ext/clkrtc_int\n\nchanges since v1:\n- Rebase to v4.13-next-soc.\n- Refine scpsys and infracfg for bus protection.\n\nWeiyi Lu (9):\n dt-bindings: ARM: Mediatek: Document bindings for MT2712\n clk: mediatek: Add dt-bindings for MT2712 clocks\n clk: mediatek: Add MT2712 clock support\n arm: dts: mt2712: Add clock controller device nodes\n dt-bindings: soc: add MT2712 power dt-bindings\n soc: mediatek: extend bus protection API\n soc: mediatek: add dependent clock jpgdec/audio for scpsys\n soc: mediatek: add MT2712 scpsys support\n arm: dts: Add power controller device node of MT2712\n\n .../bindings/arm/mediatek/mediatek,apmixedsys.txt | 1 +\n .../bindings/arm/mediatek/mediatek,bdpsys.txt | 1 +\n .../bindings/arm/mediatek/mediatek,imgsys.txt | 1 +\n .../bindings/arm/mediatek/mediatek,infracfg.txt | 1 +\n .../bindings/arm/mediatek/mediatek,jpgdecsys.txt | 22 +\n .../bindings/arm/mediatek/mediatek,mcucfg.txt | 22 +\n .../bindings/arm/mediatek/mediatek,mfgcfg.txt | 22 +\n .../bindings/arm/mediatek/mediatek,mmsys.txt | 1 +\n .../bindings/arm/mediatek/mediatek,pericfg.txt | 1 +\n .../bindings/arm/mediatek/mediatek,topckgen.txt | 1 +\n .../bindings/arm/mediatek/mediatek,vdecsys.txt | 1 +\n .../bindings/arm/mediatek/mediatek,vencsys.txt | 1 +\n .../devicetree/bindings/soc/mediatek/scpsys.txt | 3 +\n arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 131 ++\n drivers/clk/mediatek/Kconfig | 50 +\n drivers/clk/mediatek/Makefile | 8 +\n drivers/clk/mediatek/clk-mt2712-bdp.c | 102 ++\n drivers/clk/mediatek/clk-mt2712-img.c | 80 ++\n drivers/clk/mediatek/clk-mt2712-jpgdec.c | 76 ++\n drivers/clk/mediatek/clk-mt2712-mfg.c | 75 +\n drivers/clk/mediatek/clk-mt2712-mm.c | 170 +++\n drivers/clk/mediatek/clk-mt2712-vdec.c | 94 ++\n drivers/clk/mediatek/clk-mt2712-venc.c | 77 ++\n drivers/clk/mediatek/clk-mt2712.c | 1435 ++++++++++++++++++++\n drivers/clk/mediatek/clk-mtk.h | 2 +\n drivers/clk/mediatek/clk-pll.c | 13 +-\n drivers/soc/mediatek/mtk-infracfg.c | 32 +-\n drivers/soc/mediatek/mtk-scpsys.c | 199 ++-\n include/dt-bindings/clock/mt2712-clk.h | 427 ++++++\n include/dt-bindings/power/mt2712-power.h | 26 +\n include/linux/soc/mediatek/infracfg.h | 12 +-\n 31 files changed, 3049 insertions(+), 38 deletions(-)\n create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,jpgdecsys.txt\n create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mcucfg.txt\n create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mfgcfg.txt\n create mode 100644 drivers/clk/mediatek/clk-mt2712-bdp.c\n create mode 100644 drivers/clk/mediatek/clk-mt2712-img.c\n create mode 100644 drivers/clk/mediatek/clk-mt2712-jpgdec.c\n create mode 100644 drivers/clk/mediatek/clk-mt2712-mfg.c\n create mode 100644 drivers/clk/mediatek/clk-mt2712-mm.c\n create mode 100644 drivers/clk/mediatek/clk-mt2712-vdec.c\n create mode 100644 drivers/clk/mediatek/clk-mt2712-venc.c\n create mode 100644 drivers/clk/mediatek/clk-mt2712.c\n create mode 100644 include/dt-bindings/clock/mt2712-clk.h\n create mode 100644 include/dt-bindings/power/mt2712-power.h\n\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html"}