{"id":810356,"url":"http://patchwork.ozlabs.org/api/1.2/covers/810356/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/cover/20170906014950.132960-1-sjg@chromium.org/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/1.2/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170906014950.132960-1-sjg@chromium.org>","list_archive_url":null,"date":"2017-09-06T01:49:44","name":"[U-Boot,v3,0/6] x86: bootstage: Fix bootstage operation on link","submitter":{"id":6170,"url":"http://patchwork.ozlabs.org/api/1.2/people/6170/?format=json","name":"Simon Glass","email":"sjg@chromium.org"},"mbox":"http://patchwork.ozlabs.org/project/uboot/cover/20170906014950.132960-1-sjg@chromium.org/mbox/","series":[{"id":1680,"url":"http://patchwork.ozlabs.org/api/1.2/series/1680/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=1680","date":"2017-09-06T01:49:44","name":"x86: bootstage: Fix bootstage operation on link","version":3,"mbox":"http://patchwork.ozlabs.org/series/1680/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/covers/810356/comments/","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; 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charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "},"content":"Recent bootstage changes have provoked problems with chromebook_link.\nBootstage uses the timer before driver model is ready, but link uses\ndriver model for the timer.\n\nThis series:\n- Updates the TSC timer to make the bootstage work before DM is ready\n- Provides a way to have a separate setting for record count in SPL to\n save memory\n- Tidies up a few bootstage options that are no-longer needed\n\nThis fixes booting on link which is currently broken.\n\nChanges in v3:\n- Bracket access to gd->timer with an #ifdef\n\nChanges in v2:\n- Update to support the early timer\n- Rebase on top of early timer code and simplify slightly\n- Add new patch to enable early timer for chromebook_link\n\nSimon Glass (6):\n board_f: Drop the timer after relocation\n dm: x86: Allow TSC timer to be used before DM is ready\n dm: x86: Update timer_get_boot_us to work before DM is ready\n bootstage: Drop unused options\n bootstage: Provide a separate record count setting for SPL\n x86: Enable early timer for chromebook_link\n\n arch/x86/include/asm/global_data.h | 1 +\n common/Kconfig | 16 ++++++------\n common/board_f.c | 3 +++\n common/bootstage.c | 6 ++---\n configs/chromebook_link64_defconfig | 1 +\n configs/chromebook_link_defconfig | 1 +\n configs/sandbox_defconfig | 1 -\n configs/sandbox_flattree_defconfig | 1 -\n configs/sandbox_noblk_defconfig | 1 -\n configs/sandbox_spl_defconfig | 1 -\n drivers/timer/tsc_timer.c | 49 +++++++++++++++++++++++++++++--------\n include/bootstage.h | 6 -----\n 12 files changed, 55 insertions(+), 32 deletions(-)"}