{"id":2231887,"url":"http://patchwork.ozlabs.org/api/1.2/covers/2231887/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-tegra/cover/0-v1-b7dc0a0d4aa0+3723d-smmu_no_cmdq_ent_jgg@nvidia.com/","project":{"id":21,"url":"http://patchwork.ozlabs.org/api/1.2/projects/21/?format=json","name":"Linux Tegra Development","link_name":"linux-tegra","list_id":"linux-tegra.vger.kernel.org","list_email":"linux-tegra@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<0-v1-b7dc0a0d4aa0+3723d-smmu_no_cmdq_ent_jgg@nvidia.com>","list_archive_url":null,"date":"2026-05-01T14:29:09","name":"[0/9] Remove SMMUv3 struct arm_smmu_cmdq_ent","submitter":{"id":79424,"url":"http://patchwork.ozlabs.org/api/1.2/people/79424/?format=json","name":"Jason Gunthorpe","email":"jgg@nvidia.com"},"mbox":"http://patchwork.ozlabs.org/project/linux-tegra/cover/0-v1-b7dc0a0d4aa0+3723d-smmu_no_cmdq_ent_jgg@nvidia.com/mbox/","series":[{"id":502465,"url":"http://patchwork.ozlabs.org/api/1.2/series/502465/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-tegra/list/?series=502465","date":"2026-05-01T14:29:09","name":"Remove SMMUv3 struct arm_smmu_cmdq_ent","version":1,"mbox":"http://patchwork.ozlabs.org/series/502465/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/covers/2231887/comments/","headers":{"Return-Path":"\n <linux-tegra+bounces-14132-incoming=patchwork.ozlabs.org@vger.kernel.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-tegra@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=Nvidia.com header.i=@Nvidia.com header.a=rsa-sha256\n header.s=selector2 header.b=hLbSTdzC;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c15:e001:75::12fc:5321; helo=sin.lore.kernel.org;\n envelope-from=linux-tegra+bounces-14132-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com\n header.b=\"hLbSTdzC\"","smtp.subspace.kernel.org;\n arc=fail smtp.client-ip=52.101.56.28","smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=nvidia.com","smtp.subspace.kernel.org;\n spf=fail smtp.mailfrom=nvidia.com","dkim=none (message not signed)\n header.d=none;dmarc=none action=none header.from=nvidia.com;"],"Received":["from sin.lore.kernel.org (sin.lore.kernel.org\n [IPv6:2600:3c15:e001:75::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g6YMZ3kPKz1yHZ\n\tfor <incoming@patchwork.ozlabs.org>; Sat, 02 May 2026 00:29:30 +1000 (AEST)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sin.lore.kernel.org (Postfix) with ESMTP id E8B123004CBC\n\tfor <incoming@patchwork.ozlabs.org>; Fri,  1 May 2026 14:29:27 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 793D23CAE69;\n\tFri,  1 May 2026 14:29:26 +0000 (UTC)","from BN1PR04CU002.outbound.protection.outlook.com\n (mail-eastus2azon11010028.outbound.protection.outlook.com [52.101.56.28])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id C464E3C0610\n\tfor <linux-tegra@vger.kernel.org>; Fri,  1 May 2026 14:29:24 +0000 (UTC)","from LV8PR12MB9620.namprd12.prod.outlook.com (2603:10b6:408:2a1::19)\n by LV3PR12MB9216.namprd12.prod.outlook.com (2603:10b6:408:1a5::13) with\n Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9870.21; Fri, 1 May\n 2026 14:29:19 +0000","from LV8PR12MB9620.namprd12.prod.outlook.com\n ([fe80::299d:f5e0:3550:1528]) by LV8PR12MB9620.namprd12.prod.outlook.com\n ([fe80::299d:f5e0:3550:1528%5]) with mapi id 15.20.9870.022; Fri, 1 May 2026\n 14:29:19 +0000"],"ARC-Seal":["i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1777645766; cv=fail;\n b=ekFSilHjF+zCM+yJDOGUUtu3Lwi0RKoHji8G7vG0kS1EApTasecPEWtopubxUY3w+UG8G/5KWhhS7FI9mTBK2vJSJeaqTTjQdBtUIHICMnvg4JJq1lQJBrPYAr1FjmEbJaGRRgDZdFefDJTL1rRZXqS+LrDE7FbrU9oFdHtjCRE=","i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none;\n b=ikGgzeZlGgsurNy4o/a48d4iLmqAMCwiXLMu7hITdwrS9BLYIy+BktzFFzczgLmnpTy90i9LX3AI47RI9tdvvU2EGAX5Kbw6Triif/AMwkpTTQFa0HtThYQTjKeFikSo5QSFXwz0FrTmOXtjJl8NldEg2LqxLWSz6li2Ytt1XeFX3tOi1sNp53PYDOUdWvDgfPK0UW/m0RIxr8pv3Dx8U0bkhft0Poi2LzJMIncyYuJQX8RhJPSJ7RAyC7ig3NIHPU671nhZpzD6zz0ug9awgign0Q63YE7/XNUBWdHvk+zjLIt9Lg2M8rNMXGFPSgHBjE5AZmJm961E0IxgeXWzmw=="],"ARC-Message-Signature":["i=2; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1777645766; c=relaxed/simple;\n\tbh=mlVB1lh8Di0Vm8f1uVfqMF4ohDqj8UBnvS8j/IjkvrU=;\n\th=From:To:Cc:Subject:Date:Message-ID:Content-Type:MIME-Version;\n b=HOkLXra1hCMhu7mTgkmV2cm8ydjcYGM6qRseZ3rB85YmQTt0fA0juVChGkJoUFYcbyn3Y3ygKzX10nBF7UPm2T4VF4HCkjji0fcqHqJWWJttCOVpj2lTQbg3SGkcrSO7v2FPzj8Zn/ghMBidZy6qlVKlY8/JTttCH+rk8EsPkYg=","i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n s=arcselector10001;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1;\n bh=Vi+bqK+gyxquBk3DD4oW+hnyK5nYdwpBs0Gz3CWy/qU=;\n b=jX+ji0FWAmdvLk4HHzDGME5q3ZOjkFv4OjGp3GMIv3+LbrZnVinIqcDyV8FIUJ6bQ4yc41MKRG7EcaxZHyyKVUzSfD9BjGY83V17tQX9rQrQacFkjml3/YSpZW1JG3uYGzm2lp+rMDhvLu+BBCVzMInHh7bACZ7IRw5zmLXGxKrcbaPUELEfI7HAmP8bOxAUZ5fbS373jJBC3B0MYvV54ekKXs8bWAck2e9yZl2aCOIYLT9JTfuRf8CngSMS7Zdh5lRy52BRzyGqFqOB74zzXgsLSTxdPr7zgCS97SSRlWa7dZ3t58dQh7oB1TkdSd2PmWFlKKYvtzY1x9Ynr5CbTw=="],"ARC-Authentication-Results":["i=2; smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=nvidia.com;\n spf=fail smtp.mailfrom=nvidia.com;\n dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com\n header.b=hLbSTdzC; arc=fail smtp.client-ip=52.101.56.28","i=1; mx.microsoft.com 1; spf=pass\n smtp.mailfrom=nvidia.com; dmarc=pass action=none header.from=nvidia.com;\n dkim=pass header.d=nvidia.com; arc=none"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com;\n s=selector2;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=Vi+bqK+gyxquBk3DD4oW+hnyK5nYdwpBs0Gz3CWy/qU=;\n b=hLbSTdzCCgT28GDenjI9MG/1J0SM/9BbBHQ0pdR7qgsOJ8wByckIYYBt4QXKQTjznXuLiktqb6ZKhWKgSOoRU5SSqrCFMnnpgcGx1LvtDjIUYM6XdEqg0JWyDSaGiT8k+u6W6V2Dkvhf9RJWZ/ssVOHZRWLpdYDtAJswZoJc0U5CO1/hyVsBl6vbwqD5HlAlv2v3el8pEmzpwppJ9cVkm0BlphWADGLEJxHiTV+jb6G2q4LqzeOi/Sc0OwwVQtQlVDxLLRMHVtXmnztqQY6nPqgxly+8oiY/Y8QKlGEzTtkKzB1ZyUhl1w1xsZry2JoTTYXmZQj+C4JAvhautbpWVA==","From":"Jason Gunthorpe <jgg@nvidia.com>","To":"iommu@lists.linux.dev,\n\tJonathan Hunter <jonathanh@nvidia.com>,\n\tJoerg Roedel <joro@8bytes.org>,\n\tlinux-arm-kernel@lists.infradead.org,\n\tlinux-tegra@vger.kernel.org,\n\tRobin Murphy <robin.murphy@arm.com>,\n\tThierry Reding <thierry.reding@kernel.org>,\n\tKrishna Reddy <vdumpa@nvidia.com>,\n\tWill Deacon <will@kernel.org>","Cc":"David Matlack <dmatlack@google.com>,\n\tPasha Tatashin <pasha.tatashin@soleen.com>,\n\tpatches@lists.linux.dev,\n\tSamiullah Khawaja <skhawaja@google.com>,\n\tMostafa Saleh <smostafa@google.com>","Subject":"[PATCH 0/9] Remove SMMUv3 struct arm_smmu_cmdq_ent","Date":"Fri,  1 May 2026 11:29:09 -0300","Message-ID":"<0-v1-b7dc0a0d4aa0+3723d-smmu_no_cmdq_ent_jgg@nvidia.com>","Content-Transfer-Encoding":"8bit","Content-Type":"text/plain","X-ClientProxiedBy":"BL1P221CA0012.NAMP221.PROD.OUTLOOK.COM\n (2603:10b6:208:2c5::6) To LV8PR12MB9620.namprd12.prod.outlook.com\n (2603:10b6:408:2a1::19)","Precedence":"bulk","X-Mailing-List":"linux-tegra@vger.kernel.org","List-Id":"<linux-tegra.vger.kernel.org>","List-Subscribe":"<mailto:linux-tegra+subscribe@vger.kernel.org>","List-Unsubscribe":"<mailto:linux-tegra+unsubscribe@vger.kernel.org>","MIME-Version":"1.0","X-MS-PublicTrafficType":"Email","X-MS-TrafficTypeDiagnostic":"LV8PR12MB9620:EE_|LV3PR12MB9216:EE_","X-MS-Office365-Filtering-Correlation-Id":"891723f5-d8fe-4c15-7a73-08dea78e07b4","X-MS-Exchange-SenderADCheck":"1","X-MS-Exchange-AntiSpam-Relay":"0","X-Microsoft-Antispam":"\n\tBCL:0;ARA:13230040|376014|7416014|1800799024|366016|18002099003|56012099003;","X-Microsoft-Antispam-Message-Info":"\n\tr7x8c7IxduBNz7tmU4FNIiFXd6wltZeLF5eNyXtCKjO9n2r8CTWOwz2Pj2Bwov86TMhbx/pvAwCMf7J2JMa1skKFdWtozN2vUU7eXvzKvg3tDSDjsxAPzPSIjSONKXdo6HeWXzAsV53l7WKK59/VoveTM+XZNNuFyi8T7iQaYvFaUhAfR3o8ekVqrc+q6nnFSY7nlHCUqTiFxddgkFWZpyOGJhVb3y8jRtD/NK6N3YT5ctPn9kcjF823RIUU3V/VajXevev+RJwM8YGuBLXVAdjuuRzsQi8PaTsAGEh8bLxUPiz1FfGbVsQROL6GuiKxiNHsPNXHImCZalA6oSzDhGf/yyXKBRBX70rp3+jCAg0gKNEGkFbBxYylmoCq8FOShb8r2tFYnMhjYE/dSQdptikWaB1DZcs+p+Mf9r0P7DfRZHSmGZVx3Vhk21+1GCiHuHVL9FnW6MuRcXXP2a3lReMtuHfbIXm0S8IWJN6Qm+lFtmjkbL/4yi1gCkD4V79PGyiL9fOiQkpd0RFjBcV9yJhQdFb6ECjGqRhMW3MLcMvqpttqqb/0S1JHYYebwDtxt/1RW4XCiGq0Tpv+ezSqTgBfLvlvZeogZmxBUyzwW+oSdPgsM8Fv9+YtMv74C6M2qLx5MdCntPPBbS2gmmB38mdzKjnM3YAPV18HhFO+ZwFiAKteqgADnekhWufPZDc9T4W8ZZuIcIPsCLuMpLkr3w==","X-Forefront-Antispam-Report":"\n\tCIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:LV8PR12MB9620.namprd12.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(376014)(7416014)(1800799024)(366016)(18002099003)(56012099003);DIR:OUT;SFP:1101;","X-MS-Exchange-AntiSpam-MessageData-ChunkCount":"1","X-MS-Exchange-AntiSpam-MessageData-0":"\n R7Fvp86rFAmSWdqxRl1MyNcZs1vM7CvWQp1JLP8NBb2+vepRH7NCD3PItZ+qCh9y0Vny+R3pQX+2tuTxGfGp9Zr9iGpz+Kb6i739KskVeTybCJGUNtQVlqYhrukf0ZhqKEO3qwTJYkgbKifHCnia5Uz+tj6EbT+xS+aJnK9FaqAeVWyW8eaG2ytHSE6sAcSX/FmN0uWxcObomd4owEbeL87TtfVrYT4dnDMc71/GQ41QdjmaonRK2kxY/afpoXBK1Uzli2GndBCzpe78xxxcZRbWMZO/+LJ235UJBVRZd7/pm5phK5gh72mcgp/2gc7TllHzYhAu4gpYKrLJLV4t3RbTdDVIHJ+2rakYsPyL9wWHUKwHCirkg6KBcwnnwoePmFJ7nvMrDnRl7jlKTatCCOEsW+vRgNuMCxh9WsURHgPDQ+ZxBbEQR0a7hsd7onoAC9CgegXMh3B2qXtijr4kcJOUzwS2nTGl3JYPdBpI73Mv2eJ393HzqElAp7BPtHx4KV88ea9lCxa+9WIgUrRDinCdU1+BprSee56qvuhpHA8L7bhYXc6PJCAImsfu9YqzXjEz5SznTMxLc6fVY8y3zifLeC7/4xLP6GhBrPpEzaQSDFWp3nmdFLC5+sL71ufXo5flaYMapufU6+lGqwnJ5C5lctzHWPfFfTCcDLHHvg7QbNBkKCj/DLwbv1c+rtfXX2Mk7TIhJe+bLZNovUc4JZhh8qXm6pv8OtqSuvAABflQpz65wVhu7Qn8fJl+p4P/knSiTbJJ9DI7QvDDdsgcibftHpzjb+PykPHm7v1BfMD8V58UqUPQFjk46neaUKK3dE4bqBglyUlLfx8ZHyIJRtL9q3/Sc5AukWrg5sNIHYrNZQWJlVvfYrZjZlZerwgy5KdOYKVOeBm8OWcJ4qPOrb6DghKe1wCF1f8VE8CZJ4bTMZNHSVtxrglh0TjGuAh6vCI2DkkWpvmDvaAy68ftmlPhIRQT3Yj4PFgiJ616cHPgOnnZ024NBF5MQDmkLjpO3Jvs2+g/Cjzbc4ofQX0lzf3+TGnSDN6ElG1I2GnK3Mvy3pWTnlx85HBJQivj+iPZ3IOE/XwQKFJeDW6Rhy/EXDidxeRqC6ai4c8kv6w11aBsM894nnR668mwyrLE/3kGnqHvrI7bYtKAsHR9mi+eyRpNlKmGi3SHYbtDOPqo3GBk4ys0QpK/Izj7oPH1HAf7mzV0BByuK2lbXNUPUlkcLPKkTW8JpMRhXoO1Ixxa2KFpiRumUaEiLhqQ+NxW4oOehnrXn7xViDoAqNAPmgGgLlUxg/8Q01MVpnp8s2fCSum4KI9i19X0ukFNridImq5qtorrYTsMOpfQ1OXneSs9Xb5wIwZwRG/FHJyFYTYMPL2fV3gwxD4bLsLsuaXL+Djl9e1QXO3VfZtHKlc8N+4OVIZhU4zPH6erptRWrb8BBOlRkj/jbbX8LxC9iYFcBTvye8Aa+vtByQwWMfdBvWNLiWuASUYev14DvpvdQS+wf45iACUHnQUOo0u32d4qOgPT+k0UhH5UcdcwRPKs7UmmbkQLkTj8M0nrjKxfdGhr9KI80oDs5tUQceFdUmtLuPeuROtAQctBXCo5T5LN0Ie6hA10cjtsuRjfQ4voe5HOtrkl0wZLKsV6hyT2XP5Nn1MSmGrOFfe5JBfcDYU9x/3RFW+m2GY992Jtosepf+yqVjxU6cZZdX9hdHOvpkArnlAE","X-OriginatorOrg":"Nvidia.com","X-MS-Exchange-CrossTenant-Network-Message-Id":"\n 891723f5-d8fe-4c15-7a73-08dea78e07b4","X-MS-Exchange-CrossTenant-AuthSource":"LV8PR12MB9620.namprd12.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Internal","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"01 May 2026 14:29:19.1804\n (UTC)","X-MS-Exchange-CrossTenant-FromEntityHeader":"Hosted","X-MS-Exchange-CrossTenant-Id":"43083d15-7273-40c1-b7db-39efd9ccc17a","X-MS-Exchange-CrossTenant-MailboxType":"HOSTED","X-MS-Exchange-CrossTenant-UserPrincipalName":"\n Gl1zDZ+H4uzvgJknV/x7lG/BcEqXxX4tS+Jj1uqoXDy7nvN8RrFJOFFAGfgbuOKr","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"LV3PR12MB9216"},"content":"[ This is part of the patch pile to move SMMUv3 over to the generic page\ntable:\n1) Introduction of new gather items and RISCV usage\n  https://patch.msgid.link/r/0-v1-54e7264d71b4+17cc3-iommu_riscv_inv_jgg@nvidia.com\n2) Remove SMMUv3 struct arm_smmu_cmdq_ent\n3) Organize the SMMUv3 invalidation flow so iommupt can use it\n4) Use the generic iommu page table for SMMUv3\n\nThe whole branch is here:\n   https://github.com/jgunthorpe/linux/commits/iommu_pt_arm64/\n]\n\nThe invalidation logic has this multi-step process where it first\nwrites the command into a 32 byte struct arm_smmu_cmdq_ent, then it\ncalls a function which converts it into a 16 byte HW struct, and\nsometimes it then edits the HW struct a little bit before passing it\noff to the batch or submission functions.\n\nInstead just generate the HW struct directly by moving the FIELD_PREP\nblocks out of the big case statement and into helper functions. Call the\nright function in all the places that were building arm_smmu_cmdq_ent.\n\nAdd a type for the CMDQ entry similar to the STE/CD types that wraps the\ntwo u64s for clarity and use it everywhere.\n\nThis is intended to have no functional change. It makes the following\npatches work better and removes a bunch of LOC. I've run several AI tools\nwith instruction to look for functional changes, which did find one subtle\nmistake in PRI response.\n\nThe removal of arm_smmu_cmdq_build_cmd() also achieves what Mostafa is\ndoing in the pkvm series by making the command formation entirely header\nbased with the arm_smmu_make_cmd_*() mini inlines.\n\nThis series has no dependencies. Several people have already tested this\non various ARM systems along with the full iommupt conversion.\n\nJason Gunthorpe (9):\n  iommu/arm-smmu-v3: Add struct arm_smmu_cmd to represent the HW format\n    command\n  iommu/arm-smmu-v3: Use the HW arm_smmu_cmd in cmdq selection functions\n  iommu/arm-smmu-v3: Use the HW arm_smmu_cmd in cmdq submission\n    functions\n  iommu/arm-smmu-v3: Convert arm_smmu_cmdq_batch cmds to struct\n    arm_smmu_cmd\n  iommu/arm-smmu-v3: Remove CMDQ_OP_CFGI_CD_ALL from\n    arm_smmu_cmdq_build_cmd()\n  iommu/arm-smmu-v3: Directly encode simple commands\n  iommu/arm-smmu-v3: Directly encode CMDQ_OP_ATC_INV\n  iommu/arm-smmu-v3: Directly encode CMDQ_OP_SYNC\n  iommu/arm-smmu-v3: Directly encode TLBI commands\n\n .../arm/arm-smmu-v3/arm-smmu-v3-iommufd.c     |  24 +-\n drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c   | 475 +++++++-----------\n drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h   | 248 +++++----\n .../iommu/arm/arm-smmu-v3/tegra241-cmdqv.c    |  16 +-\n 4 files changed, 350 insertions(+), 413 deletions(-)\n\n\nbase-commit: 1338d1bd1ea27bfe2cd1c4494547d409016a6644"}