{"id":2219840,"url":"http://patchwork.ozlabs.org/api/1.2/covers/2219840/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/cover/20260404182854.2183651-1-cjd@cjdns.fr/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/1.2/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260404182854.2183651-1-cjd@cjdns.fr>","list_archive_url":null,"date":"2026-04-04T18:28:52","name":"[v4,0/2] PCI: mediatek: Add support for EcoNet SoCs","submitter":{"id":66262,"url":"http://patchwork.ozlabs.org/api/1.2/people/66262/?format=json","name":"Caleb James DeLisle","email":"cjd@cjdns.fr"},"mbox":"http://patchwork.ozlabs.org/project/linux-pci/cover/20260404182854.2183651-1-cjd@cjdns.fr/mbox/","series":[{"id":498745,"url":"http://patchwork.ozlabs.org/api/1.2/series/498745/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/list/?series=498745","date":"2026-04-04T18:28:54","name":"PCI: mediatek: Add support for EcoNet SoCs","version":4,"mbox":"http://patchwork.ozlabs.org/series/498745/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/covers/2219840/comments/","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=cjdns.fr header.i=@cjdns.fr header.a=rsa-sha256\n header.s=dkim header.b=bXdAqjik;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; helo=sea.lore.kernel.org;\n envelope-from=linux-pci+bounces-51898-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=cjdns.fr header.i=@cjdns.fr\n header.b=\"bXdAqjik\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=5.135.140.105","smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=cjdns.fr","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=cjdns.fr"],"Received":["from sea.lore.kernel.org (sea.lore.kernel.org\n [IPv6:2600:3c0a:e001:db::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fp48X6rHfz1yCs\n\tfor ; Sun, 05 Apr 2026 04:37:48 +1000 (AEST)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sea.lore.kernel.org (Postfix) with ESMTP id 8CD1E300D6B5\n\tfor ; Sat, 4 Apr 2026 18:36:48 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 1D3A533B6F4;\n\tSat, 4 Apr 2026 18:36:47 +0000 (UTC)","from mail.cjdns.fr (mail.cjdns.fr [5.135.140.105])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 94A2C27E1A1;\n\tSat, 4 Apr 2026 18:36:45 +0000 (UTC)","from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon)\n with ESMTPSA id 7F63418DE27;\n\tSat, 4 Apr 2026 20:28:59 +0200 (CEST)"],"ARC-Seal":"i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1775327807; cv=none;\n b=hZL9uKiDAZl372fjG68Yb5UtnspMr1Hg1GYfXLaKFLqeClymB6AWbkvF1j90DFkdYBmnybhd4yWBsjg80OprywM9/OWMNrK0lJXv8OaDVr0vMQmWl/Vh9UhzYmMhGHSNCW0TRoDUsz5Wd8pitUYHtVw9E9jwSDDjeK1/AJAaxJg=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1775327807; c=relaxed/simple;\n\tbh=NsyoWyACThBoFXmGMQMZk4SgvpAekIvhuQF4rleKFSo=;\n\th=From:To:Cc:Subject:Date:Message-Id:MIME-Version;\n b=HziM2NP7tumhEiQAUUQiz8IQZqmEDDWngbONmwYPX5U2SPzKCfQXqzdP8e+Mo0A+CE2pleW5hkmnuLtjWDXh0PHwXCcYhGy1w5Y6gA6eh6h9k4R4PYH4vzndb/AyaFfjzu1FyeWkFiS9EFu+c2I41BG2X2k08fLY07ITFuABms8=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=cjdns.fr;\n spf=pass smtp.mailfrom=cjdns.fr;\n dkim=pass (2048-bit key) header.d=cjdns.fr header.i=@cjdns.fr\n header.b=bXdAqjik; arc=none smtp.client-ip=5.135.140.105","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=cjdns.fr; s=dkim;\n\tt=1775327343; h=from:subject:date:message-id:to:cc:mime-version:\n\t content-transfer-encoding; bh=bGTQalwKll4SwcwlYhOcmxNlnaeeRglwtz0o/nmoEgQ=;\n\tb=bXdAqjikLZX3z1ffRg/aaPbRUa77Kky/wQMOfkpfGSTW2ciVTwk8jgmxHWsSQlwfzk6u4T\n\tncPB2CyJAKRHjCVcAn1h56AWVA5fV6PNu5y2xMVF/B4DrAz2lUTPcNmbYFw4gqelK2+EgP\n\tleGbZXMtn7D87lzmDJBHUPk9+4CZuvFjgNOjyJ84ENHlLL8SsB7i2cWO2IDKj9HCiShn1P\n\tbFrTO/f+T0Qm+aCRXLKsTTrYbP6eNHCYyoYRKSioZLGAFF/knaKngUEAAF7BSnqJqJnXSr\n\t4TPHpRsbdSq6IGCNCxkV3XROEoENT7HfDIiddWHNW4z55aH/n2aav3vHah1uFQ==","From":"Caleb James DeLisle ","To":"linux-pci@vger.kernel.org","Cc":"linux-mips@vger.kernel.org,\n\tnaseefkm@gmail.com,\n\tryder.lee@mediatek.com,\n\thelgaas@kernel.org,\n\tlpieralisi@kernel.org,\n\tkwilczynski@kernel.org,\n\tmani@kernel.org,\n\trobh@kernel.org,\n\tkrzk+dt@kernel.org,\n\tconor+dt@kernel.org,\n\tmatthias.bgg@gmail.com,\n\tangelogioacchino.delregno@collabora.com,\n\tansuelsmth@gmail.com,\n\tlinux-mediatek@lists.infradead.org,\n\tdevicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org,\n\tCaleb James DeLisle ","Subject":"[PATCH v4 0/2] PCI: mediatek: Add support for EcoNet SoCs","Date":"Sat, 4 Apr 2026 18:28:52 +0000","Message-Id":"<20260404182854.2183651-1-cjd@cjdns.fr>","Precedence":"bulk","X-Mailing-List":"linux-pci@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-Last-TLS-Session-Version":"TLSv1.3"},"content":"Add EcoNet EN7528 (and EN751221) PCIe support.\n\nChanges from v3:\n* s/initiallized/initialized/\n* Use PCIE_T_PVPERL_MS for sleep time\n* Use PCI_PM_D3COLD_WAIT for startup wait time\n* Clarify comment \"Activate INTx interrupts\"\n* Add MTK_PCIE_RETRAIN quirk for devices which require link re-train\n* Do not retrain *all* bridges, only root bridge\n* Better comments and logging in retraining logic\n* v3: https://lore.kernel.org/linux-mips/20260320094212.696671-1-cjd@cjdns.fr/\n\nChanges from v2:\n* mediatek-pcie.yaml -> s/power-domain/power-domains/ and drop example\n* Patch 3 dropped as it has been applied (Thanks!)\n* v2: https://lore.kernel.org/linux-mips/20260316155157.679533-1-cjd@cjdns.fr/\n\nChanges from v1:\n* mediatek-pcie.yaml slot0 needs device-type = \"pci\", fix dt_binding_check\nLink: https://lore.kernel.org/linux-mips/177334026016.3889069.9474337544951486443.robh@kernel.org\n* v1: https://lore.kernel.org/linux-mips/20260312165332.569772-1-cjd@cjdns.fr/\n\nThis was split from a larger PCIe patchset which crossed multiple\nsubsystems. I'm not labeling this a v3 because it's a new patchset, but\nI'm keeping the historical record anyway.\n\nChanges from econet-pcie v2:\n* mediatek-pcie.yaml add missing constraints to PCI node properties\n* econet-pcie v2: https://lore.kernel.org/linux-mips/20260309131818.74467-1-cjd@cjdns.fr\n\nChanges from econet-pcie v1:\n* pcie-mediatek.c Exclude pcie_retrain_link() when building as a module\n* econet-pcie v1: https://lore.kernel.org/linux-mips/20260303190948.694783-1-cjd@cjdns.fr/\n\nCaleb James DeLisle (2):\n dt-bindings: PCI: mediatek: Add support for EcoNet EN7528\n PCI: mediatek: Add support for EcoNet EN7528 SoC\n\n .../bindings/pci/mediatek-pcie.yaml | 26 ++++\n drivers/pci/controller/Kconfig | 2 +-\n drivers/pci/controller/pcie-mediatek.c | 133 ++++++++++++++++++\n 3 files changed, 160 insertions(+), 1 deletion(-)"}