{"id":2233414,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2233414/?format=json","web_url":"http://patchwork.ozlabs.org/project/gcc/patch/20260506115954.886464BA7988@sourceware.org/","project":{"id":17,"url":"http://patchwork.ozlabs.org/api/1.1/projects/17/?format=json","name":"GNU Compiler Collection","link_name":"gcc","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20260506115954.886464BA7988@sourceware.org>","date":"2026-05-06T11:59:00","name":"[2/2,x86] adjust OMP SIMD call cost","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"16ce41ccec8473e55b3893506bf98d28a52b0e01","submitter":{"id":4338,"url":"http://patchwork.ozlabs.org/api/1.1/people/4338/?format=json","name":"Richard Biener","email":"rguenther@suse.de"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/gcc/patch/20260506115954.886464BA7988@sourceware.org/mbox/","series":[{"id":502975,"url":"http://patchwork.ozlabs.org/api/1.1/series/502975/?format=json","web_url":"http://patchwork.ozlabs.org/project/gcc/list/?series=502975","date":"2026-05-06T11:51:50","name":"[1/2] tree-optimization/125174 - cost OMP SIMD calls","version":1,"mbox":"http://patchwork.ozlabs.org/series/502975/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2233414/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2233414/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","gcc-patches@gcc.gnu.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","gcc-patches@gcc.gnu.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=suse.de header.i=@suse.de header.a=rsa-sha256\n header.s=susede2_rsa header.b=VY0Qe9Be;\n\tdkim=pass header.d=suse.de header.i=@suse.de header.a=ed25519-sha256\n header.s=susede2_ed25519 header.b=aPWx67Ts;\n\tdkim=pass (1024-bit key) header.d=suse.de header.i=@suse.de\n header.a=rsa-sha256 header.s=susede2_rsa header.b=VY0Qe9Be;\n\tdkim=neutral header.d=suse.de header.i=@suse.de header.a=ed25519-sha256\n header.s=susede2_ed25519 header.b=aPWx67Ts;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; 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a=rsa-sha256; c=relaxed/relaxed; d=suse.de;\n s=susede2_rsa;\n t=1778068740;\n h=from:from:reply-to:date:date:to:to:cc:cc:mime-version:mime-version:\n content-type:content-type; bh=cNE7r4nl1ZNArW2miHLMdQC7W6viWLBeSY0LBkKupnI=;\n b=VY0Qe9BelsZTi5Jwx5z0Mq3PwGmSnh6vqgoy15hZRbHgPEqHGav3CEtbSy+ALyXTbYwOuw\n 6bxINNpJ+Bh0RtPP6aFmO5MB3xJ/OcgnddHFmmwxjk3qAXWGeJ72TVA3sXJoS2SbWn80IZ\n P/S8DFmExyfBgzpQsoag/U04exHjZ/M=","v=1; a=ed25519-sha256; c=relaxed/relaxed; d=suse.de;\n s=susede2_ed25519; t=1778068740;\n h=from:from:reply-to:date:date:to:to:cc:cc:mime-version:mime-version:\n content-type:content-type; bh=cNE7r4nl1ZNArW2miHLMdQC7W6viWLBeSY0LBkKupnI=;\n b=aPWx67Ts8d4LZR/GhJchBqp4qs10U4nCjxA3dkVGLUm+YuhOwB45L+pti0k7goQ7JTzrAS\n rwVxxdC9ECkp8bCQ==","v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.de;\n s=susede2_rsa;\n t=1778068740;\n h=from:from:reply-to:date:date:to:to:cc:cc:mime-version:mime-version:\n content-type:content-type; bh=cNE7r4nl1ZNArW2miHLMdQC7W6viWLBeSY0LBkKupnI=;\n b=VY0Qe9BelsZTi5Jwx5z0Mq3PwGmSnh6vqgoy15hZRbHgPEqHGav3CEtbSy+ALyXTbYwOuw\n 6bxINNpJ+Bh0RtPP6aFmO5MB3xJ/OcgnddHFmmwxjk3qAXWGeJ72TVA3sXJoS2SbWn80IZ\n P/S8DFmExyfBgzpQsoag/U04exHjZ/M=","v=1; a=ed25519-sha256; c=relaxed/relaxed; d=suse.de;\n s=susede2_ed25519; t=1778068740;\n h=from:from:reply-to:date:date:to:to:cc:cc:mime-version:mime-version:\n content-type:content-type; bh=cNE7r4nl1ZNArW2miHLMdQC7W6viWLBeSY0LBkKupnI=;\n b=aPWx67Ts8d4LZR/GhJchBqp4qs10U4nCjxA3dkVGLUm+YuhOwB45L+pti0k7goQ7JTzrAS\n rwVxxdC9ECkp8bCQ=="],"Date":"Wed, 6 May 2026 13:59:00 +0200 (CEST)","From":"Richard Biener ","To":"gcc-patches@gcc.gnu.org","cc":"tamar.christina@arm.com, hongtao.liu@intel.com, rdsandiford@googlemail.com","Subject":"[PATCH 2/2] [x86] adjust OMP SIMD call cost","MIME-Version":"1.0","Content-Type":"text/plain; charset=US-ASCII","X-Spamd-Result":"default: False [-1.80 / 50.00]; BAYES_HAM(-3.00)[100.00%];\n MISSING_MID(2.50)[]; NEURAL_HAM_LONG(-1.00)[-1.000];\n NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain];\n ARC_NA(0.00)[]; RCVD_COUNT_ZERO(0.00)[0];\n MISSING_XM_UA(0.00)[]; FUZZY_RATELIMITED(0.00)[rspamd.com];\n FREEMAIL_ENVRCPT(0.00)[googlemail.com];\n DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519];\n TO_MATCH_ENVRCPT_ALL(0.00)[];\n FREEMAIL_CC(0.00)[arm.com,intel.com,googlemail.com];\n MIME_TRACE(0.00)[0:+]; FROM_HAS_DN(0.00)[]; TO_DN_NONE(0.00)[];\n FROM_EQ_ENVFROM(0.00)[]; RCPT_COUNT_THREE(0.00)[4]","X-BeenThere":"gcc-patches@gcc.gnu.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Gcc-patches mailing list ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org","Message-Id":"<20260506115954.886464BA7988@sourceware.org>"},"content":"The following adds special handling to OMP SIMD vector call costs\nwhich were not costed at all and for which a single simple vector\nstmt isn't appropriate. PR125174 shows that even when AVX imposes\nmore overhead (from also slightly bogus costing) than SSE, when\nthere's two OMP SIMD calls involved doing less of those should trump\nthat.\n\nBootstrap & regtest ongoing on x86_64-unknown-linux-gnu.\n\nI've verified this resolves the observed 465.tonto regression. I\nthought about catching all OMP SIMD vectorized stmts but then\nrealized scalar costing doesn't see this yet so we'll make all\nvectorizations unprofitable. We cannot handle all calls this\nway either, as some directly expand to native insns (popcount, etc.).\nSo I fear we have to maintain a positive list. There's 52\n'notinbranch' SIMD declatations in glibc 2.38 on x86_64, probably\ndifferent ones on ARM.\n\nAlso we of course have no idea about actual cost of the call\n(but it's expensive). Nor do we have an idea of the scalar\nvs. vector cost.\n\nBut as the PR shows, doing \"nothing\" isn't an option, at least\nwhen, like on x86 there's both SSE and AVX variants and the\nsurrounding code would make the SSE variant (appear) cheaper.\n\nAny good ideas?\n\nOtherwise I'll try to extensively cover all libm builtins\n(anticipating future SIMD-ification) in the same way, with\nsame costs.\n\nThanks,\nRichard.\n\n\tPR target/125174\n\t* config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):\n\tCost calls as 10 times FMA.\n---\n gcc/config/i386/i386.cc | 7 +++++++\n 1 file changed, 7 insertions(+)","diff":"diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc\nindex e73c2d7f7d0..6b271ac3fca 100644\n--- a/gcc/config/i386/i386.cc\n+++ b/gcc/config/i386/i386.cc\n@@ -26602,6 +26602,13 @@ ix86_vector_costs::add_stmt_cost (int count, vect_cost_for_stmt kind,\n case CFN_MULH:\n \tstmt_cost = ix86_multiplication_cost (ix86_cost, mode);\n \tbreak;\n+ CASE_CFN_SIN:\n+ CASE_CFN_COS:\n+ CASE_CFN_EXP:\n+\tstmt_cost = 10 * ix86_vec_cost (mode,\n+\t\t\t\t\tmode == SFmode ? ix86_cost->fmass\n+\t\t\t\t\t: ix86_cost->fmasd);\n+\tbreak;\n default:\n \tbreak;\n }\n","prefixes":["2/2","x86"]}