{"id":2233327,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2233327/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/177805349017.32250.15775019749727013358-1@git.sr.ht/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.1/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<177805349017.32250.15775019749727013358-1@git.sr.ht>","date":"2026-05-06T04:20:58","name":"[qemu,2/3] Add the Nuked OPL3 emulator","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"325e355e20dd65dd0ef39b28f6a8c4b37b8d9ca9","submitter":{"id":93338,"url":"http://patchwork.ozlabs.org/api/1.1/people/93338/?format=json","name":"~bboe","email":"bboe@git.sr.ht"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/177805349017.32250.15775019749727013358-1@git.sr.ht/mbox/","series":[{"id":502937,"url":"http://patchwork.ozlabs.org/api/1.1/series/502937/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=502937","date":"2026-05-06T05:30:25","name":null,"version":1,"mbox":"http://patchwork.ozlabs.org/series/502937/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2233327/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2233327/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=fail reason=\"key not found in DNS\" header.d=git.sr.ht\n header.i=@git.sr.ht header.a=rsa-sha256 header.s=20240113 header.b=E0/cvaTR;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g9Spt37PPz1yKd\n\tfor ; Wed, 06 May 2026 18:14:44 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wKXOc-0001Ff-BJ; Wed, 06 May 2026 04:14:18 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from ) id 1wKWwG-0000i3-79\n for qemu-devel@nongnu.org; Wed, 06 May 2026 03:45:01 -0400","from mail-a.sr.ht ([46.23.81.152])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from ) id 1wKWwA-0005Cn-3D\n for qemu-devel@nongnu.org; Wed, 06 May 2026 03:44:59 -0400","from git.sr.ht (unknown [46.23.81.155])\n by mail-a.sr.ht (Postfix) with ESMTPSA id 8983E20E6D;\n Wed, 06 May 2026 07:44:50 +0000 (UTC)"],"DKIM-Signature":"a=rsa-sha256; bh=3+wP/vIMmkfO3LJ9pesq4t/M6R76ZDPDIePik4g08h4=;\n c=simple/simple; d=git.sr.ht;\n h=From:Date:Subject:Reply-to:In-Reply-To:To:Cc; q=dns/txt; s=20240113;\n t=1778053490; v=1;\n b=E0/cvaTR6Z3zcdCfdLF+etfaBRQP4Bb+T0Ea4/Ly/NSy1neRMm36wtA5swqJqpGWjFR47aJK\n DTJ/Igmzt91b3Ip1bC8+3R3rRXNiKUTFd5tVr9hiqH4la4n2+Yrz6eK39yE2CQ9WkcS9W+d+MAK\n b4oOQTcYBR2bGVU+uihYzrgcCpb/CI2e3wxUt7jhA5XvsAj1dZdHE4afooon8fEtQHl0oTMzfJ6\n RXz6SVL+M0FHYMLHy0t+fK4kkUS3rrjY/WuPlm3pLk3HCcvEcz1dtv9BMZVpvOTsWK1O2jqU5pE\n lD+hOau216t8jHGHorwwpsGdVeEGC2NCPS9/VFVdl4xeQ==","From":"~bboe ","Date":"Tue, 05 May 2026 21:20:58 -0700","Subject":"[PATCH qemu 2/3] Add the Nuked OPL3 emulator","Message-ID":"<177805349017.32250.15775019749727013358-1@git.sr.ht>","X-Mailer":"git.sr.ht","In-Reply-To":"<177805349017.32250.15775019749727013358-0@git.sr.ht>","To":"qemu-devel@nongnu.org","Cc":"Gerd Hoffmann , Fabiano Rosas ,\n Laurent Vivier , Paolo Bonzini ","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"quoted-printable","MIME-Version":"1.0","Received-SPF":"pass client-ip=46.23.81.152; envelope-from=outgoing@sr.ht;\n helo=mail-a.sr.ht","X-Spam_score_int":"30","X-Spam_score":"3.0","X-Spam_bar":"+++","X-Spam_report":"(3.0 / 5.0 requ) BAYES_00=-1.9, DATE_IN_PAST_03_06=1.592,\n DKIM_INVALID=0.1, DKIM_SIGNED=0.1, FREEMAIL_FORGED_REPLYTO=2.095,\n HK_RANDOM_REPLYTO=1, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=no autolearn_force=no","X-Spam_action":"no action","X-Mailman-Approved-At":"Wed, 06 May 2026 04:14:14 -0400","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Reply-To":"~bboe ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"From: Bryce Boe \n\nI chose this emulator, by Alexey Khokholov, as it appears to be well used among\nDOS-target emulation software.\n\nSource:\nhttps://github.com/nukeykt/Nuked-OPL3/tree/cfedb09efc03f1d7b5fc1f04dd449d77d8c49d50\n\nTwo files were copied verbatim with the following exceptions:\n\n- Added `nuked_` prefix to clearly mark the source.\n- Modified the header import due to the rename\n\nPlease note that I did not adapt the style of these files to make it easier to","diff":"diff with upstream.\n\nI added the test file under unit tests because it does not depend on a running\nQemu instance. There doesn't seem to be precedence for hardware unit tests.\n\nSigned-off-by: Bryce Boe \n---\n hw/audio/meson.build | 2 +-\n hw/audio/nuked_opl3.c | 1530 ++++++++++++++++++++++++++++++++++\n hw/audio/nuked_opl3.h | 173 ++++\n tests/unit/test-nuked-opl3.c | 109 +++\n 4 files changed, 1813 insertions(+), 1 deletion(-)\n create mode 100644 hw/audio/nuked_opl3.c\n create mode 100644 hw/audio/nuked_opl3.h\n create mode 100644 tests/unit/test-nuked-opl3.c\n\ndiff --git a/hw/audio/meson.build b/hw/audio/meson.build\nindex 2154cbdb57..5bd0b6e4c2 100644\n--- a/hw/audio/meson.build\n+++ b/hw/audio/meson.build\n@@ -10,7 +10,7 @@ system_ss.add(when: 'CONFIG_HDA', if_true: files('intel-hda.c', 'hda-codec.c'))\n system_ss.add(when: 'CONFIG_MARVELL_88W8618', if_true: files('marvell_88w8618.c'))\n system_ss.add(when: 'CONFIG_PCSPK', if_true: files('pcspk.c'))\n system_ss.add(when: 'CONFIG_PL041', if_true: files('pl041.c', 'lm4549.c'))\n-system_ss.add(when: 'CONFIG_SB16', if_true: files('sb16.c'))\n+system_ss.add(when: 'CONFIG_SB16', if_true: files('sb16.c', 'nuked_opl3.c'))\n system_ss.add(when: 'CONFIG_VT82C686', if_true: files('via-ac97.c'))\n system_ss.add(when: 'CONFIG_WM8750', if_true: files('wm8750.c'))\n system_ss.add(when: ['CONFIG_VIRTIO_SND', 'CONFIG_VIRTIO'], if_true: files('virtio-snd.c'))\ndiff --git a/hw/audio/nuked_opl3.c b/hw/audio/nuked_opl3.c\nnew file mode 100644\nindex 0000000000..a50817d7bc\n--- /dev/null\n+++ b/hw/audio/nuked_opl3.c\n@@ -0,0 +1,1530 @@\n+/* Nuked OPL3\n+ * Copyright (C) 2013-2020 Nuke.YKT\n+ *\n+ * This file is part of Nuked OPL3.\n+ *\n+ * Nuked OPL3 is free software: you can redistribute it and/or modify\n+ * it under the terms of the GNU Lesser General Public License as\n+ * published by the Free Software Foundation, either version 2.1\n+ * of the License, or (at your option) any later version.\n+ *\n+ * Nuked OPL3 is distributed in the hope that it will be useful,\n+ * but WITHOUT ANY WARRANTY; without even the implied warranty of\n+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n+ * GNU Lesser General Public License for more details.\n+ *\n+ * You should have received a copy of the GNU Lesser General Public License\n+ * along with Nuked OPL3. If not, see .\n+\n+ * Nuked OPL3 emulator.\n+ * Thanks:\n+ * MAME Development Team(Jarek Burczynski, Tatsuyuki Satoh):\n+ * Feedback and Rhythm part calculation information.\n+ * forums.submarine.org.uk(carbon14, opl3):\n+ * Tremolo and phase generator calculation information.\n+ * OPLx decapsulated(Matthew Gambrell, Olli Niemitalo):\n+ * OPL2 ROMs.\n+ * siliconpr0n.org(John McMaster, digshadow):\n+ * YMF262 and VRC VII decaps and die shots.\n+ *\n+ * version: 1.8\n+ */\n+\n+#include \n+#include \n+#include \n+#include \"nuked_opl3.h\"\n+\n+#if OPL_ENABLE_STEREOEXT && !defined OPL_SIN\n+#ifndef _USE_MATH_DEFINES\n+#define _USE_MATH_DEFINES 1\n+#endif\n+#include \n+/* input: [0, 256), output: [0, 65536] */\n+#define OPL_SIN(x) ((int32_t)(sin((x) * M_PI / 512.0) * 65536.0))\n+#endif\n+\n+/* Quirk: Some FM channels are output one sample later on the left side than the right. */\n+#ifndef OPL_QUIRK_CHANNELSAMPLEDELAY\n+#define OPL_QUIRK_CHANNELSAMPLEDELAY (!OPL_ENABLE_STEREOEXT)\n+#endif\n+\n+#define RSM_FRAC 10\n+\n+/* Channel types */\n+\n+enum {\n+ ch_2op = 0,\n+ ch_4op = 1,\n+ ch_4op2 = 2,\n+ ch_drum = 3\n+};\n+\n+/* Envelope key types */\n+\n+enum {\n+ egk_norm = 0x01,\n+ egk_drum = 0x02\n+};\n+\n+\n+/*\n+ logsin table\n+*/\n+\n+static const uint16_t logsinrom[256] = {\n+ 0x859, 0x6c3, 0x607, 0x58b, 0x52e, 0x4e4, 0x4a6, 0x471,\n+ 0x443, 0x41a, 0x3f5, 0x3d3, 0x3b5, 0x398, 0x37e, 0x365,\n+ 0x34e, 0x339, 0x324, 0x311, 0x2ff, 0x2ed, 0x2dc, 0x2cd,\n+ 0x2bd, 0x2af, 0x2a0, 0x293, 0x286, 0x279, 0x26d, 0x261,\n+ 0x256, 0x24b, 0x240, 0x236, 0x22c, 0x222, 0x218, 0x20f,\n+ 0x206, 0x1fd, 0x1f5, 0x1ec, 0x1e4, 0x1dc, 0x1d4, 0x1cd,\n+ 0x1c5, 0x1be, 0x1b7, 0x1b0, 0x1a9, 0x1a2, 0x19b, 0x195,\n+ 0x18f, 0x188, 0x182, 0x17c, 0x177, 0x171, 0x16b, 0x166,\n+ 0x160, 0x15b, 0x155, 0x150, 0x14b, 0x146, 0x141, 0x13c,\n+ 0x137, 0x133, 0x12e, 0x129, 0x125, 0x121, 0x11c, 0x118,\n+ 0x114, 0x10f, 0x10b, 0x107, 0x103, 0x0ff, 0x0fb, 0x0f8,\n+ 0x0f4, 0x0f0, 0x0ec, 0x0e9, 0x0e5, 0x0e2, 0x0de, 0x0db,\n+ 0x0d7, 0x0d4, 0x0d1, 0x0cd, 0x0ca, 0x0c7, 0x0c4, 0x0c1,\n+ 0x0be, 0x0bb, 0x0b8, 0x0b5, 0x0b2, 0x0af, 0x0ac, 0x0a9,\n+ 0x0a7, 0x0a4, 0x0a1, 0x09f, 0x09c, 0x099, 0x097, 0x094,\n+ 0x092, 0x08f, 0x08d, 0x08a, 0x088, 0x086, 0x083, 0x081,\n+ 0x07f, 0x07d, 0x07a, 0x078, 0x076, 0x074, 0x072, 0x070,\n+ 0x06e, 0x06c, 0x06a, 0x068, 0x066, 0x064, 0x062, 0x060,\n+ 0x05e, 0x05c, 0x05b, 0x059, 0x057, 0x055, 0x053, 0x052,\n+ 0x050, 0x04e, 0x04d, 0x04b, 0x04a, 0x048, 0x046, 0x045,\n+ 0x043, 0x042, 0x040, 0x03f, 0x03e, 0x03c, 0x03b, 0x039,\n+ 0x038, 0x037, 0x035, 0x034, 0x033, 0x031, 0x030, 0x02f,\n+ 0x02e, 0x02d, 0x02b, 0x02a, 0x029, 0x028, 0x027, 0x026,\n+ 0x025, 0x024, 0x023, 0x022, 0x021, 0x020, 0x01f, 0x01e,\n+ 0x01d, 0x01c, 0x01b, 0x01a, 0x019, 0x018, 0x017, 0x017,\n+ 0x016, 0x015, 0x014, 0x014, 0x013, 0x012, 0x011, 0x011,\n+ 0x010, 0x00f, 0x00f, 0x00e, 0x00d, 0x00d, 0x00c, 0x00c,\n+ 0x00b, 0x00a, 0x00a, 0x009, 0x009, 0x008, 0x008, 0x007,\n+ 0x007, 0x007, 0x006, 0x006, 0x005, 0x005, 0x005, 0x004,\n+ 0x004, 0x004, 0x003, 0x003, 0x003, 0x002, 0x002, 0x002,\n+ 0x002, 0x001, 0x001, 0x001, 0x001, 0x001, 0x001, 0x001,\n+ 0x000, 0x000, 0x000, 0x000, 0x000, 0x000, 0x000, 0x000\n+};\n+\n+/*\n+ exp table\n+*/\n+\n+static const uint16_t exprom[256] = {\n+ 0x7fa, 0x7f5, 0x7ef, 0x7ea, 0x7e4, 0x7df, 0x7da, 0x7d4,\n+ 0x7cf, 0x7c9, 0x7c4, 0x7bf, 0x7b9, 0x7b4, 0x7ae, 0x7a9,\n+ 0x7a4, 0x79f, 0x799, 0x794, 0x78f, 0x78a, 0x784, 0x77f,\n+ 0x77a, 0x775, 0x770, 0x76a, 0x765, 0x760, 0x75b, 0x756,\n+ 0x751, 0x74c, 0x747, 0x742, 0x73d, 0x738, 0x733, 0x72e,\n+ 0x729, 0x724, 0x71f, 0x71a, 0x715, 0x710, 0x70b, 0x706,\n+ 0x702, 0x6fd, 0x6f8, 0x6f3, 0x6ee, 0x6e9, 0x6e5, 0x6e0,\n+ 0x6db, 0x6d6, 0x6d2, 0x6cd, 0x6c8, 0x6c4, 0x6bf, 0x6ba,\n+ 0x6b5, 0x6b1, 0x6ac, 0x6a8, 0x6a3, 0x69e, 0x69a, 0x695,\n+ 0x691, 0x68c, 0x688, 0x683, 0x67f, 0x67a, 0x676, 0x671,\n+ 0x66d, 0x668, 0x664, 0x65f, 0x65b, 0x657, 0x652, 0x64e,\n+ 0x649, 0x645, 0x641, 0x63c, 0x638, 0x634, 0x630, 0x62b,\n+ 0x627, 0x623, 0x61e, 0x61a, 0x616, 0x612, 0x60e, 0x609,\n+ 0x605, 0x601, 0x5fd, 0x5f9, 0x5f5, 0x5f0, 0x5ec, 0x5e8,\n+ 0x5e4, 0x5e0, 0x5dc, 0x5d8, 0x5d4, 0x5d0, 0x5cc, 0x5c8,\n+ 0x5c4, 0x5c0, 0x5bc, 0x5b8, 0x5b4, 0x5b0, 0x5ac, 0x5a8,\n+ 0x5a4, 0x5a0, 0x59c, 0x599, 0x595, 0x591, 0x58d, 0x589,\n+ 0x585, 0x581, 0x57e, 0x57a, 0x576, 0x572, 0x56f, 0x56b,\n+ 0x567, 0x563, 0x560, 0x55c, 0x558, 0x554, 0x551, 0x54d,\n+ 0x549, 0x546, 0x542, 0x53e, 0x53b, 0x537, 0x534, 0x530,\n+ 0x52c, 0x529, 0x525, 0x522, 0x51e, 0x51b, 0x517, 0x514,\n+ 0x510, 0x50c, 0x509, 0x506, 0x502, 0x4ff, 0x4fb, 0x4f8,\n+ 0x4f4, 0x4f1, 0x4ed, 0x4ea, 0x4e7, 0x4e3, 0x4e0, 0x4dc,\n+ 0x4d9, 0x4d6, 0x4d2, 0x4cf, 0x4cc, 0x4c8, 0x4c5, 0x4c2,\n+ 0x4be, 0x4bb, 0x4b8, 0x4b5, 0x4b1, 0x4ae, 0x4ab, 0x4a8,\n+ 0x4a4, 0x4a1, 0x49e, 0x49b, 0x498, 0x494, 0x491, 0x48e,\n+ 0x48b, 0x488, 0x485, 0x482, 0x47e, 0x47b, 0x478, 0x475,\n+ 0x472, 0x46f, 0x46c, 0x469, 0x466, 0x463, 0x460, 0x45d,\n+ 0x45a, 0x457, 0x454, 0x451, 0x44e, 0x44b, 0x448, 0x445,\n+ 0x442, 0x43f, 0x43c, 0x439, 0x436, 0x433, 0x430, 0x42d,\n+ 0x42a, 0x428, 0x425, 0x422, 0x41f, 0x41c, 0x419, 0x416,\n+ 0x414, 0x411, 0x40e, 0x40b, 0x408, 0x406, 0x403, 0x400\n+};\n+\n+/*\n+ freq mult table multiplied by 2\n+\n+ 1/2, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 10, 12, 12, 15, 15\n+*/\n+\n+static const uint8_t mt[16] = {\n+ 1, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 20, 24, 24, 30, 30\n+};\n+\n+/*\n+ ksl table\n+*/\n+\n+static const uint8_t kslrom[16] = {\n+ 0, 32, 40, 45, 48, 51, 53, 55, 56, 58, 59, 60, 61, 62, 63, 64\n+};\n+\n+static const uint8_t kslshift[4] = {\n+ 8, 1, 2, 0\n+};\n+\n+/*\n+ envelope generator constants\n+*/\n+\n+static const uint8_t eg_incstep[4][4] = {\n+ { 0, 0, 0, 0 },\n+ { 1, 0, 0, 0 },\n+ { 1, 0, 1, 0 },\n+ { 1, 1, 1, 0 }\n+};\n+\n+/*\n+ address decoding\n+*/\n+\n+static const int8_t ad_slot[0x20] = {\n+ 0, 1, 2, 3, 4, 5, -1, -1, 6, 7, 8, 9, 10, 11, -1, -1,\n+ 12, 13, 14, 15, 16, 17, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1\n+};\n+\n+static const uint8_t ch_slot[18] = {\n+ 0, 1, 2, 6, 7, 8, 12, 13, 14, 18, 19, 20, 24, 25, 26, 30, 31, 32\n+};\n+\n+#if OPL_ENABLE_STEREOEXT\n+/*\n+ stereo extension panning table\n+*/\n+\n+static int32_t panpot_lut[256];\n+static uint8_t panpot_lut_build = 0;\n+#endif\n+\n+/*\n+ Envelope generator\n+*/\n+\n+typedef int16_t(*envelope_sinfunc)(uint16_t phase, uint16_t envelope);\n+typedef void(*envelope_genfunc)(opl3_slot *slott);\n+\n+static int16_t OPL3_EnvelopeCalcExp(uint32_t level)\n+{\n+ if (level > 0x1fff)\n+ {\n+ level = 0x1fff;\n+ }\n+ return (exprom[level & 0xffu] << 1) >> (level >> 8);\n+}\n+\n+static int16_t OPL3_EnvelopeCalcSin0(uint16_t phase, uint16_t envelope)\n+{\n+ uint16_t out = 0;\n+ uint16_t neg = 0;\n+ phase &= 0x3ff;\n+ if (phase & 0x200)\n+ {\n+ neg = 0xffff;\n+ }\n+ if (phase & 0x100)\n+ {\n+ out = logsinrom[(phase & 0xffu) ^ 0xffu];\n+ }\n+ else\n+ {\n+ out = logsinrom[phase & 0xffu];\n+ }\n+ return OPL3_EnvelopeCalcExp(out + (envelope << 3)) ^ neg;\n+}\n+\n+static int16_t OPL3_EnvelopeCalcSin1(uint16_t phase, uint16_t envelope)\n+{\n+ uint16_t out = 0;\n+ phase &= 0x3ff;\n+ if (phase & 0x200)\n+ {\n+ out = 0x1000;\n+ }\n+ else if (phase & 0x100)\n+ {\n+ out = logsinrom[(phase & 0xffu) ^ 0xffu];\n+ }\n+ else\n+ {\n+ out = logsinrom[phase & 0xffu];\n+ }\n+ return OPL3_EnvelopeCalcExp(out + (envelope << 3));\n+}\n+\n+static int16_t OPL3_EnvelopeCalcSin2(uint16_t phase, uint16_t envelope)\n+{\n+ uint16_t out = 0;\n+ phase &= 0x3ff;\n+ if (phase & 0x100)\n+ {\n+ out = logsinrom[(phase & 0xffu) ^ 0xffu];\n+ }\n+ else\n+ {\n+ out = logsinrom[phase & 0xffu];\n+ }\n+ return OPL3_EnvelopeCalcExp(out + (envelope << 3));\n+}\n+\n+static int16_t OPL3_EnvelopeCalcSin3(uint16_t phase, uint16_t envelope)\n+{\n+ uint16_t out = 0;\n+ phase &= 0x3ff;\n+ if (phase & 0x100)\n+ {\n+ out = 0x1000;\n+ }\n+ else\n+ {\n+ out = logsinrom[phase & 0xffu];\n+ }\n+ return OPL3_EnvelopeCalcExp(out + (envelope << 3));\n+}\n+\n+static int16_t OPL3_EnvelopeCalcSin4(uint16_t phase, uint16_t envelope)\n+{\n+ uint16_t out = 0;\n+ uint16_t neg = 0;\n+ phase &= 0x3ff;\n+ if ((phase & 0x300) == 0x100)\n+ {\n+ neg = 0xffff;\n+ }\n+ if (phase & 0x200)\n+ {\n+ out = 0x1000;\n+ }\n+ else if (phase & 0x80)\n+ {\n+ out = logsinrom[((phase ^ 0xffu) << 1u) & 0xffu];\n+ }\n+ else\n+ {\n+ out = logsinrom[(phase << 1u) & 0xffu];\n+ }\n+ return OPL3_EnvelopeCalcExp(out + (envelope << 3)) ^ neg;\n+}\n+\n+static int16_t OPL3_EnvelopeCalcSin5(uint16_t phase, uint16_t envelope)\n+{\n+ uint16_t out = 0;\n+ phase &= 0x3ff;\n+ if (phase & 0x200)\n+ {\n+ out = 0x1000;\n+ }\n+ else if (phase & 0x80)\n+ {\n+ out = logsinrom[((phase ^ 0xffu) << 1u) & 0xffu];\n+ }\n+ else\n+ {\n+ out = logsinrom[(phase << 1u) & 0xffu];\n+ }\n+ return OPL3_EnvelopeCalcExp(out + (envelope << 3));\n+}\n+\n+static int16_t OPL3_EnvelopeCalcSin6(uint16_t phase, uint16_t envelope)\n+{\n+ uint16_t neg = 0;\n+ phase &= 0x3ff;\n+ if (phase & 0x200)\n+ {\n+ neg = 0xffff;\n+ }\n+ return OPL3_EnvelopeCalcExp(envelope << 3) ^ neg;\n+}\n+\n+static int16_t OPL3_EnvelopeCalcSin7(uint16_t phase, uint16_t envelope)\n+{\n+ uint16_t out = 0;\n+ uint16_t neg = 0;\n+ phase &= 0x3ff;\n+ if (phase & 0x200)\n+ {\n+ neg = 0xffff;\n+ phase = (phase & 0x1ff) ^ 0x1ff;\n+ }\n+ out = phase << 3;\n+ return OPL3_EnvelopeCalcExp(out + (envelope << 3)) ^ neg;\n+}\n+\n+static const envelope_sinfunc envelope_sin[8] = {\n+ OPL3_EnvelopeCalcSin0,\n+ OPL3_EnvelopeCalcSin1,\n+ OPL3_EnvelopeCalcSin2,\n+ OPL3_EnvelopeCalcSin3,\n+ OPL3_EnvelopeCalcSin4,\n+ OPL3_EnvelopeCalcSin5,\n+ OPL3_EnvelopeCalcSin6,\n+ OPL3_EnvelopeCalcSin7\n+};\n+\n+enum envelope_gen_num\n+{\n+ envelope_gen_num_attack = 0,\n+ envelope_gen_num_decay = 1,\n+ envelope_gen_num_sustain = 2,\n+ envelope_gen_num_release = 3\n+};\n+\n+static void OPL3_EnvelopeUpdateKSL(opl3_slot *slot)\n+{\n+ int16_t ksl = (kslrom[slot->channel->f_num >> 6u] << 2)\n+ - ((0x08 - slot->channel->block) << 5);\n+ if (ksl < 0)\n+ {\n+ ksl = 0;\n+ }\n+ slot->eg_ksl = (uint8_t)ksl;\n+}\n+\n+static void OPL3_EnvelopeCalc(opl3_slot *slot)\n+{\n+ uint8_t nonzero;\n+ uint8_t rate;\n+ uint8_t rate_hi;\n+ uint8_t rate_lo;\n+ uint8_t reg_rate = 0;\n+ uint8_t ks;\n+ uint8_t eg_shift, shift;\n+ uint16_t eg_rout;\n+ int16_t eg_inc;\n+ uint8_t eg_off;\n+ uint8_t reset = 0;\n+ slot->eg_out = slot->eg_rout + (slot->reg_tl << 2)\n+ + (slot->eg_ksl >> kslshift[slot->reg_ksl]) + *slot->trem;\n+ if (slot->key && slot->eg_gen == envelope_gen_num_release)\n+ {\n+ reset = 1;\n+ reg_rate = slot->reg_ar;\n+ }\n+ else\n+ {\n+ switch (slot->eg_gen)\n+ {\n+ case envelope_gen_num_attack:\n+ reg_rate = slot->reg_ar;\n+ break;\n+ case envelope_gen_num_decay:\n+ reg_rate = slot->reg_dr;\n+ break;\n+ case envelope_gen_num_sustain:\n+ if (!slot->reg_type)\n+ {\n+ reg_rate = slot->reg_rr;\n+ }\n+ break;\n+ case envelope_gen_num_release:\n+ reg_rate = slot->reg_rr;\n+ break;\n+ }\n+ }\n+ slot->pg_reset = reset;\n+ ks = slot->channel->ksv >> ((slot->reg_ksr ^ 1) << 1);\n+ nonzero = (reg_rate != 0);\n+ rate = ks + (reg_rate << 2);\n+ rate_hi = rate >> 2;\n+ rate_lo = rate & 0x03;\n+ if (rate_hi & 0x10)\n+ {\n+ rate_hi = 0x0f;\n+ }\n+ eg_shift = rate_hi + slot->chip->eg_add;\n+ shift = 0;\n+ if (nonzero)\n+ {\n+ if (rate_hi < 12)\n+ {\n+ if (slot->chip->eg_state)\n+ {\n+ switch (eg_shift)\n+ {\n+ case 12:\n+ shift = 1;\n+ break;\n+ case 13:\n+ shift = (rate_lo >> 1) & 0x01;\n+ break;\n+ case 14:\n+ shift = rate_lo & 0x01;\n+ break;\n+ default:\n+ break;\n+ }\n+ }\n+ }\n+ else\n+ {\n+ shift = (rate_hi & 0x03) + eg_incstep[rate_lo][slot->chip->eg_timer_lo];\n+ if (shift & 0x04)\n+ {\n+ shift = 0x03;\n+ }\n+ if (!shift)\n+ {\n+ shift = slot->chip->eg_state;\n+ }\n+ }\n+ }\n+ eg_rout = slot->eg_rout;\n+ eg_inc = 0;\n+ eg_off = 0;\n+ /* Instant attack */\n+ if (reset && rate_hi == 0x0f)\n+ {\n+ eg_rout = 0x00;\n+ }\n+ /* Envelope off */\n+ if ((slot->eg_rout & 0x1f8) == 0x1f8)\n+ {\n+ eg_off = 1;\n+ }\n+ if (slot->eg_gen != envelope_gen_num_attack && !reset && eg_off)\n+ {\n+ eg_rout = 0x1ff;\n+ }\n+ switch (slot->eg_gen)\n+ {\n+ case envelope_gen_num_attack:\n+ if (!slot->eg_rout)\n+ {\n+ slot->eg_gen = envelope_gen_num_decay;\n+ }\n+ else if (slot->key && shift > 0 && rate_hi != 0x0f)\n+ {\n+ eg_inc = ~slot->eg_rout >> (4 - shift);\n+ }\n+ break;\n+ case envelope_gen_num_decay:\n+ if ((slot->eg_rout >> 4) == slot->reg_sl)\n+ {\n+ slot->eg_gen = envelope_gen_num_sustain;\n+ }\n+ else if (!eg_off && !reset && shift > 0)\n+ {\n+ eg_inc = 1 << (shift - 1);\n+ }\n+ break;\n+ case envelope_gen_num_sustain:\n+ case envelope_gen_num_release:\n+ if (!eg_off && !reset && shift > 0)\n+ {\n+ eg_inc = 1 << (shift - 1);\n+ }\n+ break;\n+ }\n+ slot->eg_rout = (eg_rout + eg_inc) & 0x1ff;\n+ /* Key off */\n+ if (reset)\n+ {\n+ slot->eg_gen = envelope_gen_num_attack;\n+ }\n+ if (!slot->key)\n+ {\n+ slot->eg_gen = envelope_gen_num_release;\n+ }\n+}\n+\n+static void OPL3_EnvelopeKeyOn(opl3_slot *slot, uint8_t type)\n+{\n+ slot->key |= type;\n+}\n+\n+static void OPL3_EnvelopeKeyOff(opl3_slot *slot, uint8_t type)\n+{\n+ slot->key &= ~type;\n+}\n+\n+/*\n+ Phase Generator\n+*/\n+\n+static void OPL3_PhaseGenerate(opl3_slot *slot)\n+{\n+ opl3_chip *chip;\n+ uint16_t f_num;\n+ uint32_t basefreq;\n+ uint8_t rm_xor, n_bit;\n+ uint32_t noise;\n+ uint16_t phase;\n+\n+ chip = slot->chip;\n+ f_num = slot->channel->f_num;\n+ if (slot->reg_vib)\n+ {\n+ int8_t range;\n+ uint8_t vibpos;\n+\n+ range = (f_num >> 7) & 7;\n+ vibpos = slot->chip->vibpos;\n+\n+ if (!(vibpos & 3))\n+ {\n+ range = 0;\n+ }\n+ else if (vibpos & 1)\n+ {\n+ range >>= 1;\n+ }\n+ range >>= slot->chip->vibshift;\n+\n+ if (vibpos & 4)\n+ {\n+ range = -range;\n+ }\n+ f_num += range;\n+ }\n+ basefreq = (f_num << slot->channel->block) >> 1;\n+ phase = (uint16_t)(slot->pg_phase >> 9);\n+ if (slot->pg_reset)\n+ {\n+ slot->pg_phase = 0;\n+ }\n+ slot->pg_phase += (basefreq * mt[slot->reg_mult]) >> 1;\n+ /* Rhythm mode */\n+ noise = chip->noise;\n+ slot->pg_phase_out = phase;\n+ if (slot->slot_num == 13) /* hh */\n+ {\n+ chip->rm_hh_bit2 = (phase >> 2) & 1;\n+ chip->rm_hh_bit3 = (phase >> 3) & 1;\n+ chip->rm_hh_bit7 = (phase >> 7) & 1;\n+ chip->rm_hh_bit8 = (phase >> 8) & 1;\n+ }\n+ if (slot->slot_num == 17 && (chip->rhy & 0x20)) /* tc */\n+ {\n+ chip->rm_tc_bit3 = (phase >> 3) & 1;\n+ chip->rm_tc_bit5 = (phase >> 5) & 1;\n+ }\n+ if (chip->rhy & 0x20)\n+ {\n+ rm_xor = (chip->rm_hh_bit2 ^ chip->rm_hh_bit7)\n+ | (chip->rm_hh_bit3 ^ chip->rm_tc_bit5)\n+ | (chip->rm_tc_bit3 ^ chip->rm_tc_bit5);\n+ switch (slot->slot_num)\n+ {\n+ case 13: /* hh */\n+ slot->pg_phase_out = rm_xor << 9;\n+ if (rm_xor ^ (noise & 1))\n+ {\n+ slot->pg_phase_out |= 0xd0;\n+ }\n+ else\n+ {\n+ slot->pg_phase_out |= 0x34;\n+ }\n+ break;\n+ case 16: /* sd */\n+ slot->pg_phase_out = (chip->rm_hh_bit8 << 9)\n+ | ((chip->rm_hh_bit8 ^ (noise & 1)) << 8);\n+ break;\n+ case 17: /* tc */\n+ slot->pg_phase_out = (rm_xor << 9) | 0x80;\n+ break;\n+ default:\n+ break;\n+ }\n+ }\n+ n_bit = ((noise >> 14) ^ noise) & 0x01;\n+ chip->noise = (noise >> 1) | (n_bit << 22);\n+}\n+\n+/*\n+ Slot\n+*/\n+\n+static void OPL3_SlotWrite20(opl3_slot *slot, uint8_t data)\n+{\n+ if ((data >> 7) & 0x01)\n+ {\n+ slot->trem = &slot->chip->tremolo;\n+ }\n+ else\n+ {\n+ slot->trem = (uint8_t*)&slot->chip->zeromod;\n+ }\n+ slot->reg_vib = (data >> 6) & 0x01;\n+ slot->reg_type = (data >> 5) & 0x01;\n+ slot->reg_ksr = (data >> 4) & 0x01;\n+ slot->reg_mult = data & 0x0f;\n+}\n+\n+static void OPL3_SlotWrite40(opl3_slot *slot, uint8_t data)\n+{\n+ slot->reg_ksl = (data >> 6) & 0x03;\n+ slot->reg_tl = data & 0x3f;\n+ OPL3_EnvelopeUpdateKSL(slot);\n+}\n+\n+static void OPL3_SlotWrite60(opl3_slot *slot, uint8_t data)\n+{\n+ slot->reg_ar = (data >> 4) & 0x0f;\n+ slot->reg_dr = data & 0x0f;\n+}\n+\n+static void OPL3_SlotWrite80(opl3_slot *slot, uint8_t data)\n+{\n+ slot->reg_sl = (data >> 4) & 0x0f;\n+ if (slot->reg_sl == 0x0f)\n+ {\n+ slot->reg_sl = 0x1f;\n+ }\n+ slot->reg_rr = data & 0x0f;\n+}\n+\n+static void OPL3_SlotWriteE0(opl3_slot *slot, uint8_t data)\n+{\n+ slot->reg_wf = data & 0x07;\n+ if (slot->chip->newm == 0x00)\n+ {\n+ slot->reg_wf &= 0x03;\n+ }\n+}\n+\n+static void OPL3_SlotGenerate(opl3_slot *slot)\n+{\n+ slot->out = envelope_sin[slot->reg_wf](slot->pg_phase_out + *slot->mod, slot->eg_out);\n+}\n+\n+static void OPL3_SlotCalcFB(opl3_slot *slot)\n+{\n+ if (slot->channel->fb != 0x00)\n+ {\n+ slot->fbmod = (slot->prout + slot->out) >> (0x09 - slot->channel->fb);\n+ }\n+ else\n+ {\n+ slot->fbmod = 0;\n+ }\n+ slot->prout = slot->out;\n+}\n+\n+/*\n+ Channel\n+*/\n+\n+static void OPL3_ChannelSetupAlg(opl3_channel *channel);\n+\n+static void OPL3_ChannelUpdateRhythm(opl3_chip *chip, uint8_t data)\n+{\n+ opl3_channel *channel6;\n+ opl3_channel *channel7;\n+ opl3_channel *channel8;\n+ uint8_t chnum;\n+\n+ chip->rhy = data & 0x3f;\n+ if (chip->rhy & 0x20)\n+ {\n+ channel6 = &chip->channel[6];\n+ channel7 = &chip->channel[7];\n+ channel8 = &chip->channel[8];\n+ channel6->out[0] = &channel6->slotz[1]->out;\n+ channel6->out[1] = &channel6->slotz[1]->out;\n+ channel6->out[2] = &chip->zeromod;\n+ channel6->out[3] = &chip->zeromod;\n+ channel7->out[0] = &channel7->slotz[0]->out;\n+ channel7->out[1] = &channel7->slotz[0]->out;\n+ channel7->out[2] = &channel7->slotz[1]->out;\n+ channel7->out[3] = &channel7->slotz[1]->out;\n+ channel8->out[0] = &channel8->slotz[0]->out;\n+ channel8->out[1] = &channel8->slotz[0]->out;\n+ channel8->out[2] = &channel8->slotz[1]->out;\n+ channel8->out[3] = &channel8->slotz[1]->out;\n+ for (chnum = 6; chnum < 9; chnum++)\n+ {\n+ chip->channel[chnum].chtype = ch_drum;\n+ }\n+ OPL3_ChannelSetupAlg(channel6);\n+ OPL3_ChannelSetupAlg(channel7);\n+ OPL3_ChannelSetupAlg(channel8);\n+ /* hh */\n+ if (chip->rhy & 0x01)\n+ {\n+ OPL3_EnvelopeKeyOn(channel7->slotz[0], egk_drum);\n+ }\n+ else\n+ {\n+ OPL3_EnvelopeKeyOff(channel7->slotz[0], egk_drum);\n+ }\n+ /* tc */\n+ if (chip->rhy & 0x02)\n+ {\n+ OPL3_EnvelopeKeyOn(channel8->slotz[1], egk_drum);\n+ }\n+ else\n+ {\n+ OPL3_EnvelopeKeyOff(channel8->slotz[1], egk_drum);\n+ }\n+ /* tom */\n+ if (chip->rhy & 0x04)\n+ {\n+ OPL3_EnvelopeKeyOn(channel8->slotz[0], egk_drum);\n+ }\n+ else\n+ {\n+ OPL3_EnvelopeKeyOff(channel8->slotz[0], egk_drum);\n+ }\n+ /* sd */\n+ if (chip->rhy & 0x08)\n+ {\n+ OPL3_EnvelopeKeyOn(channel7->slotz[1], egk_drum);\n+ }\n+ else\n+ {\n+ OPL3_EnvelopeKeyOff(channel7->slotz[1], egk_drum);\n+ }\n+ /* bd */\n+ if (chip->rhy & 0x10)\n+ {\n+ OPL3_EnvelopeKeyOn(channel6->slotz[0], egk_drum);\n+ OPL3_EnvelopeKeyOn(channel6->slotz[1], egk_drum);\n+ }\n+ else\n+ {\n+ OPL3_EnvelopeKeyOff(channel6->slotz[0], egk_drum);\n+ OPL3_EnvelopeKeyOff(channel6->slotz[1], egk_drum);\n+ }\n+ }\n+ else\n+ {\n+ for (chnum = 6; chnum < 9; chnum++)\n+ {\n+ chip->channel[chnum].chtype = ch_2op;\n+ OPL3_ChannelSetupAlg(&chip->channel[chnum]);\n+ OPL3_EnvelopeKeyOff(chip->channel[chnum].slotz[0], egk_drum);\n+ OPL3_EnvelopeKeyOff(chip->channel[chnum].slotz[1], egk_drum);\n+ }\n+ }\n+}\n+\n+static void OPL3_ChannelWriteA0(opl3_channel *channel, uint8_t data)\n+{\n+ if (channel->chip->newm && channel->chtype == ch_4op2)\n+ {\n+ return;\n+ }\n+ channel->f_num = (channel->f_num & 0x300) | data;\n+ channel->ksv = (channel->block << 1)\n+ | ((channel->f_num >> (0x09 - channel->chip->nts)) & 0x01);\n+ OPL3_EnvelopeUpdateKSL(channel->slotz[0]);\n+ OPL3_EnvelopeUpdateKSL(channel->slotz[1]);\n+ if (channel->chip->newm && channel->chtype == ch_4op)\n+ {\n+ channel->pair->f_num = channel->f_num;\n+ channel->pair->ksv = channel->ksv;\n+ OPL3_EnvelopeUpdateKSL(channel->pair->slotz[0]);\n+ OPL3_EnvelopeUpdateKSL(channel->pair->slotz[1]);\n+ }\n+}\n+\n+static void OPL3_ChannelWriteB0(opl3_channel *channel, uint8_t data)\n+{\n+ if (channel->chip->newm && channel->chtype == ch_4op2)\n+ {\n+ return;\n+ }\n+ channel->f_num = (channel->f_num & 0xff) | ((data & 0x03) << 8);\n+ channel->block = (data >> 2) & 0x07;\n+ channel->ksv = (channel->block << 1)\n+ | ((channel->f_num >> (0x09 - channel->chip->nts)) & 0x01);\n+ OPL3_EnvelopeUpdateKSL(channel->slotz[0]);\n+ OPL3_EnvelopeUpdateKSL(channel->slotz[1]);\n+ if (channel->chip->newm && channel->chtype == ch_4op)\n+ {\n+ channel->pair->f_num = channel->f_num;\n+ channel->pair->block = channel->block;\n+ channel->pair->ksv = channel->ksv;\n+ OPL3_EnvelopeUpdateKSL(channel->pair->slotz[0]);\n+ OPL3_EnvelopeUpdateKSL(channel->pair->slotz[1]);\n+ }\n+}\n+\n+static void OPL3_ChannelSetupAlg(opl3_channel *channel)\n+{\n+ if (channel->chtype == ch_drum)\n+ {\n+ if (channel->ch_num == 7 || channel->ch_num == 8)\n+ {\n+ channel->slotz[0]->mod = &channel->chip->zeromod;\n+ channel->slotz[1]->mod = &channel->chip->zeromod;\n+ return;\n+ }\n+ switch (channel->alg & 0x01)\n+ {\n+ case 0x00:\n+ channel->slotz[0]->mod = &channel->slotz[0]->fbmod;\n+ channel->slotz[1]->mod = &channel->slotz[0]->out;\n+ break;\n+ case 0x01:\n+ channel->slotz[0]->mod = &channel->slotz[0]->fbmod;\n+ channel->slotz[1]->mod = &channel->chip->zeromod;\n+ break;\n+ }\n+ return;\n+ }\n+ if (channel->alg & 0x08)\n+ {\n+ return;\n+ }\n+ if (channel->alg & 0x04)\n+ {\n+ channel->pair->out[0] = &channel->chip->zeromod;\n+ channel->pair->out[1] = &channel->chip->zeromod;\n+ channel->pair->out[2] = &channel->chip->zeromod;\n+ channel->pair->out[3] = &channel->chip->zeromod;\n+ switch (channel->alg & 0x03)\n+ {\n+ case 0x00:\n+ channel->pair->slotz[0]->mod = &channel->pair->slotz[0]->fbmod;\n+ channel->pair->slotz[1]->mod = &channel->pair->slotz[0]->out;\n+ channel->slotz[0]->mod = &channel->pair->slotz[1]->out;\n+ channel->slotz[1]->mod = &channel->slotz[0]->out;\n+ channel->out[0] = &channel->slotz[1]->out;\n+ channel->out[1] = &channel->chip->zeromod;\n+ channel->out[2] = &channel->chip->zeromod;\n+ channel->out[3] = &channel->chip->zeromod;\n+ break;\n+ case 0x01:\n+ channel->pair->slotz[0]->mod = &channel->pair->slotz[0]->fbmod;\n+ channel->pair->slotz[1]->mod = &channel->pair->slotz[0]->out;\n+ channel->slotz[0]->mod = &channel->chip->zeromod;\n+ channel->slotz[1]->mod = &channel->slotz[0]->out;\n+ channel->out[0] = &channel->pair->slotz[1]->out;\n+ channel->out[1] = &channel->slotz[1]->out;\n+ channel->out[2] = &channel->chip->zeromod;\n+ channel->out[3] = &channel->chip->zeromod;\n+ break;\n+ case 0x02:\n+ channel->pair->slotz[0]->mod = &channel->pair->slotz[0]->fbmod;\n+ channel->pair->slotz[1]->mod = &channel->chip->zeromod;\n+ channel->slotz[0]->mod = &channel->pair->slotz[1]->out;\n+ channel->slotz[1]->mod = &channel->slotz[0]->out;\n+ channel->out[0] = &channel->pair->slotz[0]->out;\n+ channel->out[1] = &channel->slotz[1]->out;\n+ channel->out[2] = &channel->chip->zeromod;\n+ channel->out[3] = &channel->chip->zeromod;\n+ break;\n+ case 0x03:\n+ channel->pair->slotz[0]->mod = &channel->pair->slotz[0]->fbmod;\n+ channel->pair->slotz[1]->mod = &channel->chip->zeromod;\n+ channel->slotz[0]->mod = &channel->pair->slotz[1]->out;\n+ channel->slotz[1]->mod = &channel->chip->zeromod;\n+ channel->out[0] = &channel->pair->slotz[0]->out;\n+ channel->out[1] = &channel->slotz[0]->out;\n+ channel->out[2] = &channel->slotz[1]->out;\n+ channel->out[3] = &channel->chip->zeromod;\n+ break;\n+ }\n+ }\n+ else\n+ {\n+ switch (channel->alg & 0x01)\n+ {\n+ case 0x00:\n+ channel->slotz[0]->mod = &channel->slotz[0]->fbmod;\n+ channel->slotz[1]->mod = &channel->slotz[0]->out;\n+ channel->out[0] = &channel->slotz[1]->out;\n+ channel->out[1] = &channel->chip->zeromod;\n+ channel->out[2] = &channel->chip->zeromod;\n+ channel->out[3] = &channel->chip->zeromod;\n+ break;\n+ case 0x01:\n+ channel->slotz[0]->mod = &channel->slotz[0]->fbmod;\n+ channel->slotz[1]->mod = &channel->chip->zeromod;\n+ channel->out[0] = &channel->slotz[0]->out;\n+ channel->out[1] = &channel->slotz[1]->out;\n+ channel->out[2] = &channel->chip->zeromod;\n+ channel->out[3] = &channel->chip->zeromod;\n+ break;\n+ }\n+ }\n+}\n+\n+static void OPL3_ChannelUpdateAlg(opl3_channel *channel)\n+{\n+ channel->alg = channel->con;\n+ if (channel->chip->newm)\n+ {\n+ if (channel->chtype == ch_4op)\n+ {\n+ channel->pair->alg = 0x04 | (channel->con << 1) | (channel->pair->con);\n+ channel->alg = 0x08;\n+ OPL3_ChannelSetupAlg(channel->pair);\n+ }\n+ else if (channel->chtype == ch_4op2)\n+ {\n+ channel->alg = 0x04 | (channel->pair->con << 1) | (channel->con);\n+ channel->pair->alg = 0x08;\n+ OPL3_ChannelSetupAlg(channel);\n+ }\n+ else\n+ {\n+ OPL3_ChannelSetupAlg(channel);\n+ }\n+ }\n+ else\n+ {\n+ OPL3_ChannelSetupAlg(channel);\n+ }\n+}\n+\n+static void OPL3_ChannelWriteC0(opl3_channel *channel, uint8_t data)\n+{\n+ channel->fb = (data & 0x0e) >> 1;\n+ channel->con = data & 0x01;\n+ OPL3_ChannelUpdateAlg(channel);\n+ if (channel->chip->newm)\n+ {\n+ channel->cha = ((data >> 4) & 0x01) ? ~0 : 0;\n+ channel->chb = ((data >> 5) & 0x01) ? ~0 : 0;\n+ channel->chc = ((data >> 6) & 0x01) ? ~0 : 0;\n+ channel->chd = ((data >> 7) & 0x01) ? ~0 : 0;\n+ }\n+ else\n+ {\n+ channel->cha = channel->chb = (uint16_t)~0;\n+ // TODO: Verify on real chip if DAC2 output is disabled in compat mode\n+ channel->chc = channel->chd = 0;\n+ }\n+#if OPL_ENABLE_STEREOEXT\n+ if (!channel->chip->stereoext)\n+ {\n+ channel->leftpan = channel->cha << 16;\n+ channel->rightpan = channel->chb << 16;\n+ }\n+#endif\n+}\n+\n+#if OPL_ENABLE_STEREOEXT\n+static void OPL3_ChannelWriteD0(opl3_channel* channel, uint8_t data)\n+{\n+ if (channel->chip->stereoext)\n+ {\n+ channel->leftpan = panpot_lut[data ^ 0xffu];\n+ channel->rightpan = panpot_lut[data];\n+ }\n+}\n+#endif\n+\n+static void OPL3_ChannelKeyOn(opl3_channel *channel)\n+{\n+ if (channel->chip->newm)\n+ {\n+ if (channel->chtype == ch_4op)\n+ {\n+ OPL3_EnvelopeKeyOn(channel->slotz[0], egk_norm);\n+ OPL3_EnvelopeKeyOn(channel->slotz[1], egk_norm);\n+ OPL3_EnvelopeKeyOn(channel->pair->slotz[0], egk_norm);\n+ OPL3_EnvelopeKeyOn(channel->pair->slotz[1], egk_norm);\n+ }\n+ else if (channel->chtype == ch_2op || channel->chtype == ch_drum)\n+ {\n+ OPL3_EnvelopeKeyOn(channel->slotz[0], egk_norm);\n+ OPL3_EnvelopeKeyOn(channel->slotz[1], egk_norm);\n+ }\n+ }\n+ else\n+ {\n+ OPL3_EnvelopeKeyOn(channel->slotz[0], egk_norm);\n+ OPL3_EnvelopeKeyOn(channel->slotz[1], egk_norm);\n+ }\n+}\n+\n+static void OPL3_ChannelKeyOff(opl3_channel *channel)\n+{\n+ if (channel->chip->newm)\n+ {\n+ if (channel->chtype == ch_4op)\n+ {\n+ OPL3_EnvelopeKeyOff(channel->slotz[0], egk_norm);\n+ OPL3_EnvelopeKeyOff(channel->slotz[1], egk_norm);\n+ OPL3_EnvelopeKeyOff(channel->pair->slotz[0], egk_norm);\n+ OPL3_EnvelopeKeyOff(channel->pair->slotz[1], egk_norm);\n+ }\n+ else if (channel->chtype == ch_2op || channel->chtype == ch_drum)\n+ {\n+ OPL3_EnvelopeKeyOff(channel->slotz[0], egk_norm);\n+ OPL3_EnvelopeKeyOff(channel->slotz[1], egk_norm);\n+ }\n+ }\n+ else\n+ {\n+ OPL3_EnvelopeKeyOff(channel->slotz[0], egk_norm);\n+ OPL3_EnvelopeKeyOff(channel->slotz[1], egk_norm);\n+ }\n+}\n+\n+static void OPL3_ChannelSet4Op(opl3_chip *chip, uint8_t data)\n+{\n+ uint8_t bit;\n+ uint8_t chnum;\n+ for (bit = 0; bit < 6; bit++)\n+ {\n+ chnum = bit;\n+ if (bit >= 3)\n+ {\n+ chnum += 9 - 3;\n+ }\n+ if ((data >> bit) & 0x01)\n+ {\n+ chip->channel[chnum].chtype = ch_4op;\n+ chip->channel[chnum + 3u].chtype = ch_4op2;\n+ OPL3_ChannelUpdateAlg(&chip->channel[chnum]);\n+ }\n+ else\n+ {\n+ chip->channel[chnum].chtype = ch_2op;\n+ chip->channel[chnum + 3u].chtype = ch_2op;\n+ OPL3_ChannelUpdateAlg(&chip->channel[chnum]);\n+ OPL3_ChannelUpdateAlg(&chip->channel[chnum + 3u]);\n+ }\n+ }\n+}\n+\n+static int16_t OPL3_ClipSample(int32_t sample)\n+{\n+ if (sample > 32767)\n+ {\n+ sample = 32767;\n+ }\n+ else if (sample < -32768)\n+ {\n+ sample = -32768;\n+ }\n+ return (int16_t)sample;\n+}\n+\n+static void OPL3_ProcessSlot(opl3_slot *slot)\n+{\n+ OPL3_SlotCalcFB(slot);\n+ OPL3_EnvelopeCalc(slot);\n+ OPL3_PhaseGenerate(slot);\n+ OPL3_SlotGenerate(slot);\n+}\n+\n+inline void OPL3_Generate4Ch(opl3_chip *chip, int16_t *buf4)\n+{\n+ opl3_channel *channel;\n+ opl3_writebuf *writebuf;\n+ int16_t **out;\n+ int32_t mix[2];\n+ uint8_t ii;\n+ int16_t accm;\n+ uint8_t shift = 0;\n+\n+ buf4[1] = OPL3_ClipSample(chip->mixbuff[1]);\n+ buf4[3] = OPL3_ClipSample(chip->mixbuff[3]);\n+\n+#if OPL_QUIRK_CHANNELSAMPLEDELAY\n+ for (ii = 0; ii < 15; ii++)\n+#else\n+ for (ii = 0; ii < 36; ii++)\n+#endif\n+ {\n+ OPL3_ProcessSlot(&chip->slot[ii]);\n+ }\n+\n+ mix[0] = mix[1] = 0;\n+ for (ii = 0; ii < 18; ii++)\n+ {\n+ channel = &chip->channel[ii];\n+ out = channel->out;\n+ accm = *out[0] + *out[1] + *out[2] + *out[3];\n+#if OPL_ENABLE_STEREOEXT\n+ mix[0] += (int16_t)((accm * channel->leftpan) >> 16);\n+#else\n+ mix[0] += (int16_t)(accm & channel->cha);\n+#endif\n+ mix[1] += (int16_t)(accm & channel->chc);\n+ }\n+ chip->mixbuff[0] = mix[0];\n+ chip->mixbuff[2] = mix[1];\n+\n+#if OPL_QUIRK_CHANNELSAMPLEDELAY\n+ for (ii = 15; ii < 18; ii++)\n+ {\n+ OPL3_ProcessSlot(&chip->slot[ii]);\n+ }\n+#endif\n+\n+ buf4[0] = OPL3_ClipSample(chip->mixbuff[0]);\n+ buf4[2] = OPL3_ClipSample(chip->mixbuff[2]);\n+\n+#if OPL_QUIRK_CHANNELSAMPLEDELAY\n+ for (ii = 18; ii < 33; ii++)\n+ {\n+ OPL3_ProcessSlot(&chip->slot[ii]);\n+ }\n+#endif\n+\n+ mix[0] = mix[1] = 0;\n+ for (ii = 0; ii < 18; ii++)\n+ {\n+ channel = &chip->channel[ii];\n+ out = channel->out;\n+ accm = *out[0] + *out[1] + *out[2] + *out[3];\n+#if OPL_ENABLE_STEREOEXT\n+ mix[0] += (int16_t)((accm * channel->rightpan) >> 16);\n+#else\n+ mix[0] += (int16_t)(accm & channel->chb);\n+ #endif\n+ mix[1] += (int16_t)(accm & channel->chd);\n+ }\n+ chip->mixbuff[1] = mix[0];\n+ chip->mixbuff[3] = mix[1];\n+\n+#if OPL_QUIRK_CHANNELSAMPLEDELAY\n+ for (ii = 33; ii < 36; ii++)\n+ {\n+ OPL3_ProcessSlot(&chip->slot[ii]);\n+ }\n+#endif\n+\n+ if ((chip->timer & 0x3f) == 0x3f)\n+ {\n+ chip->tremolopos = (chip->tremolopos + 1) % 210;\n+ }\n+ if (chip->tremolopos < 105)\n+ {\n+ chip->tremolo = chip->tremolopos >> chip->tremoloshift;\n+ }\n+ else\n+ {\n+ chip->tremolo = (210 - chip->tremolopos) >> chip->tremoloshift;\n+ }\n+\n+ if ((chip->timer & 0x3ff) == 0x3ff)\n+ {\n+ chip->vibpos = (chip->vibpos + 1) & 7;\n+ }\n+\n+ chip->timer++;\n+\n+ if (chip->eg_state)\n+ {\n+ while (shift < 13 && ((chip->eg_timer >> shift) & 1) == 0)\n+ {\n+ shift++;\n+ }\n+ if (shift > 12)\n+ {\n+ chip->eg_add = 0;\n+ }\n+ else\n+ {\n+ chip->eg_add = shift + 1;\n+ }\n+ chip->eg_timer_lo = (uint8_t)(chip->eg_timer & 0x3u);\n+ }\n+\n+ if (chip->eg_timerrem || chip->eg_state)\n+ {\n+ if (chip->eg_timer == UINT64_C(0xfffffffff))\n+ {\n+ chip->eg_timer = 0;\n+ chip->eg_timerrem = 1;\n+ }\n+ else\n+ {\n+ chip->eg_timer++;\n+ chip->eg_timerrem = 0;\n+ }\n+ }\n+\n+ chip->eg_state ^= 1;\n+\n+ while ((writebuf = &chip->writebuf[chip->writebuf_cur]), writebuf->time <= chip->writebuf_samplecnt)\n+ {\n+ if (!(writebuf->reg & 0x200))\n+ {\n+ break;\n+ }\n+ writebuf->reg &= 0x1ff;\n+ OPL3_WriteReg(chip, writebuf->reg, writebuf->data);\n+ chip->writebuf_cur = (chip->writebuf_cur + 1) % OPL_WRITEBUF_SIZE;\n+ }\n+ chip->writebuf_samplecnt++;\n+}\n+\n+void OPL3_Generate(opl3_chip *chip, int16_t *buf)\n+{\n+ int16_t samples[4];\n+ OPL3_Generate4Ch(chip, samples);\n+ buf[0] = samples[0];\n+ buf[1] = samples[1];\n+}\n+\n+void OPL3_Generate4ChResampled(opl3_chip *chip, int16_t *buf4)\n+{\n+ while (chip->samplecnt >= chip->rateratio)\n+ {\n+ chip->oldsamples[0] = chip->samples[0];\n+ chip->oldsamples[1] = chip->samples[1];\n+ chip->oldsamples[2] = chip->samples[2];\n+ chip->oldsamples[3] = chip->samples[3];\n+ OPL3_Generate4Ch(chip, chip->samples);\n+ chip->samplecnt -= chip->rateratio;\n+ }\n+ buf4[0] = (int16_t)((chip->oldsamples[0] * (chip->rateratio - chip->samplecnt)\n+ + chip->samples[0] * chip->samplecnt) / chip->rateratio);\n+ buf4[1] = (int16_t)((chip->oldsamples[1] * (chip->rateratio - chip->samplecnt)\n+ + chip->samples[1] * chip->samplecnt) / chip->rateratio);\n+ buf4[2] = (int16_t)((chip->oldsamples[2] * (chip->rateratio - chip->samplecnt)\n+ + chip->samples[2] * chip->samplecnt) / chip->rateratio);\n+ buf4[3] = (int16_t)((chip->oldsamples[3] * (chip->rateratio - chip->samplecnt)\n+ + chip->samples[3] * chip->samplecnt) / chip->rateratio);\n+ chip->samplecnt += 1 << RSM_FRAC;\n+}\n+\n+void OPL3_GenerateResampled(opl3_chip *chip, int16_t *buf)\n+{\n+ int16_t samples[4];\n+ OPL3_Generate4ChResampled(chip, samples);\n+ buf[0] = samples[0];\n+ buf[1] = samples[1];\n+}\n+\n+void OPL3_Reset(opl3_chip *chip, uint32_t samplerate)\n+{\n+ opl3_slot *slot;\n+ opl3_channel *channel;\n+ uint8_t slotnum;\n+ uint8_t channum;\n+ uint8_t local_ch_slot;\n+\n+ memset(chip, 0, sizeof(opl3_chip));\n+ for (slotnum = 0; slotnum < 36; slotnum++)\n+ {\n+ slot = &chip->slot[slotnum];\n+ slot->chip = chip;\n+ slot->mod = &chip->zeromod;\n+ slot->eg_rout = 0x1ff;\n+ slot->eg_out = 0x1ff;\n+ slot->eg_gen = envelope_gen_num_release;\n+ slot->trem = (uint8_t*)&chip->zeromod;\n+ slot->slot_num = slotnum;\n+ }\n+ for (channum = 0; channum < 18; channum++)\n+ {\n+ channel = &chip->channel[channum];\n+ local_ch_slot = ch_slot[channum];\n+ channel->slotz[0] = &chip->slot[local_ch_slot];\n+ channel->slotz[1] = &chip->slot[local_ch_slot + 3u];\n+ chip->slot[local_ch_slot].channel = channel;\n+ chip->slot[local_ch_slot + 3u].channel = channel;\n+ if ((channum % 9) < 3)\n+ {\n+ channel->pair = &chip->channel[channum + 3u];\n+ }\n+ else if ((channum % 9) < 6)\n+ {\n+ channel->pair = &chip->channel[channum - 3u];\n+ }\n+ channel->chip = chip;\n+ channel->out[0] = &chip->zeromod;\n+ channel->out[1] = &chip->zeromod;\n+ channel->out[2] = &chip->zeromod;\n+ channel->out[3] = &chip->zeromod;\n+ channel->chtype = ch_2op;\n+ channel->cha = 0xffff;\n+ channel->chb = 0xffff;\n+#if OPL_ENABLE_STEREOEXT\n+ channel->leftpan = 0x10000;\n+ channel->rightpan = 0x10000;\n+#endif\n+ channel->ch_num = channum;\n+ OPL3_ChannelSetupAlg(channel);\n+ }\n+ chip->noise = 1;\n+ chip->rateratio = (samplerate << RSM_FRAC) / 49716;\n+ chip->tremoloshift = 4;\n+ chip->vibshift = 1;\n+\n+#if OPL_ENABLE_STEREOEXT\n+ if (!panpot_lut_build)\n+ {\n+ int32_t i;\n+ for (i = 0; i < 256; i++)\n+ {\n+ panpot_lut[i] = OPL_SIN(i);\n+ }\n+ panpot_lut_build = 1;\n+ }\n+#endif\n+}\n+\n+void OPL3_WriteReg(opl3_chip *chip, uint16_t reg, uint8_t v)\n+{\n+ uint8_t high = (reg >> 8) & 0x01;\n+ uint8_t regm = reg & 0xff;\n+ switch (regm & 0xf0)\n+ {\n+ case 0x00:\n+ if (high)\n+ {\n+ switch (regm & 0x0f)\n+ {\n+ case 0x04:\n+ OPL3_ChannelSet4Op(chip, v);\n+ break;\n+ case 0x05:\n+ chip->newm = v & 0x01;\n+#if OPL_ENABLE_STEREOEXT\n+ chip->stereoext = (v >> 1) & 0x01;\n+#endif\n+ break;\n+ }\n+ }\n+ else\n+ {\n+ switch (regm & 0x0f)\n+ {\n+ case 0x08:\n+ chip->nts = (v >> 6) & 0x01;\n+ break;\n+ }\n+ }\n+ break;\n+ case 0x20:\n+ case 0x30:\n+ if (ad_slot[regm & 0x1fu] >= 0)\n+ {\n+ OPL3_SlotWrite20(&chip->slot[18u * high + ad_slot[regm & 0x1fu]], v);\n+ }\n+ break;\n+ case 0x40:\n+ case 0x50:\n+ if (ad_slot[regm & 0x1fu] >= 0)\n+ {\n+ OPL3_SlotWrite40(&chip->slot[18u * high + ad_slot[regm & 0x1fu]], v);\n+ }\n+ break;\n+ case 0x60:\n+ case 0x70:\n+ if (ad_slot[regm & 0x1fu] >= 0)\n+ {\n+ OPL3_SlotWrite60(&chip->slot[18u * high + ad_slot[regm & 0x1fu]], v);\n+ }\n+ break;\n+ case 0x80:\n+ case 0x90:\n+ if (ad_slot[regm & 0x1fu] >= 0)\n+ {\n+ OPL3_SlotWrite80(&chip->slot[18u * high + ad_slot[regm & 0x1fu]], v);\n+ }\n+ break;\n+ case 0xe0:\n+ case 0xf0:\n+ if (ad_slot[regm & 0x1fu] >= 0)\n+ {\n+ OPL3_SlotWriteE0(&chip->slot[18u * high + ad_slot[regm & 0x1fu]], v);\n+ }\n+ break;\n+ case 0xa0:\n+ if ((regm & 0x0f) < 9)\n+ {\n+ OPL3_ChannelWriteA0(&chip->channel[9u * high + (regm & 0x0fu)], v);\n+ }\n+ break;\n+ case 0xb0:\n+ if (regm == 0xbd && !high)\n+ {\n+ chip->tremoloshift = (((v >> 7) ^ 1) << 1) + 2;\n+ chip->vibshift = ((v >> 6) & 0x01) ^ 1;\n+ OPL3_ChannelUpdateRhythm(chip, v);\n+ }\n+ else if ((regm & 0x0f) < 9)\n+ {\n+ OPL3_ChannelWriteB0(&chip->channel[9u * high + (regm & 0x0fu)], v);\n+ if (v & 0x20)\n+ {\n+ OPL3_ChannelKeyOn(&chip->channel[9u * high + (regm & 0x0fu)]);\n+ }\n+ else\n+ {\n+ OPL3_ChannelKeyOff(&chip->channel[9u * high + (regm & 0x0fu)]);\n+ }\n+ }\n+ break;\n+ case 0xc0:\n+ if ((regm & 0x0f) < 9)\n+ {\n+ OPL3_ChannelWriteC0(&chip->channel[9u * high + (regm & 0x0fu)], v);\n+ }\n+ break;\n+#if OPL_ENABLE_STEREOEXT\n+ case 0xd0:\n+ if ((regm & 0x0f) < 9)\n+ {\n+ OPL3_ChannelWriteD0(&chip->channel[9u * high + (regm & 0x0fu)], v);\n+ }\n+ break;\n+#endif\n+ }\n+}\n+\n+void OPL3_WriteRegBuffered(opl3_chip *chip, uint16_t reg, uint8_t v)\n+{\n+ uint64_t time1, time2;\n+ opl3_writebuf *writebuf;\n+ uint32_t writebuf_last;\n+\n+ writebuf_last = chip->writebuf_last;\n+ writebuf = &chip->writebuf[writebuf_last];\n+\n+ if (writebuf->reg & 0x200)\n+ {\n+ OPL3_WriteReg(chip, writebuf->reg & 0x1ff, writebuf->data);\n+\n+ chip->writebuf_cur = (writebuf_last + 1) % OPL_WRITEBUF_SIZE;\n+ chip->writebuf_samplecnt = writebuf->time;\n+ }\n+\n+ writebuf->reg = reg | 0x200;\n+ writebuf->data = v;\n+ time1 = chip->writebuf_lasttime + OPL_WRITEBUF_DELAY;\n+ time2 = chip->writebuf_samplecnt;\n+\n+ if (time1 < time2)\n+ {\n+ time1 = time2;\n+ }\n+\n+ writebuf->time = time1;\n+ chip->writebuf_lasttime = time1;\n+ chip->writebuf_last = (writebuf_last + 1) % OPL_WRITEBUF_SIZE;\n+}\n+\n+void OPL3_Generate4ChStream(opl3_chip *chip, int16_t *sndptr1, int16_t *sndptr2, uint32_t numsamples)\n+{\n+ uint_fast32_t i;\n+ int16_t samples[4];\n+\n+ for(i = 0; i < numsamples; i++)\n+ {\n+ OPL3_Generate4ChResampled(chip, samples);\n+ sndptr1[0] = samples[0];\n+ sndptr1[1] = samples[1];\n+ sndptr2[0] = samples[2];\n+ sndptr2[1] = samples[3];\n+ sndptr1 += 2;\n+ sndptr2 += 2;\n+ }\n+}\n+\n+void OPL3_GenerateStream(opl3_chip *chip, int16_t *sndptr, uint32_t numsamples)\n+{\n+ uint_fast32_t i;\n+\n+ for(i = 0; i < numsamples; i++)\n+ {\n+ OPL3_GenerateResampled(chip, sndptr);\n+ sndptr += 2;\n+ }\n+}\ndiff --git a/hw/audio/nuked_opl3.h b/hw/audio/nuked_opl3.h\nnew file mode 100644\nindex 0000000000..03126921c8\n--- /dev/null\n+++ b/hw/audio/nuked_opl3.h\n@@ -0,0 +1,173 @@\n+/* Nuked OPL3\n+ * Copyright (C) 2013-2020 Nuke.YKT\n+ *\n+ * This file is part of Nuked OPL3.\n+ *\n+ * Nuked OPL3 is free software: you can redistribute it and/or modify\n+ * it under the terms of the GNU Lesser General Public License as\n+ * published by the Free Software Foundation, either version 2.1\n+ * of the License, or (at your option) any later version.\n+ *\n+ * Nuked OPL3 is distributed in the hope that it will be useful,\n+ * but WITHOUT ANY WARRANTY; without even the implied warranty of\n+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n+ * GNU Lesser General Public License for more details.\n+ *\n+ * You should have received a copy of the GNU Lesser General Public License\n+ * along with Nuked OPL3. If not, see .\n+\n+ * Nuked OPL3 emulator.\n+ * Thanks:\n+ * MAME Development Team(Jarek Burczynski, Tatsuyuki Satoh):\n+ * Feedback and Rhythm part calculation information.\n+ * forums.submarine.org.uk(carbon14, opl3):\n+ * Tremolo and phase generator calculation information.\n+ * OPLx decapsulated(Matthew Gambrell, Olli Niemitalo):\n+ * OPL2 ROMs.\n+ * siliconpr0n.org(John McMaster, digshadow):\n+ * YMF262 and VRC VII decaps and die shots.\n+ *\n+ * version: 1.8\n+ */\n+\n+#ifndef OPL_OPL3_H\n+#define OPL_OPL3_H\n+\n+#ifdef __cplusplus\n+extern \"C\" {\n+#endif\n+\n+#include \n+\n+#ifndef OPL_ENABLE_STEREOEXT\n+#define OPL_ENABLE_STEREOEXT 0\n+#endif\n+\n+#define OPL_WRITEBUF_SIZE 1024\n+#define OPL_WRITEBUF_DELAY 2\n+\n+typedef struct _opl3_slot opl3_slot;\n+typedef struct _opl3_channel opl3_channel;\n+typedef struct _opl3_chip opl3_chip;\n+\n+struct _opl3_slot {\n+ opl3_channel *channel;\n+ opl3_chip *chip;\n+ int16_t out;\n+ int16_t fbmod;\n+ int16_t *mod;\n+ int16_t prout;\n+ uint16_t eg_rout;\n+ uint16_t eg_out;\n+ uint8_t eg_inc;\n+ uint8_t eg_gen;\n+ uint8_t eg_rate;\n+ uint8_t eg_ksl;\n+ uint8_t *trem;\n+ uint8_t reg_vib;\n+ uint8_t reg_type;\n+ uint8_t reg_ksr;\n+ uint8_t reg_mult;\n+ uint8_t reg_ksl;\n+ uint8_t reg_tl;\n+ uint8_t reg_ar;\n+ uint8_t reg_dr;\n+ uint8_t reg_sl;\n+ uint8_t reg_rr;\n+ uint8_t reg_wf;\n+ uint8_t key;\n+ uint32_t pg_reset;\n+ uint32_t pg_phase;\n+ uint16_t pg_phase_out;\n+ uint8_t slot_num;\n+};\n+\n+struct _opl3_channel {\n+ opl3_slot *slotz[2];/*Don't use \"slots\" keyword to avoid conflict with Qt applications*/\n+ opl3_channel *pair;\n+ opl3_chip *chip;\n+ int16_t *out[4];\n+\n+#if OPL_ENABLE_STEREOEXT\n+ int32_t leftpan;\n+ int32_t rightpan;\n+#endif\n+\n+ uint8_t chtype;\n+ uint16_t f_num;\n+ uint8_t block;\n+ uint8_t fb;\n+ uint8_t con;\n+ uint8_t alg;\n+ uint8_t ksv;\n+ uint16_t cha, chb;\n+ uint16_t chc, chd;\n+ uint8_t ch_num;\n+};\n+\n+typedef struct _opl3_writebuf {\n+ uint64_t time;\n+ uint16_t reg;\n+ uint8_t data;\n+} opl3_writebuf;\n+\n+struct _opl3_chip {\n+ opl3_channel channel[18];\n+ opl3_slot slot[36];\n+ uint16_t timer;\n+ uint64_t eg_timer;\n+ uint8_t eg_timerrem;\n+ uint8_t eg_state;\n+ uint8_t eg_add;\n+ uint8_t eg_timer_lo;\n+ uint8_t newm;\n+ uint8_t nts;\n+ uint8_t rhy;\n+ uint8_t vibpos;\n+ uint8_t vibshift;\n+ uint8_t tremolo;\n+ uint8_t tremolopos;\n+ uint8_t tremoloshift;\n+ uint32_t noise;\n+ int16_t zeromod;\n+ int32_t mixbuff[4];\n+ uint8_t rm_hh_bit2;\n+ uint8_t rm_hh_bit3;\n+ uint8_t rm_hh_bit7;\n+ uint8_t rm_hh_bit8;\n+ uint8_t rm_tc_bit3;\n+ uint8_t rm_tc_bit5;\n+\n+#if OPL_ENABLE_STEREOEXT\n+ uint8_t stereoext;\n+#endif\n+\n+ /* OPL3L */\n+ int32_t rateratio;\n+ int32_t samplecnt;\n+ int16_t oldsamples[4];\n+ int16_t samples[4];\n+\n+ uint64_t writebuf_samplecnt;\n+ uint32_t writebuf_cur;\n+ uint32_t writebuf_last;\n+ uint64_t writebuf_lasttime;\n+ opl3_writebuf writebuf[OPL_WRITEBUF_SIZE];\n+};\n+\n+void OPL3_Generate(opl3_chip *chip, int16_t *buf);\n+void OPL3_GenerateResampled(opl3_chip *chip, int16_t *buf);\n+void OPL3_Reset(opl3_chip *chip, uint32_t samplerate);\n+void OPL3_WriteReg(opl3_chip *chip, uint16_t reg, uint8_t v);\n+void OPL3_WriteRegBuffered(opl3_chip *chip, uint16_t reg, uint8_t v);\n+void OPL3_GenerateStream(opl3_chip *chip, int16_t *sndptr, uint32_t numsamples);\n+\n+void OPL3_Generate4Ch(opl3_chip *chip, int16_t *buf4);\n+void OPL3_Generate4ChResampled(opl3_chip *chip, int16_t *buf4);\n+void OPL3_Generate4ChStream(opl3_chip *chip, int16_t *sndptr1, int16_t *sndptr2, uint32_t numsamples);\n+\n+#ifdef __cplusplus\n+}\n+#endif\n+\n+#endif\ndiff --git a/tests/unit/test-nuked-opl3.c b/tests/unit/test-nuked-opl3.c\nnew file mode 100644\nindex 0000000000..123c41e838\n--- /dev/null\n+++ b/tests/unit/test-nuked-opl3.c\n@@ -0,0 +1,109 @@\n+/*\n+ * Tests for vendored Nuked-OPL3.\n+ *\n+ * SPDX-License-Identifier: GPL-2.0-or-later\n+ */\n+#include \"qemu/osdep.h\"\n+#include \"hw/audio/nuked_opl3.h\"\n+\n+#define OPL_FREQ 49716\n+\n+static const struct {\n+ uint16_t reg;\n+ uint8_t val;\n+} sequence[] = {\n+ /* Modulator slot 0 */\n+ { 0x20, 0x01 }, { 0x40, 0x10 }, { 0x60, 0xF0 }, { 0x80, 0x77 },\n+ /* Carrier slot 3 */\n+ { 0x23, 0x01 }, { 0x43, 0x00 }, { 0x63, 0xF0 }, { 0x83, 0x77 },\n+ /* Carrier waveform 7: OPL3-only; OPL2 masks to waveform 3 */\n+ { 0xE3, 0x07 },\n+ /* Frequency + key on */\n+ { 0xA0, 0x40 }, { 0xB0, 0x32 },\n+};\n+\n+\n+static void test_basic_tone_nonzero(void)\n+{\n+ int16_t buffer[8192];\n+ opl3_chip chip;\n+ unsigned peak = 0;\n+\n+ OPL3_Reset(&chip, OPL_FREQ);\n+ OPL3_WriteRegBuffered(&chip, 0x105, 0x01);\n+\n+ for (unsigned i = 0; i < ARRAY_SIZE(sequence); i++) {\n+ OPL3_WriteRegBuffered(&chip, sequence[i].reg, sequence[i].val);\n+ }\n+ OPL3_GenerateStream(&chip, buffer, 4096);\n+\n+ for (unsigned i = 0; i < 8192; i++) {\n+ peak = MAX(peak, (unsigned)abs(buffer[i]));\n+ }\n+\n+ if (g_test_verbose()) {\n+ g_test_message(\"test_basic_tone_nonzero peak=%u\", peak);\n+ }\n+\n+ g_assert_cmpuint(peak, >, 1000);\n+}\n+\n+static void test_opl2_opl3_distinct(void)\n+{\n+ int16_t buffer_opl2[8192];\n+ int16_t buffer_opl3[8192];\n+ opl3_chip chip_opl2;\n+ opl3_chip chip_opl3;\n+\n+ OPL3_Reset(&chip_opl2, OPL_FREQ);\n+ OPL3_Reset(&chip_opl3, OPL_FREQ);\n+ OPL3_WriteRegBuffered(&chip_opl3, 0x105, 0x01);\n+\n+ for (unsigned i = 0; i < ARRAY_SIZE(sequence); i++) {\n+ OPL3_WriteRegBuffered(&chip_opl2, sequence[i].reg, sequence[i].val);\n+ OPL3_WriteRegBuffered(&chip_opl3, sequence[i].reg, sequence[i].val);\n+ }\n+ OPL3_GenerateStream(&chip_opl2, buffer_opl2, 4096);\n+ OPL3_GenerateStream(&chip_opl3, buffer_opl3, 4096);\n+\n+ g_assert_cmpint(memcmp(buffer_opl2, buffer_opl3, sizeof(buffer_opl2)),\n+ !=, 0);\n+}\n+\n+static void test_reset_silent(void)\n+{\n+ int16_t buffer[2048];\n+ opl3_chip chip;\n+\n+ memset(buffer, 0xcc, sizeof(buffer));\n+ OPL3_Reset(&chip, OPL_FREQ);\n+ OPL3_GenerateStream(&chip, buffer, 1024);\n+\n+ for (unsigned i = 0; i < 2048; i++) {\n+ g_assert_cmpint(buffer[i], ==, 0);\n+ }\n+}\n+\n+static void test_status_after_reset(void)\n+{\n+ opl3_chip chip;\n+\n+ memset(&chip, 0xcc, sizeof(chip));\n+ OPL3_Reset(&chip, OPL_FREQ);\n+ g_assert_cmpint(chip.timer, ==, 0);\n+ g_assert_cmpint(chip.rhy, ==, 0);\n+ g_assert_cmpint(chip.newm, ==, 0);\n+ g_assert_cmpint(chip.channel[0].f_num, ==, 0);\n+ g_assert_cmpint(chip.channel[0].block, ==, 0);\n+}\n+\n+int main(int argc, char **argv)\n+{\n+ g_test_init(&argc, &argv, NULL);\n+ g_test_add_func(\"/nuked_opl3/basic_tone_nonzero\", test_basic_tone_nonzero);\n+ g_test_add_func(\"/nuked_opl3/opl2_vs_opl3_distinct\",\n+ test_opl2_vs_opl3_distinct);\n+ g_test_add_func(\"/nuked_opl3/reset_silent\", test_reset_silent);\n+ g_test_add_func(\"/nuked_opl3/status_after_reset\", test_status_after_reset);\n+ return g_test_run();\n+}\n","prefixes":["qemu","2/3"]}