{"id":2233326,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2233326/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/177805349017.32250.15775019749727013358-2@git.sr.ht/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.1/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<177805349017.32250.15775019749727013358-2@git.sr.ht>","date":"2026-05-06T05:30:25","name":"[qemu,3/3] Add OPL3 support to SB16","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"f90da2292bd4dde43555769488a5bed67b997d3e","submitter":{"id":93338,"url":"http://patchwork.ozlabs.org/api/1.1/people/93338/?format=json","name":"~bboe","email":"bboe@git.sr.ht"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/177805349017.32250.15775019749727013358-2@git.sr.ht/mbox/","series":[{"id":502937,"url":"http://patchwork.ozlabs.org/api/1.1/series/502937/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=502937","date":"2026-05-06T05:30:25","name":null,"version":1,"mbox":"http://patchwork.ozlabs.org/series/502937/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2233326/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2233326/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=fail reason=\"key not found in DNS\" header.d=git.sr.ht\n header.i=@git.sr.ht header.a=rsa-sha256 header.s=20240113 header.b=mRzMXkM4;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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Wed, 06 May 2026 03:45:00 -0400","from git.sr.ht (unknown [46.23.81.155])\n by mail-a.sr.ht (Postfix) with ESMTPSA id CDE2420E6E;\n Wed, 06 May 2026 07:44:50 +0000 (UTC)"],"DKIM-Signature":"a=rsa-sha256; bh=JwHLBcJVcH4kV4SWyKth5pyWlJIYa0m+/eHjJhU5F8Q=;\n c=simple/simple; d=git.sr.ht;\n h=From:Date:Subject:Reply-to:In-Reply-To:To:Cc; q=dns/txt; s=20240113;\n t=1778053490; v=1;\n b=mRzMXkM4rTEz8OfGC0XgiXpaP5ihuf2y3R2MBamMl//t4quhX+88vf8i5yNmN3b0DekMtSpS\n 7Ym80GisljSLD2fTZjBs9PFmK5wYCjsjHSusROgVygLy1mKSTVqIHFIpMyiUtK2KJnPWaZCqmDz\n xkAJSC5mbn9DFFt5I2x9dMTIhG6A58o+eqV+Yl2MTwJOdfplLfIRygLM34NkGlLpotxhBvGRrBp\n LEChMabljvWTSQF/WaJwFkggWpBw0xppkyLVIstrhHsaaDavHf9VR/Gc95oxtsQI+gED7OAjyEz\n /LbBkoSGI963HCFOOE3Am/soQaKc9v1NAkePMZDi/sBFQ==","From":"~bboe ","Date":"Tue, 05 May 2026 22:30:25 -0700","Subject":"[PATCH qemu 3/3] Add OPL3 support to SB16","Message-ID":"<177805349017.32250.15775019749727013358-2@git.sr.ht>","X-Mailer":"git.sr.ht","In-Reply-To":"<177805349017.32250.15775019749727013358-0@git.sr.ht>","To":"qemu-devel@nongnu.org","Cc":"Gerd Hoffmann , Fabiano Rosas ,\n Laurent Vivier , Paolo Bonzini ","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"quoted-printable","MIME-Version":"1.0","Received-SPF":"pass client-ip=46.23.81.152; envelope-from=outgoing@sr.ht;\n helo=mail-a.sr.ht","X-Spam_score_int":"14","X-Spam_score":"1.4","X-Spam_bar":"+","X-Spam_report":"(1.4 / 5.0 requ) BAYES_00=-1.9, DKIM_INVALID=0.1,\n DKIM_SIGNED=0.1, FREEMAIL_FORGED_REPLYTO=2.095, HK_RANDOM_REPLYTO=1,\n SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no","X-Spam_action":"no action","X-Mailman-Approved-At":"Wed, 06 May 2026 04:14:14 -0400","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Reply-To":"~bboe ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"From: Bryce Boe \n\nNuked-OPL3 silently drops writes to bank-0 registers 0x02-0x04, so we maintain\nthe status byte ourselves. sb16_opl3_write updates opl3_status when the guest\nwrites register 0x04 (Timer Control). We use a similar advance-on-write pattern\nas hw/audio/adlib.c uses with fmopl.\n\nSigned-off-by: Bryce Boe \n---\n hw/audio/sb16.c | 176 ++++++++++++++++++++++++++++++++++-\n tests/qtest/meson.build | 2 +-\n tests/qtest/sb16-opl3-test.c | 45 +++++++++\n 3 files changed, 217 insertions(+), 6 deletions(-)\n create mode 100644 tests/qtest/sb16-opl3-test.c","diff":"diff --git a/hw/audio/sb16.c b/hw/audio/sb16.c\nindex 1838d3ef7b..a05337d9f9 100644\n--- a/hw/audio/sb16.c\n+++ b/hw/audio/sb16.c\n@@ -24,6 +24,7 @@\n \n #include \"qemu/osdep.h\"\n #include \"hw/audio/model.h\"\n+#include \"hw/audio/nuked_opl3.h\"\n #include \"qemu/audio.h\"\n #include \"hw/core/irq.h\"\n #include \"hw/isa/isa.h\"\n@@ -112,8 +113,22 @@ struct SB16State {\n int mixer_nreg;\n uint8_t mixer_regs[256];\n PortioList portio_list;\n+\n+ /* OPL3 (FM) integration; see nuked_opl3.h */\n+ opl3_chip opl3;\n+ bool opl3_active;\n+ uint16_t opl3_latched_reg;\n+ int16_t *opl3_mix_buffer;\n+ PortioList opl3_portio_list_388;\n+ PortioList opl3_portio_list_mirror;\n+ unsigned int opl3_samples;\n+ uint8_t opl3_status;\n+ SWVoiceOut *opl3_voice;\n };\n \n+/* OPL native sample rate: 14.31818 MHz / 288. */\n+#define SB16_OPL3_FREQ 49716\n+\n #define SAMPLE_RATE_MIN 5000\n #define SAMPLE_RATE_MAX 45000\n \n@@ -1325,6 +1340,30 @@ static int sb16_post_load (void *opaque, int version_id)\n return 0;\n }\n \n+static bool sb16_opl3_needed(void *opaque)\n+{\n+ SB16State *state = opaque;\n+ return state->opl3_active;\n+}\n+\n+static const VMStateDescription vmstate_sb16_opl3 = {\n+ .name = \"sb16/opl3\",\n+ .version_id = 1,\n+ .minimum_version_id = 1,\n+ .needed = sb16_opl3_needed,\n+ /*\n+ * FM waveform state does not survive snapshots, so\n+ * audio restarts after a snapshot reload until the guest writes\n+ * registers again.\n+ */\n+ .fields = (const VMStateField[]) {\n+ VMSTATE_BOOL(opl3_active, SB16State),\n+ VMSTATE_UINT16(opl3_latched_reg, SB16State),\n+ VMSTATE_UINT8(opl3_status, SB16State),\n+ VMSTATE_END_OF_LIST()\n+ }\n+};\n+\n static const VMStateDescription vmstate_sb16 = {\n .name = \"sb16\",\n .version_id = 1,\n@@ -1380,6 +1419,10 @@ static const VMStateDescription vmstate_sb16 = {\n VMSTATE_BUFFER (mixer_regs, SB16State),\n \n VMSTATE_END_OF_LIST ()\n+ },\n+ .subsections = (const VMStateDescription * const []) {\n+ &vmstate_sb16_opl3,\n+ NULL\n }\n };\n \n@@ -1393,6 +1436,120 @@ static const MemoryRegionPortio sb16_ioport_list[] = {\n PORTIO_END_OF_LIST (),\n };\n \n+static void sb16_opl3_callback(void *opaque, int free)\n+{\n+ unsigned int samples;\n+ SB16State *state = opaque;\n+\n+ if (!state->opl3_active || !state->opl3_voice || free < 4) {\n+ return;\n+ }\n+\n+ /* stereo has 4 bytes per frame; cap to mix_buffer capacity */\n+ samples = MIN((unsigned int)(free / 4), state->opl3_samples);\n+\n+ OPL3_GenerateStream(&state->opl3, state->opl3_mix_buffer, samples);\n+ audio_be_write(state->audio_be, state->opl3_voice, state->opl3_mix_buffer,\n+ samples * 4);\n+}\n+\n+static uint32_t sb16_opl3_read(void *opaque, uint32_t nport)\n+{\n+ SB16State *state = opaque;\n+ return state->opl3_status;\n+}\n+\n+static void sb16_opl3_write(void *opaque, uint32_t nport, uint32_t val)\n+{\n+ int port_offset = nport & 3;\n+ SB16State *state = opaque;\n+\n+ if (!state->opl3_active) {\n+ state->opl3_active = true;\n+ audio_be_set_active_out(state->audio_be, state->opl3_voice, 1);\n+ }\n+\n+ switch (port_offset) {\n+ case 0: /* bank-0 address latch */\n+ state->opl3_latched_reg = val & 0xff;\n+ break;\n+ case 2: /* bank-1 address latch */\n+ state->opl3_latched_reg = (val & 0xff) | 0x100;\n+ break;\n+ case 1: /* bank-0 data commit */\n+ case 3: /* bank-1 data commit; bank bit already in opl3_latched_reg */\n+ /*\n+ * Bank-0 reg 0x04 is OPL Timer Control. Nuked-OPL3 ignores it,\n+ * so we synthesize the status byte here. Bit 7 = IRQ reset\n+ * (clears status); else status reflects start+mask bits per\n+ * AdLib/OPL3 semantics:\n+ * ctrl bit 0: T1 start ctrl bit 6: T1 mask\n+ * ctrl bit 1: T2 start ctrl bit 5: T2 mask\n+ */\n+ if (state->opl3_latched_reg == 0x04) {\n+ if (val & 0x80) {\n+ state->opl3_status = 0;\n+ } else {\n+ uint8_t status = 0;\n+ if ((val & 0x01) && !(val & 0x40)) {\n+ status |= 0x40;\n+ }\n+ if ((val & 0x02) && !(val & 0x20)) {\n+ status |= 0x20;\n+ }\n+ if (status) {\n+ status |= 0x80;\n+ }\n+ state->opl3_status = status;\n+ }\n+ }\n+ OPL3_WriteRegBuffered(&state->opl3, state->opl3_latched_reg,\n+ val & 0xff);\n+ break;\n+ default:\n+ qemu_log_mask(LOG_GUEST_ERROR,\n+ \"sb16-opl3: invalid port_offset %d\\n\", port_offset);\n+ }\n+}\n+\n+static const MemoryRegionPortio sb16_opl3_portio_list_388[] = {\n+ { 0, 4, 1, .read = sb16_opl3_read, .write = sb16_opl3_write },\n+ PORTIO_END_OF_LIST(),\n+};\n+static const MemoryRegionPortio sb16_opl3_portio_list_mirror[] = {\n+ { 0, 4, 1, .read = sb16_opl3_read, .write = sb16_opl3_write },\n+ PORTIO_END_OF_LIST(),\n+};\n+\n+static void sb16_opl3_realize(SB16State *state, ISADevice *isadev)\n+{\n+ struct audsettings as = {\n+ .freq = SB16_OPL3_FREQ,\n+ .nchannels = 2,\n+ .fmt = AUDIO_FORMAT_S16,\n+ .big_endian = HOST_BIG_ENDIAN,\n+ };\n+\n+ OPL3_Reset(&state->opl3, SB16_OPL3_FREQ);\n+\n+ state->opl3_voice = audio_be_open_out(state->audio_be, NULL, \"sb16-opl3\",\n+ state, sb16_opl3_callback, &as);\n+ if (!state->opl3_voice) {\n+ warn_report(\"sb16: OPL3 audio voice open failed; FM disabled\");\n+ return;\n+ }\n+\n+ state->opl3_samples =\n+ audio_be_get_buffer_size_out(state->audio_be, state->opl3_voice) / 4;\n+ state->opl3_mix_buffer = g_malloc0(state->opl3_samples * 4);\n+ isa_register_portio_list(isadev, &state->opl3_portio_list_388,\n+ 0x388, sb16_opl3_portio_list_388,\n+ state, \"sb16-opl3-alt\");\n+ isa_register_portio_list(isadev, &state->opl3_portio_list_mirror,\n+ state->port, sb16_opl3_portio_list_mirror,\n+ state, \"sb16-opl3-mirror\");\n+}\n+\n \n static void sb16_initfn (Object *obj)\n {\n@@ -1437,6 +1594,8 @@ static void sb16_realizefn (DeviceState *dev, Error **errp)\n isa_register_portio_list(isadev, &s->portio_list, s->port,\n sb16_ioport_list, s, \"sb16\");\n \n+ sb16_opl3_realize(s, isadev);\n+\n k = ISADMA_GET_CLASS(s->isa_hdma);\n k->register_channel(s->isa_hdma, s->hdma, SB_read_DMA, s);\n \n@@ -1446,6 +1605,12 @@ static void sb16_realizefn (DeviceState *dev, Error **errp)\n s->can_write = 1;\n }\n \n+static void sb16_finalizefn(Object *obj)\n+{\n+ SB16State *state = SB16(obj);\n+ g_free(state->opl3_mix_buffer);\n+}\n+\n static const Property sb16_properties[] = {\n DEFINE_AUDIO_PROPERTIES(SB16State, audio_be),\n DEFINE_PROP_UINT32 (\"version\", SB16State, ver, 0x0405), /* 4.5 */\n@@ -1467,11 +1632,12 @@ static void sb16_class_initfn(ObjectClass *klass, const void *data)\n }\n \n static const TypeInfo sb16_info = {\n- .name = TYPE_SB16,\n- .parent = TYPE_ISA_DEVICE,\n- .instance_size = sizeof (SB16State),\n- .instance_init = sb16_initfn,\n- .class_init = sb16_class_initfn,\n+ .name = TYPE_SB16,\n+ .parent = TYPE_ISA_DEVICE,\n+ .instance_size = sizeof(SB16State),\n+ .instance_init = sb16_initfn,\n+ .instance_finalize = sb16_finalizefn,\n+ .class_init = sb16_class_initfn,\n };\n \n static void sb16_register_types (void)\ndiff --git a/tests/qtest/meson.build b/tests/qtest/meson.build\nindex 43f83ffd3a..734132fb08 100644\n--- a/tests/qtest/meson.build\n+++ b/tests/qtest/meson.build\n@@ -92,7 +92,7 @@ qtests_i386 = \\\n (config_all_devices.has_key('CONFIG_VIRTIO_SCSI') ? ['fuzz-virtio-scsi-test'] : []) + \\\n (config_all_devices.has_key('CONFIG_VIRTIO_BALLOON') ? ['virtio-balloon-test'] : []) + \\\n (config_all_devices.has_key('CONFIG_Q35') ? ['q35-test'] : []) + \\\n- (config_all_devices.has_key('CONFIG_SB16') ? ['fuzz-sb16-test'] : []) + \\\n+ (config_all_devices.has_key('CONFIG_SB16') ? ['fuzz-sb16-test','sb16-opl3-test'] : []) + \\\n (config_all_devices.has_key('CONFIG_SDHCI_PCI') ? ['fuzz-sdcard-test'] : []) + \\\n (config_all_devices.has_key('CONFIG_ESP_PCI') ? ['am53c974-test'] : []) + \\\n (config_all_devices.has_key('CONFIG_VTD') ? ['intel-iommu-test'] : []) + \\\ndiff --git a/tests/qtest/sb16-opl3-test.c b/tests/qtest/sb16-opl3-test.c\nnew file mode 100644\nindex 0000000000..debd47e0ed\n--- /dev/null\n+++ b/tests/qtest/sb16-opl3-test.c\n@@ -0,0 +1,45 @@\n+/*\n+ * QTest integration for SB16 OPL3.\n+ *\n+ * SPDX-License-Identifier: GPL-2.0-or-later\n+ */\n+#include \"qemu/osdep.h\"\n+#include \"libqtest.h\"\n+\n+static void test_opl3_basic(void)\n+{\n+ QTestState *s = qtest_init(\"-M pc \"\n+ \"-device sb16,audiodev=snd0 \"\n+ \"-audiodev none,id=snd0\");\n+\n+ g_assert_cmpuint(qtest_inb(s, 0x388), ==, 0x00);\n+ g_assert_cmpuint(qtest_inb(s, 0x220), ==, 0x00);\n+\n+ qtest_outb(s, 0x388, 0x04);\n+\n+ /* Start Timer 1 unmasked */\n+ qtest_outb(s, 0x389, 0x21);\n+ g_assert_cmpuint(qtest_inb(s, 0x388), ==, 0xC0);\n+\n+ /* IRQ reset (ctrl = 0x80) clears the status byte. */\n+ qtest_outb(s, 0x389, 0x80);\n+ g_assert_cmpuint(qtest_inb(s, 0x388), ==, 0x00);\n+\n+ /* Start Timer 2 unmasked */\n+ qtest_outb(s, 0x389, 0x42);\n+ g_assert_cmpuint(qtest_inb(s, 0x388), ==, 0xA0);\n+\n+ /* Mirror access at SB16 base (default 0x220). */\n+ g_assert_cmpuint(qtest_inb(s, 0x220), ==, 0xA0);\n+\n+ qtest_quit(s);\n+}\n+\n+int main(int argc, char **argv)\n+{\n+ g_test_init(&argc, &argv, NULL);\n+ if (qtest_has_machine(\"pc\")) {\n+ qtest_add_func(\"sb16-opl3/basic\", test_opl3_basic);\n+ }\n+ return g_test_run();\n+}\n","prefixes":["qemu","3/3"]}