{"id":2232519,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2232519/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260504-feat-mte4-v5-14-232a648e63c6@gmail.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.1/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260504-feat-mte4-v5-14-232a648e63c6@gmail.com>","date":"2026-05-04T15:50:47","name":"[v5,14/15] tests/tcg: add test for MTE FAR","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"f953c5f0d08013116ffb33d92a88e63b2075b53a","submitter":{"id":91863,"url":"http://patchwork.ozlabs.org/api/1.1/people/91863/?format=json","name":"Gabriel Brookman","email":"brookmangabriel@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260504-feat-mte4-v5-14-232a648e63c6@gmail.com/mbox/","series":[{"id":502688,"url":"http://patchwork.ozlabs.org/api/1.1/series/502688/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=502688","date":"2026-05-04T15:50:33","name":"target/arm: add support for MTE4","version":5,"mbox":"http://patchwork.ozlabs.org/series/502688/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2232519/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2232519/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=fO3m9a+t;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=\"utf-8\"","Content-Transfer-Encoding":"7bit","Message-Id":"<20260504-feat-mte4-v5-14-232a648e63c6@gmail.com>","References":"<20260504-feat-mte4-v5-0-232a648e63c6@gmail.com>","In-Reply-To":"<20260504-feat-mte4-v5-0-232a648e63c6@gmail.com>","To":"qemu-devel@nongnu.org","Cc":"Peter Maydell ,\n Gustavo Romero ,\n Richard Henderson , qemu-arm@nongnu.org,\n Laurent Vivier ,\n Gabriel Brookman , Helge Deller ,\n Pierrick Bouvier ,\n Pierrick Bouvier ","X-Mailer":"b4 0.15.2","X-Developer-Signature":"v=1; a=ed25519-sha256; t=1777909867; l=2355;\n i=brookmangabriel@gmail.com; s=20251009; h=from:subject:message-id;\n bh=t9UKuOxOMkff21yBSwiqqFvgFWXDPNIeJTAexYT0IVc=;\n b=VvH0Dw+EA0dM1al44fe87BzYHM1c7TEalnO+8csbUNT90B88V4p/ES2x2ERnZPMq6TF4JfASw\n 4U72rhH18ycB7pUM2h8Mv4ya+L96lnMn5ruW5B0W37hmyCyGx2Ir9Zm","X-Developer-Key":"i=brookmangabriel@gmail.com; a=ed25519;\n pk=m9TtPDal6WzoHNnQiHHKf8dTrv3DUCPUUTujuo8vNrw=","Received-SPF":"pass client-ip=2607:f8b0:4864:20::729;\n envelope-from=brookmangabriel@gmail.com; helo=mail-qk1-x729.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"This functionality was previously enabled but not advertised or tested.\nThis commit adds a new test, mte-9, that tests the code for proper\nfull-address reporting. FEAT_MTE_TAGGED_FAR requires that FAR_ELx\nreport the full logical address, including tag bits.\n\nSigned-off-by: Gabriel Brookman \nReviewed-by: Richard Henderson \n---\n tests/tcg/aarch64/Makefile.target | 2 +-\n tests/tcg/aarch64/mte-9.c | 48 +++++++++++++++++++++++++++++++++++++++\n 2 files changed, 49 insertions(+), 1 deletion(-)","diff":"diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target\nindex 9fa8687453..b491cfb5e1 100644\n--- a/tests/tcg/aarch64/Makefile.target\n+++ b/tests/tcg/aarch64/Makefile.target\n@@ -64,7 +64,7 @@ AARCH64_TESTS += bti-2\n \n # MTE Tests\n ifneq ($(CROSS_CC_HAS_ARMV8_MTE),)\n-AARCH64_TESTS += mte-1 mte-2 mte-3 mte-4 mte-5 mte-6 mte-7 mte-8\n+AARCH64_TESTS += mte-1 mte-2 mte-3 mte-4 mte-5 mte-6 mte-7 mte-8 mte-9\n mte-%: CFLAGS += $(CROSS_CC_HAS_ARMV8_MTE)\n endif\n \ndiff --git a/tests/tcg/aarch64/mte-9.c b/tests/tcg/aarch64/mte-9.c\nnew file mode 100644\nindex 0000000000..9626a90c13\n--- /dev/null\n+++ b/tests/tcg/aarch64/mte-9.c\n@@ -0,0 +1,48 @@\n+/*\n+ * Memory tagging, full-address reporting.\n+ *\n+ * Copyright (c) 2021 Linaro Ltd\n+ * SPDX-License-Identifier: GPL-2.0-or-later\n+ */\n+\n+#include \"mte.h\"\n+\n+static void *faulting_ptr;\n+\n+void pass(int sig, siginfo_t *info, void *uc)\n+{\n+ assert(faulting_ptr == info->si_addr);\n+ exit(0);\n+}\n+\n+int main(int ac, char **av)\n+{\n+ struct sigaction sa;\n+ int *p0, *p1, *p2;\n+ long excl = 1;\n+\n+ enable_mte(PR_MTE_TCF_SYNC);\n+ p0 = alloc_mte_mem(sizeof(*p0));\n+\n+ /* Create two differently tagged pointers. */\n+ asm(\"irg %0,%1,%2\" : \"=r\"(p1) : \"r\"(p0), \"r\"(excl));\n+ asm(\"gmi %0,%1,%0\" : \"+r\"(excl) : \"r\" (p1));\n+ assert(excl != 1);\n+ asm(\"irg %0,%1,%2\" : \"=r\"(p2) : \"r\"(p0), \"r\"(excl));\n+ assert(p1 != p2);\n+\n+ /* Store the tag from the first pointer. */\n+ asm(\"stg %0, [%0]\" : : \"r\"(p1));\n+\n+ *p1 = 0;\n+\n+ memset(&sa, 0, sizeof(sa));\n+ sa.sa_sigaction = pass;\n+ sa.sa_flags = SA_SIGINFO;\n+ sigaction(SIGSEGV, &sa, NULL);\n+\n+ faulting_ptr = p2;\n+ *p2 = 0;\n+\n+ abort();\n+}\n","prefixes":["v5","14/15"]}