{"id":2232518,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2232518/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260504-feat-mte4-v5-8-232a648e63c6@gmail.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.1/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260504-feat-mte4-v5-8-232a648e63c6@gmail.com>","date":"2026-05-04T15:50:41","name":"[v5,08/15] target/arm: add canonical MTE check logic","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"0bf329868e9e24a7a24bbb21b49f1b3e09520316","submitter":{"id":91863,"url":"http://patchwork.ozlabs.org/api/1.1/people/91863/?format=json","name":"Gabriel Brookman","email":"brookmangabriel@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260504-feat-mte4-v5-8-232a648e63c6@gmail.com/mbox/","series":[{"id":502688,"url":"http://patchwork.ozlabs.org/api/1.1/series/502688/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=502688","date":"2026-05-04T15:50:33","name":"target/arm: add support for MTE4","version":5,"mbox":"http://patchwork.ozlabs.org/series/502688/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2232518/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2232518/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=Qhfm84CA;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=\"utf-8\"","Content-Transfer-Encoding":"7bit","Message-Id":"<20260504-feat-mte4-v5-8-232a648e63c6@gmail.com>","References":"<20260504-feat-mte4-v5-0-232a648e63c6@gmail.com>","In-Reply-To":"<20260504-feat-mte4-v5-0-232a648e63c6@gmail.com>","To":"qemu-devel@nongnu.org","Cc":"Peter Maydell ,\n Gustavo Romero ,\n Richard Henderson , qemu-arm@nongnu.org,\n Laurent Vivier ,\n Gabriel Brookman , Helge Deller ,\n Pierrick Bouvier ,\n Pierrick Bouvier ","X-Mailer":"b4 0.15.2","X-Developer-Signature":"v=1; a=ed25519-sha256; t=1777909867; l=3050;\n i=brookmangabriel@gmail.com; s=20251009; h=from:subject:message-id;\n bh=taM0bnxg3Adu1LAuHiTNsQ5a1pkgBVcVSoxgQ7RpzL8=;\n b=PXd9SOLs+rn6qhmUWlWvmWQWAVLFXXbh9o9n60RMRL4bdcbQfcALc5MMOxfMDTMctJ4H5y8ei\n ExvE4fUmm9aCFso3sEwdLDg4d+v+1Xc/dWwrfr/AbUj31gMayUIFC/u","X-Developer-Key":"i=brookmangabriel@gmail.com; a=ed25519;\n pk=m9TtPDal6WzoHNnQiHHKf8dTrv3DUCPUUTujuo8vNrw=","Received-SPF":"pass client-ip=2607:f8b0:4864:20::72e;\n envelope-from=brookmangabriel@gmail.com; helo=mail-qk1-x72e.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"With MTX active, address tag bits are checked for canonicity if the\ncorresponding memory regions are not allocation tagged. See\nAArch64_CheckTag.\n\nSigned-off-by: Gabriel Brookman \n---\n target/arm/tcg/mte_helper.c | 30 ++++++++++++++++++++++++++----\n 1 file changed, 26 insertions(+), 4 deletions(-)","diff":"diff --git a/target/arm/tcg/mte_helper.c b/target/arm/tcg/mte_helper.c\nindex 61cdf92c54..d35e3ef04d 100644\n--- a/target/arm/tcg/mte_helper.c\n+++ b/target/arm/tcg/mte_helper.c\n@@ -858,6 +858,14 @@ static int mte_probe_int(CPUARMState *env, uint32_t desc, uint64_t ptr,\n mem1 = allocation_tag_mem(env, mmu_idx, ptr, type, sizem1 + 1,\n MMU_DATA_LOAD, ra);\n if (!mem1) {\n+ /*\n+ * If mtx is enabled, then the access is MemTag_CanonicallyTagged,\n+ * otherwise it is Untagged. See AArch64.S1DecodeMemAttrs and\n+ * AArch64.S1DisabledOutput.\n+ */\n+ if (mtx_check(desc, bit55)) {\n+ return tag_is_canonical(ptr_tag, bit55);\n+ }\n return 1;\n }\n /* Perform all of the comparisons. */\n@@ -873,18 +881,24 @@ static int mte_probe_int(CPUARMState *env, uint32_t desc, uint64_t ptr,\n \n /*\n * Perform all of the comparisons.\n- * Note the possible but unlikely case of the operation spanning\n- * two pages that do not both have tagging enabled.\n+ * Note the possible but unlikely case of the operation spanning two\n+ * pages that do not both have allocation tagging enabled. This can\n+ * happen with or without mtx (canonical tagging) enabled.\n */\n n = c = (next_page - tag_first) / TAG_GRANULE;\n if (mem1) {\n n = checkN(mem1, ptr & TAG_GRANULE, ptr_tag, c);\n+ } else if (mtx_check(desc, bit55) &&\n+ !tag_is_canonical(ptr_tag, bit55)) {\n+ return 0;\n }\n if (n == c) {\n- if (!mem2) {\n+ if (mem2) {\n+ n += checkN(mem2, 0, ptr_tag, tag_count - c);\n+ } else if (!mtx_check(desc, bit55) ||\n+ tag_is_canonical(ptr_tag, bit55)) {\n return 1;\n }\n- n += checkN(mem2, 0, ptr_tag, tag_count - c);\n }\n }\n \n@@ -999,6 +1013,14 @@ uint64_t HELPER(mte_check_zva)(CPUARMState *env, uint32_t desc, uint64_t ptr)\n mem = allocation_tag_mem(env, mmu_idx, align_ptr, MMU_DATA_STORE,\n dcz_bytes, MMU_DATA_LOAD, ra);\n if (!mem) {\n+ /*\n+ * If mtx is enabled, then the access is MemTag_CanonicallyTagged,\n+ * otherwise it is Untagged. See AArch64.S1DecodeMemAttrs and\n+ * AArch64.S1DisabledOutput.\n+ */\n+ if (mtx_check(desc, bit55) && !tag_is_canonical(ptr_tag, bit55)) {\n+ mte_check_fail(env, desc, ptr, ra);\n+ }\n goto done;\n }\n \n","prefixes":["v5","08/15"]}