{"id":2232333,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2232333/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260504-qom-tests-v2-10-ef7e3dc94f7a@redhat.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.1/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260504-qom-tests-v2-10-ef7e3dc94f7a@redhat.com>","date":"2026-05-04T11:34:58","name":"[v2,10/46] hw/intc/apic: move checks to realize()","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"b2fe546b232f4a015e4fcc7197714bebf699f63d","submitter":{"id":66774,"url":"http://patchwork.ozlabs.org/api/1.1/people/66774/?format=json","name":"Marc-André Lureau","email":"marcandre.lureau@redhat.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260504-qom-tests-v2-10-ef7e3dc94f7a@redhat.com/mbox/","series":[{"id":502649,"url":"http://patchwork.ozlabs.org/api/1.1/series/502649/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=502649","date":"2026-05-04T11:34:48","name":"Fix various QOM object life-cycle issues","version":2,"mbox":"http://patchwork.ozlabs.org/series/502649/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2232333/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2232333/checks/","tags":{},"headers":{"Return-Path":"<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=redhat.com header.i=@redhat.com header.a=rsa-sha256\n header.s=mimecast20190719 header.b=WBdzyYQS;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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a=openpgp;\n fpr=87A9BD933F87C606D276F62DDAE8E10975969CE5","X-Scanned-By":"MIMEDefang 3.0 on 10.30.177.17","Received-SPF":"pass client-ip=170.10.133.124;\n envelope-from=marcandre.lureau@redhat.com;\n helo=us-smtp-delivery-124.mimecast.com","X-Spam_score_int":"-24","X-Spam_score":"-2.5","X-Spam_bar":"--","X-Spam_report":"(-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.444,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001,\n SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development <qemu-devel.nongnu.org>","List-Unsubscribe":"<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>","List-Archive":"<https://lists.nongnu.org/archive/html/qemu-devel>","List-Post":"<mailto:qemu-devel@nongnu.org>","List-Help":"<mailto:qemu-devel-request@nongnu.org?subject=help>","List-Subscribe":"<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"apic_common_set_id() dereferences s->cpu to check for x2APIC support\nwhen the APIC ID is >= 255. On a standalone APIC object that has not\nbeen attached to a CPU, s->cpu is NULL, causing a segfault.\n\nTo solve this, move validation during realize().\n\nFixes: b5ee0468e9d2 (\"apic: add support for x2APIC mode\")\nSigned-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>\n---\n hw/intc/apic_common.c  | 23 +++++++++++++----------\n target/i386/cpu-apic.c |  6 +-----\n 2 files changed, 14 insertions(+), 15 deletions(-)","diff":"diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c\nindex bf4abc21d7b..49c03a5bcee 100644\n--- a/hw/intc/apic_common.c\n+++ b/hw/intc/apic_common.c\n@@ -257,6 +257,19 @@ static void apic_common_realize(DeviceState *dev, Error **errp)\n     static DeviceState *vapic;\n     uint32_t instance_id = s->initial_apic_id;\n \n+    if (!s->cpu) {\n+        error_setg(errp, \"APIC is not attached to a CPU\");\n+        return;\n+    }\n+\n+    if (s->initial_apic_id >= 255 &&\n+        !cpu_has_x2apic_feature(&s->cpu->env)) {\n+        error_setg(errp, \"APIC ID %d requires x2APIC feature in CPU\",\n+                   s->initial_apic_id);\n+        error_append_hint(errp, \"Try x2apic=on in -cpu.\\n\");\n+        return;\n+    }\n+\n     /* Normally initial APIC ID should be no more than hundreds */\n     assert(instance_id != VMSTATE_INSTANCE_ID_ANY);\n \n@@ -410,7 +423,6 @@ static void apic_common_set_id(Object *obj, Visitor *v, const char *name,\n     APICCommonState *s = APIC_COMMON(obj);\n     DeviceState *dev = DEVICE(obj);\n     uint32_t value;\n-    Error *local_err = NULL;\n \n     if (dev->realized) {\n         qdev_prop_set_after_realize(dev, name, errp);\n@@ -421,15 +433,6 @@ static void apic_common_set_id(Object *obj, Visitor *v, const char *name,\n         return;\n     }\n \n-    if (value >= 255 && !cpu_has_x2apic_feature(&s->cpu->env)) {\n-        error_setg(&local_err,\n-                   \"APIC ID %d requires x2APIC feature in CPU\",\n-                   value);\n-        error_append_hint(&local_err, \"Try x2apic=on in -cpu.\\n\");\n-        error_propagate(errp, local_err);\n-        return;\n-    }\n-\n     s->initial_apic_id = value;\n     s->id = (uint8_t)value;\n }\ndiff --git a/target/i386/cpu-apic.c b/target/i386/cpu-apic.c\nindex eaa10ad2a3d..f4f7f6b4d67 100644\n--- a/target/i386/cpu-apic.c\n+++ b/target/i386/cpu-apic.c\n@@ -57,11 +57,7 @@ void x86_cpu_apic_create(X86CPU *cpu, Error **errp)\n     cpu->apic_state->cpu = cpu;\n     cpu->apic_state->apicbase = APIC_DEFAULT_ADDRESS | MSR_IA32_APICBASE_ENABLE;\n \n-    /*\n-     * apic_common_set_id needs to check if the CPU has x2APIC\n-     * feature in case APIC ID >= 255, so we need to set cpu->apic_state->cpu\n-     * before setting APIC ID\n-     */\n+    /* cpu must be set before realize, which validates the APIC ID */\n     qdev_prop_set_uint32(DEVICE(cpu->apic_state), \"id\", cpu->apic_id);\n }\n \n","prefixes":["v2","10/46"]}