{"id":2232321,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2232321/?format=json","web_url":"http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260504110058.2373236-4-sergey.temerkhanov@intel.com/","project":{"id":46,"url":"http://patchwork.ozlabs.org/api/1.1/projects/46/?format=json","name":"Intel Wired Ethernet development","link_name":"intel-wired-lan","list_id":"intel-wired-lan.osuosl.org","list_email":"intel-wired-lan@osuosl.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260504110058.2373236-4-sergey.temerkhanov@intel.com>","date":"2026-05-04T11:00:58","name":"[iwl-net,v1,3/3] ice: Cache struct ice_hw pointer for split register reads","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"cc1ddd912c90acbecc89077d9baea1ed7df759e5","submitter":{"id":85162,"url":"http://patchwork.ozlabs.org/api/1.1/people/85162/?format=json","name":"Temerkhanov, Sergey","email":"sergey.temerkhanov@intel.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260504110058.2373236-4-sergey.temerkhanov@intel.com/mbox/","series":[{"id":502644,"url":"http://patchwork.ozlabs.org/api/1.1/series/502644/?format=json","web_url":"http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=502644","date":"2026-05-04T11:00:55","name":"Rework ctrl_pf pointer usage in struct ice_adapter","version":1,"mbox":"http://patchwork.ozlabs.org/series/502644/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2232321/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2232321/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","intel-wired-lan@lists.osuosl.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","intel-wired-lan@lists.osuosl.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=osuosl.org header.i=@osuosl.org header.a=rsa-sha256\n header.s=default header.b=n+ekkMpG;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=osuosl.org\n (client-ip=2605:bc80:3010::138; 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a=\"78939690\"","E=Sophos;i=\"6.23,215,1770624000\"; d=\"scan'208\";a=\"78939690\"","E=Sophos;i=\"6.23,215,1770624000\"; d=\"scan'208\";a=\"239792124\""],"X-ExtLoop1":"1","From":"Sergey Temerkhanov ","To":"intel-wired-lan@lists.osuosl.org","Date":"Mon, 4 May 2026 11:00:58 +0000","Message-ID":"<20260504110058.2373236-4-sergey.temerkhanov@intel.com>","X-Mailer":"git-send-email 2.53.0","In-Reply-To":"<20260504110058.2373236-1-sergey.temerkhanov@intel.com>","References":"<20260504110058.2373236-1-sergey.temerkhanov@intel.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-Mailman-Original-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1777892463; x=1809428463;\n h=from:to:subject:date:message-id:in-reply-to:references:\n mime-version:content-transfer-encoding;\n bh=NYS+R40mOjYf6fmrJkydT5fr4ckbVWfdyHgaoqz5wAk=;\n b=hvco6sQHC/4mnw+3P6+DjZqbtH660IjkDVnB6cUHV1joM/gVzGELnAf0\n sKUqKuWm45MtnvIdfxGhaMGRMzQ8YKt6dMnQYK4FGCkZCMAUMK4mJ+dv/\n fX/3nxUqE25n0o3u9H2z4eyK0pZTKP5n7Q4R8h3S9iPqM1If4uRrJyfJ7\n VQD0TDwEs9ksOjYJjN8BSMf+/h3rkOkg0talv4uDC+AM/ZdeUMoDo/C6H\n +BnNYAkPBYkmESV8kkTqBUhw6Sc6+nZlIjiFXmn8ivHoLhs9FTZMQoXs1\n ++X1Mai9j4qR4sUA2nLyso+LA0J5I4X8geom4WXkgIubuCtxG+rX69jw8\n w==;","X-Mailman-Original-Authentication-Results":["smtp3.osuosl.org;\n dmarc=pass (p=none dis=none)\n header.from=intel.com","smtp3.osuosl.org;\n dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com\n header.a=rsa-sha256 header.s=Intel header.b=hvco6sQH"],"Subject":"[Intel-wired-lan] [PATCH iwl-net v1 3/3] ice: Cache struct ice_hw\n pointer for split register reads","X-BeenThere":"intel-wired-lan@osuosl.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Intel Wired Ethernet Linux Kernel Driver Development\n ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"intel-wired-lan-bounces@osuosl.org","Sender":"\"Intel-wired-lan\" "},"content":"Cache the primary ice_hw pointer to ensure consistency between\ncalls (both parts of a value will be read from the same NAC).\nice_get_primary_hw() will never return NULL, but during the\nctrl_pf cleanup there may be a case when one call will return\nthe pointer to the ctrl_pf->hw and the subsequent one - to the\npf->hw which generally are not the same.\nStruct ice_hw is embedded in the struct ice_pf so it is protected\nby the same critical section - no additional synchronization is\nneeded.\n\nFixes: e2193f9f9ec9 (\"ice: enable timesync operation on 2xNAC E825 devices\")\n\nSigned-off-by: Sergey Temerkhanov \nReviewed-by: Aleksandr Loktionov \nReviewed-by: Arkadiusz Kubalewski \n---\n drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 17 +++++++++++++----\n 1 file changed, 13 insertions(+), 4 deletions(-)","diff":"diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c\nindex 892bcc50e82f..95238224b59a 100644\n--- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c\n+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c\n@@ -4,6 +4,7 @@\n #include \n #include \n #include \n+#include \"ice.h\"\n #include \"ice_common.h\"\n #include \"ice_ptp_hw.h\"\n #include \"ice_ptp_consts.h\"\n@@ -1988,10 +1989,14 @@ static int ice_read_phy_and_phc_time_eth56g(struct ice_hw *hw, u8 port,\n \t\tzo = rd32(hw, GLTSYN_SHTIME_0(tmr_idx));\n \t\tlo = rd32(hw, GLTSYN_SHTIME_L(tmr_idx));\n \t} else {\n+\t\tstruct ice_hw *pri_hw;\n+\n \t\tguard(rcu)();\n \n-\t\tzo = rd32(ice_get_primary_hw(pf), GLTSYN_SHTIME_0(tmr_idx));\n-\t\tlo = rd32(ice_get_primary_hw(pf), GLTSYN_SHTIME_L(tmr_idx));\n+\t\tpri_hw = ice_get_primary_hw(pf);\n+\n+\t\tzo = rd32(pri_hw, GLTSYN_SHTIME_0(tmr_idx));\n+\t\tlo = rd32(pri_hw, GLTSYN_SHTIME_L(tmr_idx));\n \t}\n \t*phc_time = (u64)lo << 32 | zo;\n \n@@ -2159,10 +2164,14 @@ int ice_start_phy_timer_eth56g(struct ice_hw *hw, u8 port)\n \t\tlo = rd32(hw, GLTSYN_INCVAL_L(tmr_idx));\n \t\thi = rd32(hw, GLTSYN_INCVAL_H(tmr_idx));\n \t} else {\n+\t\tstruct ice_hw *pri_hw;\n+\n \t\tguard(rcu)();\n \n-\t\tlo = rd32(ice_get_primary_hw(pf), GLTSYN_INCVAL_L(tmr_idx));\n-\t\thi = rd32(ice_get_primary_hw(pf), GLTSYN_INCVAL_H(tmr_idx));\n+\t\tpri_hw = ice_get_primary_hw(pf);\n+\n+\t\tlo = rd32(pri_hw, GLTSYN_INCVAL_L(tmr_idx));\n+\t\thi = rd32(pri_hw, GLTSYN_INCVAL_H(tmr_idx));\n \t}\n \tincval = (u64)hi << 32 | lo;\n \n","prefixes":["iwl-net","v1","3/3"]}