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Ip=[4.158.2.129];\n Helo=[outbound-uk1.az.dlp.m.darktrace.com]","X-MS-Exchange-CrossTenant-AuthSource":"\n AMS1EPF0000004B.eurprd04.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Anonymous","X-MS-Exchange-CrossTenant-FromEntityHeader":"HybridOnPrem","X-BeenThere":"gcc-patches@gcc.gnu.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Gcc-patches mailing list ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org"},"content":"Use an indirection via GOT for data accesses that might be out of range of\nADRP. Using the GOT avoids placing relro symbol references in literal pools\n(PR 123791). It also allows the large model to trivially support PIC/PIE.\nConstants and readonly data use ADRP since the maximum text size is 2GB in\nthe large model [1]. The code quality of -mcmodel=large improves dramatically\nas a result: codesize of SPEC2017 reduces by 2.2%.\n\nPasses regress, OK for commit?\n\n[1] https://github.com/ARM-software/abi-aa/blob/main/sysvabi64/sysvabi64.rst#code-models\n\ngcc:\n\tPR target/123791\n\t* config/aarch64/aarch64.cc (aarch64_expand_mov_immediate): Remove\n\tforcing symbol references to const mem.\n\t(aarch64_cannot_force_const_mem): Likewise.\n\t(aarch64_can_use_per_function_literal_pools_p): Return false for\n\tlarge model.\n\t(aarch64_use_blocks_for_constant_p): Update comment.\n\t(initialize_aarch64_code_model): Allow PIC/PIE.\n\t(aarch64_classify_symbol): Use SYMBOL_SMALL_ABSOLUTE for constant\n\treferences and SYMBOL_SMALL_GOT_4G for writeable data.\n\ngcc/testsuite:\n\tPR target/123791\n\t* gcc.target/aarch64/pr123791.c: Update test.\n\t* gcc.target/aarch64/pr63304_1.c: Likewise.\n\t* gcc.target/aarch64/pr78733.c: Likewise.\n\t* gcc.target/aarch64/pr79041-2.c: Likewise.\n\n---","diff":"diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc\nindex a85fb0f8cfbedf2f1cd33415912d6bede6b7b07c..a735bf1311d7ff52fef7a322fb4a1eea3c6edc16 100644\n--- a/gcc/config/aarch64/aarch64.cc\n+++ b/gcc/config/aarch64/aarch64.cc\n@@ -6726,45 +6726,8 @@ aarch64_expand_mov_immediate (rtx dest, rtx imm)\n switch (sty)\n \t{\n \tcase SYMBOL_FORCE_TO_MEM:\n-\t if (int_mode != ptr_mode)\n-\t imm = convert_memory_address (ptr_mode, imm);\n-\n-\t if (const_offset != 0\n-\t && targetm.cannot_force_const_mem (ptr_mode, imm))\n-\t {\n-\t gcc_assert (can_create_pseudo_p ());\n-\t base = aarch64_force_temporary (int_mode, dest, base);\n-\t aarch64_add_offset (int_mode, dest, base, const_offset,\n-\t\t\t\t NULL_RTX, NULL_RTX, 0, false);\n-\t return;\n-\t }\n-\n-\t mem = force_const_mem (ptr_mode, imm);\n-\t gcc_assert (mem);\n-\n-\t /* If we aren't generating PC relative literals, then\n-\t we need to expand the literal pool access carefully.\n-\t This is something that needs to be done in a number\n-\t of places, so could well live as a separate function. */\n-\t if (!aarch64_pcrelative_literal_loads)\n-\t {\n-\t gcc_assert (can_create_pseudo_p ());\n-\t base = gen_reg_rtx (ptr_mode);\n-\t aarch64_expand_mov_immediate (base, XEXP (mem, 0));\n-\t if (ptr_mode != Pmode)\n-\t\tbase = convert_memory_address (Pmode, base);\n-\t mem = gen_rtx_MEM (ptr_mode, base);\n-\t }\n-\n-\t if (int_mode != ptr_mode)\n-\t mem = gen_rtx_ZERO_EXTEND (int_mode, mem);\n-\n-\t emit_insn (gen_rtx_SET (dest, mem));\n-\n-\t return;\n-\n- case SYMBOL_SMALL_TLSGD:\n- case SYMBOL_SMALL_TLSDESC:\n+\tcase SYMBOL_SMALL_TLSGD:\n+\tcase SYMBOL_SMALL_TLSDESC:\n \tcase SYMBOL_SMALL_TLSIE:\n \tcase SYMBOL_SMALL_GOT_28K:\n \tcase SYMBOL_SMALL_GOT_4G:\n@@ -11184,11 +11147,10 @@ aarch64_cannot_force_const_mem (machine_mode mode ATTRIBUTE_UNUSED, rtx x)\n \t|| aarch64_sme_vq_unspec_p (x, &factor))\n return true;\n \n- /* Only allow symbols in literal pools with the large model (non-PIC). */\n+ /* Don't allow symbols in literal pools. */\n poly_int64 offset;\n rtx base = strip_offset_and_salt (x, &offset);\n- if ((SYMBOL_REF_P (base) || LABEL_REF_P (base))\n- && aarch64_cmodel != AARCH64_CMODEL_LARGE)\n+ if (SYMBOL_REF_P (base) || LABEL_REF_P (base))\n return true;\n \n return aarch64_tls_referenced_p (x);\n@@ -14319,14 +14281,12 @@ aarch64_uxt_size (int shift, HOST_WIDE_INT mask)\n }\n \n /* Constant pools are per function only when PC relative\n- literal loads are true or we are in the large memory\n- model. */\n+ literal loads are true. */\n \n static inline bool\n aarch64_can_use_per_function_literal_pools_p (void)\n {\n- return (aarch64_pcrelative_literal_loads\n-\t || aarch64_cmodel == AARCH64_CMODEL_LARGE);\n+ return aarch64_pcrelative_literal_loads;\n }\n \n static bool\n@@ -14345,8 +14305,6 @@ aarch64_select_rtx_section (machine_mode mode,\n \t\t\t rtx x,\n \t\t\t unsigned HOST_WIDE_INT align)\n {\n- /* Forcing special symbols into the .text section is not correct (PR123791).\n- This is only an issue with the large code model. */\n if (aarch64_can_use_per_function_literal_pools_p ())\n return function_section (current_function_decl);\n \n@@ -20215,9 +20173,6 @@ initialize_aarch64_code_model (struct gcc_options *opts)\n aarch64_cmodel = opts->x_aarch64_cmodel_var;\n if (aarch64_cmodel == AARCH64_CMODEL_LARGE)\n {\n- if (opts->x_flag_pic)\n-\tsorry (\"code model %qs with %<-f%s%>\", \"large\",\n-\t opts->x_flag_pic > 1 ? \"PIC\" : \"pic\");\n if (opts->x_aarch64_abi == AARCH64_ABI_ILP32)\n \tsorry (\"code model %qs not supported in ilp32 mode\", \"large\");\n }\n@@ -22145,9 +22100,6 @@ aarch64_classify_symbol (rtx x, HOST_WIDE_INT offset)\n if (aarch64_cmodel == AARCH64_CMODEL_TINY)\n \treturn SYMBOL_TINY_ABSOLUTE;\n \n- if (aarch64_cmodel == AARCH64_CMODEL_LARGE)\n-\treturn SYMBOL_FORCE_TO_MEM;\n-\n return SYMBOL_SMALL_ABSOLUTE;\n }\n \n@@ -22197,14 +22149,33 @@ aarch64_classify_symbol (rtx x, HOST_WIDE_INT offset)\n \t return SYMBOL_SMALL_ABSOLUTE;\n \n \tcase AARCH64_CMODEL_LARGE:\n-\t /* This is alright even in PIC code as the constant\n-\t pool reference is always PC relative and within\n-\t the same translation unit. */\n-\t if (!aarch64_pcrelative_literal_loads && CONSTANT_POOL_ADDRESS_P (x))\n-\t return SYMBOL_SMALL_ABSOLUTE;\n-\t else\n+\t if (!TARGET_PECOFF\n+\t && (flag_pic || SYMBOL_REF_WEAK (x))\n+\t && !aarch64_symbol_binds_local_p (x))\n+\t return SYMBOL_SMALL_GOT_4G;\n+\n+\t /* Read-only data uses ADRP/ADD, writable data uses the GOT. */\n+\n+\t if (!(IN_RANGE (offset, -0x100000, 0x100000)\n+\t\t|| offset_within_block_p (x, offset)))\n \t return SYMBOL_FORCE_TO_MEM;\n \n+\t if (SYMBOL_REF_DECL (x) && TREE_READONLY (SYMBOL_REF_DECL (x)))\n+\t return SYMBOL_SMALL_ABSOLUTE;\n+\n+\t if (CONSTANT_POOL_ADDRESS_P (x))\n+\t return SYMBOL_SMALL_ABSOLUTE;\n+\n+\t if (SYMBOL_REF_HAS_BLOCK_INFO_P (x) && SYMBOL_REF_BLOCK (x) != NULL)\n+\t {\n+\t section *sect = SYMBOL_REF_BLOCK (x)->sect;\n+\n+\t if (sect != NULL && !(sect->common.flags & SECTION_WRITE))\n+\t\treturn SYMBOL_SMALL_ABSOLUTE;\n+\t }\n+\n+\t return SYMBOL_SMALL_GOT_4G;\n+\n \tdefault:\n \t gcc_unreachable ();\n \t}\ndiff --git a/gcc/testsuite/gcc.target/aarch64/pr123791.c b/gcc/testsuite/gcc.target/aarch64/pr123791.c\nindex 8e394231a4a02dbb5bc1ad2a50775976c349593b..17051d7b2cdaa6b9477fb6ef2bb68ee791f28942 100644\n--- a/gcc/testsuite/gcc.target/aarch64/pr123791.c\n+++ b/gcc/testsuite/gcc.target/aarch64/pr123791.c\n@@ -1,5 +1,5 @@\n /* { dg-do compile } */\n-/* { dg-options \"-O2 -mpc-relative-literal-loads -Wno-deprecated\" } */\n+/* { dg-options \"-O2\" } */\n \n char *\n foo ()\n@@ -7,4 +7,4 @@ foo ()\n return (char *) (__UINTPTR_TYPE__) foo + 7483647;\n }\n \n-/* { dg-final { scan-assembler-not \"\\\\.(word|xword)\\tfoo\" { xfail aarch64_large } } } */\n+/* { dg-final { scan-assembler-not \"\\\\.(word|xword)\\tfoo\" } } */\ndiff --git a/gcc/testsuite/gcc.target/aarch64/pr63304_1.c b/gcc/testsuite/gcc.target/aarch64/pr63304_1.c\nindex 134fd469b87c265a189507c82b49f8ad08248e14..c5bc5154845cadefc2d15fcfbd0c38ef025d8bb9 100644\n--- a/gcc/testsuite/gcc.target/aarch64/pr63304_1.c\n+++ b/gcc/testsuite/gcc.target/aarch64/pr63304_1.c\n@@ -1,6 +1,6 @@\n /* { dg-do assemble } */\n /* { dg-require-effective-target lp64 } */\n-/* { dg-options \"-O1 --save-temps -fno-pie\" } */\n+/* { dg-options \"-O1 --save-temps\" } */\n #pragma GCC push_options\n #pragma GCC target (\"+nothing+simd,cmodel=small\")\n \n@@ -45,4 +45,4 @@ cal3 (double a)\n return 1;\n }\n \n-/* { dg-final { scan-assembler-times \"adrp\" 4 } } */\n+/* { dg-final { scan-assembler-times \"adrp\" 3 } } */\ndiff --git a/gcc/testsuite/gcc.target/aarch64/pr78733.c b/gcc/testsuite/gcc.target/aarch64/pr78733.c\nindex 9de6fb6dc1ae3d7690ca41c9871a835eb4212476..8fc1b422a86616de4381ab10b8e9fb0b8c83b3de 100644\n--- a/gcc/testsuite/gcc.target/aarch64/pr78733.c\n+++ b/gcc/testsuite/gcc.target/aarch64/pr78733.c\n@@ -1,7 +1,6 @@\n /* { dg-do compile } */\n-/* { dg-options \"-O2 -mcmodel=large -mpc-relative-literal-loads -fno-pie -Wno-deprecated\" } */\n+/* { dg-options \"-O2 -mcmodel=large\" } */\n /* { dg-require-effective-target lp64 } */\n-/* { dg-skip-if \"-mcmodel=large, no support for -fpic\" { aarch64-*-* } { \"-fpic\" } { \"\" } } */\n \n __int128\n t (void)\n@@ -9,5 +8,4 @@ t (void)\n return ((__int128)0x123456789abcdef << 64) | 0xfedcba987654321;\n }\n \n-/* { dg-final { scan-assembler \"adr\" } } */\n-/* { dg-final { scan-assembler-not \"adrp\" } } */\n+/* { dg-final { scan-assembler \"adrp\" } } */\ndiff --git a/gcc/testsuite/gcc.target/aarch64/pr79041-2.c b/gcc/testsuite/gcc.target/aarch64/pr79041-2.c\nindex 9de6fb6dc1ae3d7690ca41c9871a835eb4212476..8fc1b422a86616de4381ab10b8e9fb0b8c83b3de 100644\n--- a/gcc/testsuite/gcc.target/aarch64/pr79041-2.c\n+++ b/gcc/testsuite/gcc.target/aarch64/pr79041-2.c\n@@ -1,7 +1,6 @@\n /* { dg-do compile } */\n-/* { dg-options \"-O2 -mcmodel=large -mpc-relative-literal-loads -fno-pie -Wno-deprecated\" } */\n+/* { dg-options \"-O2 -mcmodel=large\" } */\n /* { dg-require-effective-target lp64 } */\n-/* { dg-skip-if \"-mcmodel=large, no support for -fpic\" { aarch64-*-* } { \"-fpic\" } { \"\" } } */\n \n __int128\n t (void)\n@@ -9,5 +8,4 @@ t (void)\n return ((__int128)0x123456789abcdef << 64) | 0xfedcba987654321;\n }\n \n-/* { dg-final { scan-assembler \"adr\" } } */\n-/* { dg-final { scan-assembler-not \"adrp\" } } */\n+/* { dg-final { scan-assembler \"adrp\" } } */\n","prefixes":[]}