{"id":2231047,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2231047/?format=json","web_url":"http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260430094238.987976-2-grzegorz.nitka@intel.com/","project":{"id":46,"url":"http://patchwork.ozlabs.org/api/1.1/projects/46/?format=json","name":"Intel Wired Ethernet development","link_name":"intel-wired-lan","list_id":"intel-wired-lan.osuosl.org","list_email":"intel-wired-lan@osuosl.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260430094238.987976-2-grzegorz.nitka@intel.com>","date":"2026-04-30T09:42:31","name":"[v7,net-next,1/8] dpll: add generic DPLL type","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"763b2c2e1a2015bc0347e8cfe27eaf89cf0b7586","submitter":{"id":82711,"url":"http://patchwork.ozlabs.org/api/1.1/people/82711/?format=json","name":"Nitka, Grzegorz","email":"grzegorz.nitka@intel.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260430094238.987976-2-grzegorz.nitka@intel.com/mbox/","series":[{"id":502259,"url":"http://patchwork.ozlabs.org/api/1.1/series/502259/?format=json","web_url":"http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=502259","date":"2026-04-30T09:42:30","name":"dpll/ice: Add generic DPLL type and full TX reference clock control for E825","version":7,"mbox":"http://patchwork.ozlabs.org/series/502259/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2231047/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2231047/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","intel-wired-lan@lists.osuosl.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","intel-wired-lan@lists.osuosl.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=osuosl.org header.i=@osuosl.org header.a=rsa-sha256\n header.s=default header.b=9GoqrWoD;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=osuosl.org\n (client-ip=2605:bc80:3010::138; helo=smtp1.osuosl.org;\n envelope-from=intel-wired-lan-bounces@osuosl.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from smtp1.osuosl.org (smtp1.osuosl.org [IPv6:2605:bc80:3010::138])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g5q853Hmzz1yHZ\n\tfor ; Thu, 30 Apr 2026 19:47:01 +1000 (AEST)","from localhost (localhost [127.0.0.1])\n\tby smtp1.osuosl.org (Postfix) with ESMTP id 1B66384472;\n\tThu, 30 Apr 2026 09:47:00 +0000 (UTC)","from smtp1.osuosl.org ([127.0.0.1])\n by localhost (smtp1.osuosl.org [127.0.0.1]) (amavis, port 10024) with ESMTP\n id pmrYYaDsMh49; Thu, 30 Apr 2026 09:46:55 +0000 (UTC)","from lists1.osuosl.org (lists1.osuosl.org [140.211.166.142])\n\tby smtp1.osuosl.org (Postfix) with ESMTP id 8178B8445B;\n\tThu, 30 Apr 2026 09:46:55 +0000 (UTC)","from smtp1.osuosl.org (smtp1.osuosl.org [IPv6:2605:bc80:3010::138])\n by lists1.osuosl.org (Postfix) with ESMTP id 1DD9F18F\n for ; Thu, 30 Apr 2026 09:46:54 +0000 (UTC)","from localhost (localhost [127.0.0.1])\n by smtp1.osuosl.org (Postfix) with ESMTP id 1B88F8445B\n for ; Thu, 30 Apr 2026 09:46:54 +0000 (UTC)","from smtp1.osuosl.org ([127.0.0.1])\n by localhost (smtp1.osuosl.org [127.0.0.1]) (amavis, port 10024) with ESMTP\n id sYJ8t8byHLiU for ;\n Thu, 30 Apr 2026 09:46:49 +0000 (UTC)","from mgamail.intel.com (mgamail.intel.com [192.198.163.12])\n by smtp1.osuosl.org (Postfix) with ESMTPS id 0AFF884447\n for ; Thu, 30 Apr 2026 09:46:45 +0000 (UTC)","from orviesa001.jf.intel.com ([10.64.159.141])\n by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 30 Apr 2026 02:46:45 -0700","from gklab-003-001.igk.intel.com ([10.91.173.48])\n by orviesa001.jf.intel.com with ESMTP; 30 Apr 2026 02:46:41 -0700"],"X-Virus-Scanned":["amavis at osuosl.org","amavis at osuosl.org"],"X-Comment":"SPF check N/A for local connections - client-ip=140.211.166.142;\n helo=lists1.osuosl.org; envelope-from=intel-wired-lan-bounces@osuosl.org;\n receiver= ","DKIM-Filter":["OpenDKIM Filter v2.11.0 smtp1.osuosl.org 8178B8445B","OpenDKIM Filter v2.11.0 smtp1.osuosl.org 0AFF884447"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=osuosl.org;\n\ts=default; t=1777542415;\n\tbh=Qhp+YxY7sKfdB1cAQ2jaO38gzjLfTtbAjElFiczGpgo=;\n\th=From:To:Date:In-Reply-To:References:Subject:List-Id:\n\t List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe:\n\t Cc:From;\n\tb=9GoqrWoDi41q5X7xsGpQgnvL6oX2sgQXcMUx6DMrHZWzax/SBvo6+dg3q7vGJMMEd\n\t 5Jr7cqyto5Ih9hbIeTgMuaZOhJ/yimc1wVFTDQ5P0kSEh3qTTAenm4Ul6GLa+saBxz\n\t q5yFBmRqxwguj71a70PW9WJAJ3crAgt6lyJCF4lFqlaoyA7XILgkZkjtRRImmY3XKn\n\t uTSKbm1KUwQQLNmpAMN1VvVVznALlzzSH58n4VSB4xy8eIEiwhzdtAsaHNGDd15Rm4\n\t zhpohZFQfb4tbIADAoDSBddJfnvpHb3Y9WwFWF22HbUlawkWbW+rB1VURmtSnWhcpz\n\t 2ssBhlJ6il/Cw==","Received-SPF":"Pass (mailfrom) identity=mailfrom; client-ip=192.198.163.12;\n helo=mgamail.intel.com; envelope-from=grzegorz.nitka@intel.com;\n receiver=","DMARC-Filter":"OpenDMARC Filter v1.4.2 smtp1.osuosl.org 0AFF884447","X-CSE-ConnectionGUID":["jjORifv4RLSTvxfGgNsLTA==","1v08t+jyRlmPqWBOaXe4dA=="],"X-CSE-MsgGUID":["GymmGNJIQzuoN8zIKQrsSQ==","GuN+VYnSRaeWpnRZC+5SLQ=="],"X-IronPort-AV":["E=McAfee;i=\"6800,10657,11771\"; a=\"82342570\"","E=Sophos;i=\"6.23,207,1770624000\"; d=\"scan'208\";a=\"82342570\"","E=Sophos;i=\"6.23,207,1770624000\"; d=\"scan'208\";a=\"272649735\""],"X-ExtLoop1":"1","From":"Grzegorz Nitka ","To":"netdev@vger.kernel.org","Date":"Thu, 30 Apr 2026 11:42:31 +0200","Message-Id":"<20260430094238.987976-2-grzegorz.nitka@intel.com>","X-Mailer":"git-send-email 2.39.3","In-Reply-To":"<20260430094238.987976-1-grzegorz.nitka@intel.com>","References":"<20260430094238.987976-1-grzegorz.nitka@intel.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-Mailman-Original-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1777542406; x=1809078406;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=y/QDmxkfTXgNMhmlNvETtV7zJKHS/M5pTaNjnoyYTkE=;\n b=bNvuzaRi5yCNXaVXzEBn325Nwa0RxTG+mkCU5tzrIHLMjCZA2+wYk4LU\n YAk8T7QANKdZUr0u8bFcYRBuJRsM/LNzyQ+ijKd1RisYKhy7tu3rR9xMn\n B9p4crY70T0GiHbVeTMb/0soNYSrmaBXLAmC+RYxBwXNfZfpSU4Yrpck8\n hCmQtk48KzSiB7WwRO8Mj7ZqRxUtgOoxZfvE9+4im9hA5Up0/MZvdAf71\n jREw9iS/CSLhkW6Sg2IfKeHQBwFkv82qmxOQDKopRWsKBQJZ2xMvLoA48\n j/7QDnd3xQ6RISo5zPIjS6yeoHKRVrHkMU+6iVg8L+F/RV8k+7VefoKv0\n w==;","X-Mailman-Original-Authentication-Results":["smtp1.osuosl.org;\n dmarc=pass (p=none dis=none)\n header.from=intel.com","smtp1.osuosl.org;\n dkim=pass (2048-bit key,\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=bNvuzaRi"],"Subject":"[Intel-wired-lan] [PATCH v7 net-next 1/8] dpll: add generic DPLL\n type","X-BeenThere":"intel-wired-lan@osuosl.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Intel Wired Ethernet Linux Kernel Driver Development\n ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Cc":"ivecera@redhat.com, vadim.fedorenko@linux.dev, kuba@kernel.org,\n jiri@resnulli.us, edumazet@google.com, przemyslaw.kitszel@intel.com,\n richardcochran@gmail.com, donald.hunter@gmail.com,\n linux-kernel@vger.kernel.org, arkadiusz.kubalewski@intel.com,\n andrew+netdev@lunn.ch, intel-wired-lan@lists.osuosl.org, horms@kernel.org,\n Prathosh.Satish@microchip.com, anthony.l.nguyen@intel.com, pabeni@redhat.com,\n davem@davemloft.net","Errors-To":"intel-wired-lan-bounces@osuosl.org","Sender":"\"Intel-wired-lan\" "},"content":"Add DPLL_TYPE_GENERIC to represent DPLL devices which do not fit the\nexisting PPS or EEC classes.\n\nThe UAPI type is intentionally generic. During netdev discussion,\nmaintainers pointed out that introducing identifiers tied to a specific\nplacement or single design does not scale across ASICs and vendors.\nThe role of a DPLL is already inferable from the spawning driver,\nbus device, and pin topology, without encoding additional\npurpose-specific taxonomy in the type name.\n\nUsing a generic type keeps the UAPI extensible and avoids premature\nnaming that may become incorrect as new hardware topologies are\nexposed through the DPLL subsystem.\n\nExpose the new type through UAPI and netlink specification as \"generic\".\n\nSigned-off-by: Grzegorz Nitka \n---\n Documentation/netlink/specs/dpll.yaml | 3 +++\n drivers/dpll/dpll_nl.c | 2 +-\n include/uapi/linux/dpll.h | 2 ++\n 3 files changed, 6 insertions(+), 1 deletion(-)","diff":"diff --git a/Documentation/netlink/specs/dpll.yaml b/Documentation/netlink/specs/dpll.yaml\nindex 40465a3d7fc2..572cf7ae5f36 100644\n--- a/Documentation/netlink/specs/dpll.yaml\n+++ b/Documentation/netlink/specs/dpll.yaml\n@@ -138,6 +138,9 @@ definitions:\n -\n name: eec\n doc: dpll drives the Ethernet Equipment Clock\n+ -\n+ name: generic\n+ doc: generic dpll type for devices outside PPS/EEC classes\n render-max: true\n -\n type: enum\ndiff --git a/drivers/dpll/dpll_nl.c b/drivers/dpll/dpll_nl.c\nindex 1e652340a5d7..9a3b70ea3ae0 100644\n--- a/drivers/dpll/dpll_nl.c\n+++ b/drivers/dpll/dpll_nl.c\n@@ -34,7 +34,7 @@ const struct nla_policy dpll_reference_sync_nl_policy[DPLL_A_PIN_STATE + 1] = {\n static const struct nla_policy dpll_device_id_get_nl_policy[DPLL_A_TYPE + 1] = {\n \t[DPLL_A_MODULE_NAME] = { .type = NLA_NUL_STRING, },\n \t[DPLL_A_CLOCK_ID] = { .type = NLA_U64, },\n-\t[DPLL_A_TYPE] = NLA_POLICY_RANGE(NLA_U32, 1, 2),\n+\t[DPLL_A_TYPE] = NLA_POLICY_RANGE(NLA_U32, 1, 3),\n };\n \n /* DPLL_CMD_DEVICE_GET - do */\ndiff --git a/include/uapi/linux/dpll.h b/include/uapi/linux/dpll.h\nindex 871685f7c353..648553053cd8 100644\n--- a/include/uapi/linux/dpll.h\n+++ b/include/uapi/linux/dpll.h\n@@ -109,10 +109,12 @@ enum dpll_clock_quality_level {\n * enum dpll_type - type of dpll, valid values for DPLL_A_TYPE attribute\n * @DPLL_TYPE_PPS: dpll produces Pulse-Per-Second signal\n * @DPLL_TYPE_EEC: dpll drives the Ethernet Equipment Clock\n+ * @DPLL_TYPE_GENERIC: generic dpll type for devices outside PPS/EEC classes\n */\n enum dpll_type {\n \tDPLL_TYPE_PPS = 1,\n \tDPLL_TYPE_EEC,\n+\tDPLL_TYPE_GENERIC,\n \n \t/* private: */\n \t__DPLL_TYPE_MAX,\n","prefixes":["v7","net-next","1/8"]}