{"id":2230978,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2230978/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/patch/20260430-enable_wakeup_capable_gpios-v2-1-8c26ac795318@oss.qualcomm.com/","project":{"id":42,"url":"http://patchwork.ozlabs.org/api/1.1/projects/42/?format=json","name":"Linux GPIO development","link_name":"linux-gpio","list_id":"linux-gpio.vger.kernel.org","list_email":"linux-gpio@vger.kernel.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260430-enable_wakeup_capable_gpios-v2-1-8c26ac795318@oss.qualcomm.com>","date":"2026-04-30T09:20:07","name":"[v2] pinctrl: qcom: Unconditionally mark gpio as wakeup enable","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"6be48fb7851d5e88dfa7e0ddb56ca25d52508a72","submitter":{"id":93246,"url":"http://patchwork.ozlabs.org/api/1.1/people/93246/?format=json","name":"Sneh Mankad","email":"sneh.mankad@oss.qualcomm.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-gpio/patch/20260430-enable_wakeup_capable_gpios-v2-1-8c26ac795318@oss.qualcomm.com/mbox/","series":[{"id":502251,"url":"http://patchwork.ozlabs.org/api/1.1/series/502251/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/list/?series=502251","date":"2026-04-30T09:20:07","name":"[v2] pinctrl: qcom: Unconditionally mark gpio as wakeup enable","version":2,"mbox":"http://patchwork.ozlabs.org/series/502251/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2230978/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2230978/checks/","tags":{},"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-gpio@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=E+VnZ4oz;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=cAp1kCLd;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.232.135.74; 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charset=\"utf-8\"","Content-Transfer-Encoding":"7bit","Message-Id":"\n <20260430-enable_wakeup_capable_gpios-v2-1-8c26ac795318@oss.qualcomm.com>","X-B4-Tracking":"v=1; b=H4sIAMYe82kC/43NQQ6CMBCF4auQri0pBcGy8h6GkFIGmAi0dgQ1h\n LtbOYGbSb5Z/G9jBB6BWBltzMOKhHYOkKeImUHPPXBsg5kUMhdZKjjMuhmhfuk7LK422h3sHVr\n iplFZqjRcikKyUHAeOnwf9VsVPCA9rf8cY2vy+/7XXROe8HMLqWo6kQuVXS1R/Fj0aOw0xeGwa\n t/3L937jynNAAAA","X-Change-ID":"20260430-enable_wakeup_capable_gpios-cb9439ae8772","To":"Bjorn Andersson , Linus Walleij ,\n Neil Armstrong ,\n Krzysztof Kozlowski ","Cc":"linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org,\n linux-kernel@vger.kernel.org, stable@vger.kernel.org,\n Sneh Mankad ,\n Maulik Shah ","X-Mailer":"b4 0.14.2","X-Developer-Signature":"v=1; a=ed25519-sha256; t=1777540818; l=2594;\n i=sneh.mankad@oss.qualcomm.com; s=20250818; h=from:subject:message-id;\n bh=XwmKwV05/7a1r/S2gniOB8WhpFrj9SJSwlH+8tfTslA=;\n b=WVX7FhxPrdhNLQHigmRZMUFbQiF1TQw/jD3pKP3p01r/x9Ru+OtECwdzaF6TXT+Ty4WM6xUsy\n EKCmeBoEanoAAUW3MFheWslbkKB/PeXyt9YxiFl+04c8i28uwmCT0U4","X-Developer-Key":"i=sneh.mankad@oss.qualcomm.com; a=ed25519;\n pk=sv57EGwdcfnp6xJmoBCIT1JFSqWI+gawRHkJWj/T2B0=","X-Proofpoint-GUID":"m6zNDf48lbNplp5dXSvYB1876KIPrYes","X-Proofpoint-ORIG-GUID":"m6zNDf48lbNplp5dXSvYB1876KIPrYes","X-Authority-Analysis":"v=2.4 cv=DPy/JSNb c=1 sm=1 tr=0 ts=69f31ed6 cx=c_pps\n a=rEQLjTOiSrHUhVqRoksmgQ==:117 a=fChuTYTh2wq5r3m49p7fHw==:17\n a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10\n a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22\n a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=03pxqqae4PZ9oJ3FxUgA:9 a=QEXdDO2ut3YA:10\n a=2VI0MkxyNR6bbpdq8BZq:22","X-Proofpoint-Spam-Details-Enc":"AW1haW4tMjYwNDMwMDA5MiBTYWx0ZWRfXyOS8qcnfwpGk\n 1zoIW+DPpSS8zoJ2JqVnPtq//IHaoIt3axVAsEZu2RUrK7OKbpPcjgODr5zxnflftQvxCE4e9MC\n BZinKD5YUur7HFuhu4zcXHROQdLJQa9MIbSzh0RWIMa4DxN4t5Tp7JfzTKDciJcYim+Fi7QE2P/\n hJ5ZGGlHDRDvSuZbYi3BfdmxKlzWwrk+0qQbYIwzFNks8ClGtri58l3eqeXYuvMM6MevkL73uEK\n +y+/ybG+r5QXkU7m6tNIzv6kSy6bDV+hjnMO6OnUEbxR+/HdWT6vTu7a+bK+FnjdfgTizGL/8UG\n 9BqhtPbJKCRkVkG/q+RD8gUdA/nzXutIwCQv5ZZmWsIshNRKNgTxFAelTehRZo7N0UG8tpf99Xs\n lJXbOjCaQ15zCVEE5wVTtS8HJZCQoVGff0MilyO083WDmN6H+o2zp1Ep5wB6deLkS0xTuBM0v12\n 6Iqif7xdVp0lRoUxOxw==","X-Proofpoint-Virus-Version":"vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-30_02,2026-04-28_01,2025-10-01_01","X-Proofpoint-Spam-Details":"rule=outbound_notspam policy=outbound score=0\n clxscore=1015 priorityscore=1501 malwarescore=0 spamscore=0 bulkscore=0\n lowpriorityscore=0 adultscore=0 impostorscore=0 phishscore=0 suspectscore=0\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2604300092"},"content":"The wakeup enable bit needs to be set irrespective of the SoC using PDC or\nMPM as wakeup capable irqchip to allow the GPIO interrupts to be forwarded\nto parent irqchip.\n\nThis is set only for PDC irqchip using additional check skip_wake_irqs\nmaking it impossible for MPM irqchip to detect the GPIO interrupt during\nSoC low power mode since for MPM irqchip the skip_wake_irqs is always\nfalse.\n\nRemove skip_wake_irqs condition when setting wakeup enable bit to allow\nforwarding GPIO interrupts for SoCs using MPM irqchip too.\n\nFixes: 76b446f5b86e (\"pinctrl: qcom: handle intr_target_reg wakeup_present/enable bits\")\nSigned-off-by: Sneh Mankad \nReviewed-by: Maulik Shah \n---\nChanges in v2:\n- Modified comment to specify MPM HW as well.\n- Spelling correction.\n- Link to v1: https://lore.kernel.org/r/20260430-enable_wakeup_capable_gpios-v1-1-5de39bf06094@oss.qualcomm.com\n---\n drivers/pinctrl/qcom/pinctrl-msm.c | 8 ++++----\n 1 file changed, 4 insertions(+), 4 deletions(-)\n\n\n---\nbase-commit: b4e07588e743c989499ca24d49e752c074924a9a\nchange-id: 20260430-enable_wakeup_capable_gpios-cb9439ae8772\n\nBest regards,","diff":"diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c\nindex 45b3a2763eb85405fecdd4770ba3d4ab684563f0..6a24f9b5e4a979528ba6b5b87fd297c2783ec765 100644\n--- a/drivers/pinctrl/qcom/pinctrl-msm.c\n+++ b/drivers/pinctrl/qcom/pinctrl-msm.c\n@@ -1242,12 +1242,12 @@ static int msm_gpio_irq_reqres(struct irq_data *d)\n \t/*\n \t * If the wakeup_enable bit is present and marked as available for the\n \t * requested GPIO, it should be enabled when the GPIO is marked as\n-\t * wake irq in order to allow the interrupt event to be transfered to\n-\t * the PDC HW.\n+\t * wake irq in order to allow the interrupt event to be transferred to\n+\t * the PDC/MPM HW.\n \t * While the name implies only the wakeup event, it's also required for\n \t * the interrupt event.\n \t */\n-\tif (test_bit(d->hwirq, pctrl->skip_wake_irqs) && g->intr_wakeup_present_bit) {\n+\tif (g->intr_wakeup_present_bit) {\n \t\tu32 intr_cfg;\n \n \t\traw_spin_lock_irqsave(&pctrl->lock, flags);\n@@ -1275,7 +1275,7 @@ static void msm_gpio_irq_relres(struct irq_data *d)\n \tunsigned long flags;\n \n \t/* Disable the wakeup_enable bit if it has been set in msm_gpio_irq_reqres() */\n-\tif (test_bit(d->hwirq, pctrl->skip_wake_irqs) && g->intr_wakeup_present_bit) {\n+\tif (g->intr_wakeup_present_bit) {\n \t\tu32 intr_cfg;\n \n \t\traw_spin_lock_irqsave(&pctrl->lock, flags);\n","prefixes":["v2"]}