{"id":2230877,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2230877/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260430071315.354333-11-zhenzhong.duan@intel.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.1/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260430071315.354333-11-zhenzhong.duan@intel.com>","date":"2026-04-30T07:13:06","name":"[v4,10/15] intel_iommu_accel: Handle PASID entry removal for pc_inv_dsc request","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"e81a00ea2c6461c00a6f1b7d195d7da3e1eaf596","submitter":{"id":81636,"url":"http://patchwork.ozlabs.org/api/1.1/people/81636/?format=json","name":"Duan, Zhenzhong","email":"zhenzhong.duan@intel.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260430071315.354333-11-zhenzhong.duan@intel.com/mbox/","series":[{"id":502222,"url":"http://patchwork.ozlabs.org/api/1.1/series/502222/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=502222","date":"2026-04-30T07:12:57","name":"intel_iommu: Enable PASID support for passthrough device","version":4,"mbox":"http://patchwork.ozlabs.org/series/502222/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2230877/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2230877/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=Kc0VfS2t;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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Thu, 30 Apr 2026 03:14:16 -0400","from orviesa007.jf.intel.com ([10.64.159.147])\n by fmvoesa107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 30 Apr 2026 00:14:08 -0700","from unknown (HELO gnr-sp-2s-612.sh.intel.com) ([10.112.230.229])\n by orviesa007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 30 Apr 2026 00:14:06 -0700"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1777533253; x=1809069253;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=0MFb3HenNSUls1fHNRaU0yBgX5qm6xrytDacYEjt9Sg=;\n b=Kc0VfS2txEhZIF22VU/T6mJ+4ZKuMEW8uMlMqUHwfb0DYjs1naGwppki\n 5PXytetpLk9IL/M6cCVnL+N0wUNqiovs4lTxhR4m7hCPN9MCqpZn4Qj8a\n itqhQLg56JLnX5BclffdMY78/BXhk/RzDjpHPCll81EjNHypnPVwHqX1s\n dEv/DvObVMDqCBjbYw28J1Niq0a6s+eddgyZqenMqPAeAVOkdmVsRVhBe\n Qsx2WG8kOKLpOm2XUeN5VtUVvyKjIyoBg5c24L61v+r3HAKtVqA8Nv1o1\n /IRHQQwPMvBlwUJRh5NAXaYIok+be299vedruHmAjdZSBy8qIbNr+/L/b w==;","X-CSE-ConnectionGUID":["Jgv2nej3SyG6EgIta9O1Sw==","yW4mSaULTMyftmT3JBl+bA=="],"X-CSE-MsgGUID":["aqF4QtebSiyJVvf42i77/w==","J5to0X1LRAmqCMjjRdheDw=="],"X-IronPort-AV":["E=McAfee;i=\"6800,10657,11771\"; a=\"81051646\"","E=Sophos;i=\"6.23,207,1770624000\"; d=\"scan'208\";a=\"81051646\"","E=Sophos;i=\"6.23,207,1770624000\"; d=\"scan'208\";a=\"234771552\""],"X-ExtLoop1":"1","From":"Zhenzhong Duan ","To":"qemu-devel@nongnu.org","Cc":"alex@shazbot.org, clg@redhat.com, eric.auger@redhat.com, mst@redhat.com,\n jasowang@redhat.com, jgg@nvidia.com, nicolinc@nvidia.com,\n skolothumtho@nvidia.com, joao.m.martins@oracle.com,\n clement.mathieu--drif@bull.com, kevin.tian@intel.com, yi.l.liu@intel.com,\n xudong.hao@intel.com, Zhenzhong Duan ","Subject":"[PATCH v4 10/15] intel_iommu_accel: Handle PASID entry removal for\n pc_inv_dsc request","Date":"Thu, 30 Apr 2026 03:13:06 -0400","Message-ID":"<20260430071315.354333-11-zhenzhong.duan@intel.com>","X-Mailer":"git-send-email 2.47.3","In-Reply-To":"<20260430071315.354333-1-zhenzhong.duan@intel.com>","References":"<20260430071315.354333-1-zhenzhong.duan@intel.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=192.198.163.13;\n envelope-from=zhenzhong.duan@intel.com; helo=mgamail.intel.com","X-Spam_score_int":"-43","X-Spam_score":"-4.4","X-Spam_bar":"----","X-Spam_report":"(-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"When guest deletes PASID entries, QEMU will capture the pasid cache\ninvalidation request, walk through pasid_cache_list in each passthrough\ndevice to find stale VTDAccelPASIDCacheEntry and delete them.\n\nCo-developed-by: Yi Liu \nSigned-off-by: Zhenzhong Duan \nTested-by: Xudong Hao \n---\n hw/i386/intel_iommu_accel.c | 80 +++++++++++++++++++++++++++++++++++++\n 1 file changed, 80 insertions(+)","diff":"diff --git a/hw/i386/intel_iommu_accel.c b/hw/i386/intel_iommu_accel.c\nindex 46250aa75c..b951d90135 100644\n--- a/hw/i386/intel_iommu_accel.c\n+++ b/hw/i386/intel_iommu_accel.c\n@@ -16,6 +16,28 @@\n #include \"hw/pci/pci_bus.h\"\n #include \"trace.h\"\n \n+static int vtd_hiod_get_pe_from_pasid(VTDAccelPASIDCacheEntry *vtd_pce,\n+ VTDPASIDEntry *pe)\n+{\n+ VTDHostIOMMUDevice *vtd_hiod = vtd_pce->vtd_hiod;\n+ IntelIOMMUState *s = vtd_hiod->iommu_state;\n+ uint32_t pasid = vtd_pce->pasid;\n+ VTDContextEntry ce;\n+ int ret;\n+\n+ if (!s->dmar_enabled || !s->root_scalable) {\n+ return -VTD_FR_RTADDR_INV_TTM;\n+ }\n+\n+ ret = vtd_dev_to_context_entry(s, pci_bus_num(vtd_hiod->bus),\n+ vtd_hiod->devfn, &ce);\n+ if (ret) {\n+ return ret;\n+ }\n+\n+ return vtd_ce_get_pasid_entry(s, &ce, pe, pasid);\n+}\n+\n bool vtd_check_hiod_accel(IntelIOMMUState *s, VTDHostIOMMUDevice *vtd_hiod,\n Error **errp)\n {\n@@ -280,6 +302,57 @@ static void vtd_accel_fill_pc(VTDHostIOMMUDevice *vtd_hiod, uint32_t pasid,\n QLIST_INSERT_HEAD(&vtd_hiod->pasid_cache_list, vtd_pce, next);\n }\n \n+static void vtd_accel_delete_pc(VTDAccelPASIDCacheEntry *vtd_pce)\n+{\n+ QLIST_REMOVE(vtd_pce, next);\n+ g_free(vtd_pce);\n+}\n+\n+static void\n+vtd_accel_pasid_cache_invalidate_one(VTDAccelPASIDCacheEntry *vtd_pce,\n+ VTDPASIDCacheInfo *pc_info)\n+{\n+ VTDPASIDEntry pe;\n+ uint16_t did;\n+\n+ /*\n+ * VTD_INV_DESC_PASIDC_G_DSI and VTD_INV_DESC_PASIDC_G_PASID_SI require\n+ * DID check. If DID doesn't match the value in cache or memory, then\n+ * it's not a pasid entry we want to invalidate.\n+ */\n+ switch (pc_info->type) {\n+ case VTD_INV_DESC_PASIDC_G_PASID_SI:\n+ if (pc_info->pasid != vtd_pce->pasid) {\n+ return;\n+ }\n+ /* Fall through */\n+ case VTD_INV_DESC_PASIDC_G_DSI:\n+ did = VTD_SM_PASID_ENTRY_DID(&vtd_pce->pasid_entry);\n+ if (pc_info->did != did) {\n+ return;\n+ }\n+ }\n+\n+ if (vtd_hiod_get_pe_from_pasid(vtd_pce, &pe)) {\n+ /*\n+ * No valid pasid entry in guest memory. e.g. pasid entry was modified\n+ * to be either all-zero or non-present. Either case means existing\n+ * pasid cache should be invalidated.\n+ */\n+ vtd_accel_delete_pc(vtd_pce);\n+ }\n+}\n+\n+static void vtd_accel_pasid_cache_invalidate(VTDHostIOMMUDevice *vtd_hiod,\n+ VTDPASIDCacheInfo *pc_info)\n+{\n+ VTDAccelPASIDCacheEntry *vtd_pce, *next;\n+\n+ QLIST_FOREACH_SAFE(vtd_pce, &vtd_hiod->pasid_cache_list, next, next) {\n+ vtd_accel_pasid_cache_invalidate_one(vtd_pce, pc_info);\n+ }\n+}\n+\n /*\n * This function walks over PASID range within [start, end) in a single\n * PASID table for entries matching @info type/did, then create\n@@ -422,6 +495,13 @@ void vtd_accel_pasid_cache_sync(IntelIOMMUState *s, VTDPASIDCacheInfo *pc_info)\n TYPE_HOST_IOMMU_DEVICE_IOMMUFD)) {\n continue;\n }\n+\n+ /*\n+ * PASID entry removal is handled before addition intentionally,\n+ * because it's unnecessary to iterate on an entry that will be\n+ * removed.\n+ */\n+ vtd_accel_pasid_cache_invalidate(vtd_hiod, pc_info);\n vtd_accel_replay_pasid_bind_for_dev(vtd_hiod, start, end, pc_info);\n }\n }\n","prefixes":["v4","10/15"]}