{"id":2230814,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2230814/?format=json","web_url":"http://patchwork.ozlabs.org/project/opensbi/patch/20260430045528.420437-6-npiggin@gmail.com/","project":{"id":67,"url":"http://patchwork.ozlabs.org/api/1.1/projects/67/?format=json","name":"OpenSBI development","link_name":"opensbi","list_id":"opensbi.lists.infradead.org","list_email":"opensbi@lists.infradead.org","web_url":"https://github.com/riscv/opensbi","scm_url":"","webscm_url":""},"msgid":"<20260430045528.420437-6-npiggin@gmail.com>","date":"2026-04-30T04:55:22","name":"[4/7] lib: sbi: Add PMP CSR read and write accessors","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"87907cfb99d447d853df87d76c89b3da123667e7","submitter":{"id":69518,"url":"http://patchwork.ozlabs.org/api/1.1/people/69518/?format=json","name":"Nicholas Piggin","email":"npiggin@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/opensbi/patch/20260430045528.420437-6-npiggin@gmail.com/mbox/","series":[{"id":502193,"url":"http://patchwork.ozlabs.org/api/1.1/series/502193/?format=json","web_url":"http://patchwork.ozlabs.org/project/opensbi/list/?series=502193","date":"2026-04-30T04:55:18","name":"Make PMP encoding usable for non-hart PMPs","version":1,"mbox":"http://patchwork.ozlabs.org/series/502193/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2230814/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2230814/checks/","tags":{},"headers":{"Return-Path":"\n ","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n secure) header.d=lists.infradead.org header.i=@lists.infradead.org\n header.a=rsa-sha256 header.s=bombadil.20210309 header.b=opKvEXxR;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=JgMzFGcw;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=none (no SPF record) smtp.mailfrom=lists.infradead.org\n (client-ip=2607:7c80:54:3::133; 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The original\n message has been attached to this so you can view it or label\n similar future email. If you have any questions, see\n the administrator of that system for details.\n Content preview: PMPCFG CSR access is non-trivial as it requires shifting\n and\n masking,\n it makes PMP manipulation code simpler if this basic CSR read/write\n access is abstracted away. Signed-off-by: Nicholas Piggin ---\n lib/sbi/riscv_asm.c\n | 114 ++++++++++++++++++++++ 1 file changed, 58 insertions(+),\n 56 deletions(-) \n Content analysis details: (-2.1 points, 5.0 required)\n pts rule name description\n ---- ----------------------\n --------------------------------------------------\n -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no\n trust\n [2607:f8b0:4864:20:0:0:0:42d listed in]\n [list.dnswl.org]\n 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record\n -0.0 SPF_PASS SPF: sender matches SPF record\n -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n author's\n domain\n 0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n not necessarily valid\n -0.1 DKIM_VALID Message has at least one valid DKIM or DK\n signature\n -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from\n envelope-from domain\n -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n [score: 0.0000]\n 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail\n provider\n [npiggin(at)gmail.com]","X-BeenThere":"opensbi@lists.infradead.org","X-Mailman-Version":"2.1.34","Precedence":"list","List-Id":"","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"opensbi\" ","Errors-To":"opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org"},"content":"PMPCFG CSR access is non-trivial as it requires shifting and masking, it\nmakes PMP manipulation code simpler if this basic CSR read/write access is\nabstracted away.\n\nSigned-off-by: Nicholas Piggin \n---\n lib/sbi/riscv_asm.c | 114 ++++++++++++++++++++++----------------------\n 1 file changed, 58 insertions(+), 56 deletions(-)","diff":"diff --git a/lib/sbi/riscv_asm.c b/lib/sbi/riscv_asm.c\nindex 9b45805c..2fb0f585 100644\n--- a/lib/sbi/riscv_asm.c\n+++ b/lib/sbi/riscv_asm.c\n@@ -273,14 +273,16 @@ void csr_write_num(int csr_num, unsigned long val)\n #undef switchcase_csr_write\n }\n \n-int pmp_disable(unsigned int n)\n+static int hart_pmp_read(pmp_t *pmp, unsigned int n)\n {\n-\tint pmpcfg_csr, pmpcfg_shift;\n-\tunsigned long cfgmask, pmpcfg;\n+\tint pmpcfg_csr, pmpcfg_shift, pmpaddr_csr;\n+\tunsigned long cfgmask;\n \n+\t/* check parameters */\n \tif (n >= PMP_COUNT)\n \t\treturn SBI_EINVAL;\n \n+\t/* calculate PMP register and offset */\n #if __riscv_xlen == 32\n \tpmpcfg_csr = CSR_PMPCFG0 + (n >> 2);\n \tpmpcfg_shift = (n & 3) << 3;\n@@ -290,48 +292,24 @@ int pmp_disable(unsigned int n)\n #else\n # error \"Unexpected __riscv_xlen\"\n #endif\n+\tpmpaddr_csr = CSR_PMPADDR0 + n;\n \n-\t/* Clear the address matching bits to disable the pmp entry */\n-\tcfgmask = ~(0xffUL << pmpcfg_shift);\n-\tpmpcfg\t= (csr_read_num(pmpcfg_csr) & cfgmask);\n-\n-\tcsr_write_num(pmpcfg_csr, pmpcfg);\n+\tcfgmask = (0xffUL << pmpcfg_shift);\n+\tpmp->cfg = (csr_read_num(pmpcfg_csr) & cfgmask) >> pmpcfg_shift;\n+\tpmp->addr = csr_read_num(pmpaddr_csr);\n \n \treturn SBI_OK;\n }\n \n-int is_pmp_entry_mapped(unsigned long entry)\n-{\n-\tunsigned long prot;\n-\tunsigned long addr;\n-\tunsigned long log2len;\n-\n-\tif (pmp_get(entry, &prot, &addr, &log2len) != 0)\n-\t\treturn false;\n-\n-\t/* If address matching bits are non-zero, the entry is enable */\n-\tif (prot & PMP_A)\n-\t\treturn true;\n-\n-\treturn false;\n-}\n-\n-int pmp_set(unsigned int n, unsigned long prot, unsigned long addr,\n-\t unsigned long log2len)\n+static int hart_pmp_write(pmp_t *pmp, unsigned int n)\n {\n \tint pmpcfg_csr, pmpcfg_shift, pmpaddr_csr;\n \tunsigned long cfgmask, pmpcfg;\n-\tpmp_t pmp;\n-\tint rc;\n \n \t/* check parameters */\n \tif (n >= PMP_COUNT)\n \t\treturn SBI_EINVAL;\n \n-\trc = pmp_encode(&pmp, prot, addr, log2len);\n-\tif (rc)\n-\t\treturn rc;\n-\n \t/* calculate PMP register and offset */\n #if __riscv_xlen == 32\n \tpmpcfg_csr = CSR_PMPCFG0 + (n >> 2);\n@@ -345,41 +323,65 @@ int pmp_set(unsigned int n, unsigned long prot, unsigned long addr,\n \tpmpaddr_csr = CSR_PMPADDR0 + n;\n \n \t/* write csrs */\n-\tcsr_write_num(pmpaddr_csr, pmp.addr);\n+\tcsr_write_num(pmpaddr_csr, pmp->addr);\n \tcfgmask = ~(0xffUL << pmpcfg_shift);\n \tpmpcfg = (csr_read_num(pmpcfg_csr) & cfgmask);\n-\tpmpcfg |= (((unsigned long)pmp.cfg << pmpcfg_shift) & ~cfgmask);\n+\tpmpcfg |= (((unsigned long)pmp->cfg << pmpcfg_shift) & ~cfgmask);\n \tcsr_write_num(pmpcfg_csr, pmpcfg);\n \n-\treturn 0;\n+\treturn SBI_OK;\n }\n \n-int pmp_get(unsigned int n, unsigned long *prot_out, unsigned long *addr_out,\n-\t unsigned long *log2len)\n+int pmp_disable(unsigned int n)\n {\n-\tint pmpcfg_csr, pmpcfg_shift, pmpaddr_csr;\n-\tunsigned long cfgmask;\n \tpmp_t pmp;\n+\tint rc;\n \n-\t/* check parameters */\n-\tif (n >= PMP_COUNT)\n-\t\treturn SBI_EINVAL;\n+\trc = hart_pmp_read(&pmp, n);\n+\tif (rc)\n+\t\treturn rc;\n \n-\t/* calculate PMP register and offset */\n-#if __riscv_xlen == 32\n-\tpmpcfg_csr = CSR_PMPCFG0 + (n >> 2);\n-\tpmpcfg_shift = (n & 3) << 3;\n-#elif __riscv_xlen == 64\n-\tpmpcfg_csr = (CSR_PMPCFG0 + (n >> 2)) & ~1;\n-\tpmpcfg_shift = (n & 7) << 3;\n-#else\n-# error \"Unexpected __riscv_xlen\"\n-#endif\n-\tpmpaddr_csr = CSR_PMPADDR0 + n;\n+\tpmp.cfg = 0;\n \n-\tcfgmask = (0xffUL << pmpcfg_shift);\n-\tpmp.cfg = (csr_read_num(pmpcfg_csr) & cfgmask) >> pmpcfg_shift;\n-\tpmp.addr = csr_read_num(pmpaddr_csr);\n+\treturn hart_pmp_write(&pmp, n);\n+}\n+\n+int is_pmp_entry_mapped(unsigned long entry)\n+{\n+\tpmp_t pmp;\n+\n+\tif (hart_pmp_read(&pmp, entry) != SBI_OK)\n+\t\treturn false;\n+\n+\t/* If address matching bits are non-zero, the entry is enable */\n+\tif (pmp.cfg & PMP_A)\n+\t\treturn true;\n+\n+\treturn false;\n+}\n+\n+int pmp_set(unsigned int n, unsigned long prot, unsigned long addr,\n+\t unsigned long log2len)\n+{\n+\tpmp_t pmp;\n+\tint rc;\n+\n+\trc = pmp_encode(&pmp, prot, addr, log2len);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\treturn hart_pmp_write(&pmp, n);\n+}\n+\n+int pmp_get(unsigned int n, unsigned long *prot_out, unsigned long *addr_out,\n+\t unsigned long *log2len)\n+{\n+\tpmp_t pmp;\n+\tint rc;\n+\n+\trc = hart_pmp_read(&pmp, n);\n+\tif (rc)\n+\t\treturn rc;\n \n \treturn pmp_decode(&pmp, prot_out, addr_out, log2len);\n }\n","prefixes":["4/7"]}