{"id":2230711,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2230711/?format=json","web_url":"http://patchwork.ozlabs.org/project/openbmc/patch/20260429-winbond-v6-18-rc1-cont-read-v3-10-0f38b3c229ad@bootlin.com/","project":{"id":56,"url":"http://patchwork.ozlabs.org/api/1.1/projects/56/?format=json","name":"OpenBMC development","link_name":"openbmc","list_id":"openbmc.lists.ozlabs.org","list_email":"openbmc@lists.ozlabs.org","web_url":"http://github.com/openbmc/","scm_url":"","webscm_url":""},"msgid":"<20260429-winbond-v6-18-rc1-cont-read-v3-10-0f38b3c229ad@bootlin.com>","date":"2026-04-29T17:56:47","name":"[v3,10/11] mtd: spinand: winbond: Create a helper to detect the need for the HS bit","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"ec8263fbf6e4bc5d164f585d63d120ea855abd2f","submitter":{"id":73368,"url":"http://patchwork.ozlabs.org/api/1.1/people/73368/?format=json","name":"Miquel Raynal","email":"miquel.raynal@bootlin.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/openbmc/patch/20260429-winbond-v6-18-rc1-cont-read-v3-10-0f38b3c229ad@bootlin.com/mbox/","series":[{"id":502171,"url":"http://patchwork.ozlabs.org/api/1.1/series/502171/?format=json","web_url":"http://patchwork.ozlabs.org/project/openbmc/list/?series=502171","date":"2026-04-29T17:56:37","name":"mtd: spinand: Winbond continuous read support","version":3,"mbox":"http://patchwork.ozlabs.org/series/502171/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2230711/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2230711/checks/","tags":{},"headers":{"Return-Path":"\n <openbmc+bounces-1879-incoming=patchwork.ozlabs.org@lists.ozlabs.org>","X-Original-To":["incoming@patchwork.ozlabs.org","openbmc@lists.ozlabs.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=bootlin.com header.i=@bootlin.com header.a=rsa-sha256\n header.s=dkim header.b=NmSZF+iW;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org\n (client-ip=112.213.38.117; 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a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim;\n\tt=1777485495; h=from:subject:date:message-id:to:cc:mime-version:content-type:\n\t content-transfer-encoding:in-reply-to:references;\n\tbh=djNQC+WiehgbSjZPUHPGAOR2nkZcZmEr0KjHIcYf3t4=;\n\tb=NmSZF+iWjEyn2SmSbXR4+EkHCCLdjDtILUG9X51p5SCiphlxZnjKNNGhMMDdv6+IE8Z0pT\n\tASIHf/oK5ins8abEGkf3OT/DpAh4+l/rTkVjcESvNc56zjX3c6MzBilErApZ2Bhx8qWhnA\n\tq4skr5wiZcq3mmwHq2jiVNGW1mYCJN/tNbDh2F3BzrrvyfD4fdGmhsSID0jKhhjNOiGAz6\n\tjJJPYq8QKvuUtagfzMs9+zJqCAJairETws7j+Woa85G71iDosgPBr85dnsTyIGKlD82Shb\n\tllYfvCKlpMGTCJF/Xyt0qdAzxC71iYXH4L/FxQpv9jVgln0FJY4chh9edS6YQw==","From":"Miquel Raynal <miquel.raynal@bootlin.com>","Date":"Wed, 29 Apr 2026 19:56:47 +0200","Subject":"[PATCH v3 10/11] mtd: spinand: winbond: Create a helper to detect\n the need for the HS bit","X-Mailing-List":"openbmc@lists.ozlabs.org","List-Id":"<openbmc.lists.ozlabs.org>","List-Help":"<mailto:openbmc+help@lists.ozlabs.org>","List-Owner":"<mailto:openbmc+owner@lists.ozlabs.org>","List-Post":"<mailto:openbmc@lists.ozlabs.org>","List-Subscribe":"<mailto:openbmc+subscribe@lists.ozlabs.org>,\n  <mailto:openbmc+subscribe-digest@lists.ozlabs.org>,\n  <mailto:openbmc+subscribe-nomail@lists.ozlabs.org>","List-Unsubscribe":"<mailto:openbmc+unsubscribe@lists.ozlabs.org>","Precedence":"list","MIME-Version":"1.0","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"7bit","Message-Id":"\n <20260429-winbond-v6-18-rc1-cont-read-v3-10-0f38b3c229ad@bootlin.com>","References":"\n <20260429-winbond-v6-18-rc1-cont-read-v3-0-0f38b3c229ad@bootlin.com>","In-Reply-To":"\n <20260429-winbond-v6-18-rc1-cont-read-v3-0-0f38b3c229ad@bootlin.com>","To":"Mark Brown <broonie@kernel.org>, Richard Weinberger <richard@nod.at>,\n  Vignesh Raghavendra <vigneshr@ti.com>, Michael Walle <mwalle@kernel.org>,\n  Miquel Raynal <miquel.raynal@bootlin.com>,\n  Takahiro Kuwano <takahiro.kuwano@infineon.com>,\n  Lorenzo Bianconi <lorenzo@kernel.org>, Ray Liu <ray.liu@airoha.com>,\n  Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>, =?utf-8?q?C=C3=A9dric_Le_Goa?=\n\t=?utf-8?q?ter?= <clg@kaod.org>,  Joel Stanley <joel@jms.id.au>,\n Andrew Jeffery <andrew@codeconstruct.com.au>,\n  Avi Fishman <avifishman70@gmail.com>, Tomer Maimon <tmaimon77@gmail.com>,\n  Tali Perry <tali.perry1@gmail.com>, Patrick Venture <venture@google.com>,\n  Nancy Yuen <yuenn@google.com>, Benjamin Fair <benjaminfair@google.com>,\n  Maxime Coquelin <mcoquelin.stm32@gmail.com>,\n  Alexandre Torgue <alexandre.torgue@foss.st.com>, =?utf-8?q?Jonathan_Neusch?=\n\t=?utf-8?q?=C3=A4fer?= <j.neuschaefer@gmx.net>","Cc":"Pratyush Yadav <pratyush@kernel.org>,\n Thomas Petazzoni <thomas.petazzoni@bootlin.com>,\n Steam Lin <STLin2@winbond.com>, Santhosh Kumar K <s-k6@ti.com>,\n linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org,\n linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org,\n linux-aspeed@lists.ozlabs.org, openbmc@lists.ozlabs.org,\n linux-stm32@st-md-mailman.stormreply.com","X-Mailer":"b4 0.14.3","X-Last-TLS-Session-Version":"TLSv1.3","X-Spam-Status":"No, score=-0.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID,\n\tDKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS autolearn=disabled\n\tversion=4.0.1","X-Spam-Checker-Version":"SpamAssassin 4.0.1 (2024-03-25) on lists.ozlabs.org"},"content":"The logic is not complex but might be reused to cleanup a bit the\nsection by moving it to a dedicated helper.\n\nSigned-off-by: Miquel Raynal <miquel.raynal@bootlin.com>\n---\n drivers/mtd/nand/spi/winbond.c | 31 +++++++++++++++++--------------\n 1 file changed, 17 insertions(+), 14 deletions(-)","diff":"diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c\nindex b30a343a6672..ffbcd25b0366 100644\n--- a/drivers/mtd/nand/spi/winbond.c\n+++ b/drivers/mtd/nand/spi/winbond.c\n@@ -421,30 +421,33 @@ static int w25n0xjw_set_sr4_hs(struct spinand_device *spinand, bool enable)\n \treturn spinand_write_reg_op(spinand, W25N0XJW_SR4, sr4);\n }\n \n+/*\n+ * SDR dual and quad I/O operations over 104MHz require the HS bit to\n+ * enable a few more dummy cycles.\n+ */\n+static bool w25n0xjw_op_needs_hs(const struct spi_mem_op *op)\n+{\n+\tif (op->cmd.dtr || op->addr.dtr || op->dummy.dtr || op->data.dtr)\n+\t\treturn false;\n+\telse if (op->cmd.buswidth != 1 || op->addr.buswidth == 1)\n+\t\treturn false;\n+\telse if (op->max_freq && op->max_freq <= 104 * HZ_PER_MHZ)\n+\t\treturn false;\n+\n+\treturn true;\n+}\n+\n static int w25n0xjw_hs_cfg(struct spinand_device *spinand,\n \t\t\t   enum spinand_bus_interface iface)\n {\n \tconst struct spi_mem_op *op;\n-\tbool hs;\n \n \tif (iface != SSDR)\n \t\treturn -EOPNOTSUPP;\n \n-\t/*\n-\t * SDR dual and quad I/O operations over 104MHz require the HS bit to\n-\t * enable a few more dummy cycles.\n-\t */\n \top = spinand->op_templates->read_cache;\n-\tif (op->cmd.dtr || op->addr.dtr || op->dummy.dtr || op->data.dtr)\n-\t\ths = false;\n-\telse if (op->cmd.buswidth != 1 || op->addr.buswidth == 1)\n-\t\ths = false;\n-\telse if (op->max_freq && op->max_freq <= 104 * HZ_PER_MHZ)\n-\t\ths = false;\n-\telse\n-\t\ths = true;\n \n-\treturn w25n0xjw_set_sr4_hs(spinand, hs);\n+\treturn w25n0xjw_set_sr4_hs(spinand, w25n0xjw_op_needs_hs(op));\n }\n \n static int w35n0xjw_write_vcr(struct spinand_device *spinand, u8 reg, u8 val)\n","prefixes":["v3","10/11"]}