{"id":2230666,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2230666/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260430000524.56046-7-richard.henderson@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.1/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260430000524.56046-7-richard.henderson@linaro.org>","date":"2026-04-30T00:04:49","name":"[v2,06/40] fpu: Inline float64_pack_raw into callers","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"efb36c457942fd528212de66d1a0a09835d7e4ac","submitter":{"id":72104,"url":"http://patchwork.ozlabs.org/api/1.1/people/72104/?format=json","name":"Richard Henderson","email":"richard.henderson@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260430000524.56046-7-richard.henderson@linaro.org/mbox/","series":[{"id":502170,"url":"http://patchwork.ozlabs.org/api/1.1/series/502170/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=502170","date":"2026-04-30T00:04:48","name":"fpu: Export some internals for targets","version":2,"mbox":"http://patchwork.ozlabs.org/series/502170/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2230666/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2230666/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=EuyiLonf;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g5ZG45b6xz1yHZ\n\tfor ; Thu, 30 Apr 2026 10:06:20 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wIEuY-00069P-Jk; Wed, 29 Apr 2026 20:05:46 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1wIEuX-00069C-Gc\n for qemu-devel@nongnu.org; Wed, 29 Apr 2026 20:05:45 -0400","from mail-pf1-x433.google.com ([2607:f8b0:4864:20::433])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from )\n id 1wIEuV-0001jb-W9\n for qemu-devel@nongnu.org; Wed, 29 Apr 2026 20:05:45 -0400","by mail-pf1-x433.google.com with SMTP id\n d2e1a72fcca58-82cf636dac8so171715b3a.3\n for ; Wed, 29 Apr 2026 17:05:43 -0700 (PDT)","from stoup.. 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helo=mail-pf1-x433.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"Signed-off-by: Richard Henderson \n---\n fpu/softfloat.c | 15 +++++----------\n 1 file changed, 5 insertions(+), 10 deletions(-)","diff":"diff --git a/fpu/softfloat.c b/fpu/softfloat.c\nindex d1acf383e9..302612fe42 100644\n--- a/fpu/softfloat.c\n+++ b/fpu/softfloat.c\n@@ -673,11 +673,6 @@ static uint64_t pack_raw64(const FloatParts64 *p, const FloatFmt *fmt)\n return ret;\n }\n \n-static float64 QEMU_FLATTEN float64_pack_raw(const FloatParts64 *p)\n-{\n- return make_float64(pack_raw64(p, &float64_params));\n-}\n-\n static float128 QEMU_FLATTEN float128_pack_raw(const FloatParts128 *p)\n {\n const int f_size = float128_params.frac_size - 64;\n@@ -1506,7 +1501,7 @@ static float64 float64_round_pack_canonical(FloatParts64 *p,\n float_status *s)\n {\n parts64_uncanon(p, s, &float64_params, false);\n- return float64_pack_raw(p);\n+ return pack_raw64(p, &float64_params);\n }\n \n static float64 float64r32_pack_raw(FloatParts64 *p)\n@@ -1548,7 +1543,7 @@ static float64 float64r32_pack_raw(FloatParts64 *p)\n g_assert_not_reached();\n }\n \n- return float64_pack_raw(p);\n+ return pack_raw64(p, &float64_params);\n }\n \n static float64 float64r32_round_pack_canonical(FloatParts64 *p,\n@@ -2047,7 +2042,7 @@ float64_muladd_scalbn(float64 a, float64 b, float64 c,\n if ((flags & float_muladd_negate_result) && !is_nan(pr->cls)) {\n pr->sign ^= 1;\n }\n- return float64_pack_raw(pr);\n+ return pack_raw64(pr, &float64_params);\n }\n \n static bool force_soft_fma;\n@@ -4725,7 +4720,7 @@ float64 float64_default_nan(float_status *status)\n \n parts64_default_nan(&p, status);\n p.frac >>= float64_params.frac_shift;\n- return float64_pack_raw(&p);\n+ return pack_raw64(&p, &float64_params);\n }\n \n float128 float128_default_nan(float_status *status)\n@@ -4777,7 +4772,7 @@ float64 float64_silence_nan(float64 a, float_status *status)\n p.frac <<= float64_params.frac_shift;\n parts64_silence_nan(&p, status);\n p.frac >>= float64_params.frac_shift;\n- return float64_pack_raw(&p);\n+ return pack_raw64(&p, &float64_params);\n }\n \n bfloat16 bfloat16_silence_nan(bfloat16 a, float_status *status)\n","prefixes":["v2","06/40"]}