{"id":2230655,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2230655/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260429-pic32mk-board-support-v1-3-1dfac14f8e2d@voltumotor.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.1/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260429-pic32mk-board-support-v1-3-1dfac14f8e2d@voltumotor.com>","date":"2026-04-29T21:51:19","name":"[RFC,3/3] docs: document the PIC32MK machine in target-mips.rst","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"5526fbfac8ee9d261f3c3aee0a85c675c65de3cc","submitter":{"id":93284,"url":"http://patchwork.ozlabs.org/api/1.1/people/93284/?format=json","name":"Ericson Joseph","email":"ericsonjoseph@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260429-pic32mk-board-support-v1-3-1dfac14f8e2d@voltumotor.com/mbox/","series":[{"id":502167,"url":"http://patchwork.ozlabs.org/api/1.1/series/502167/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=502167","date":"2026-04-29T21:51:18","name":"hw/mips: add Microchip PIC32MK GPK/MCM board emulation","version":1,"mbox":"http://patchwork.ozlabs.org/series/502167/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2230655/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2230655/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=OszSFK0n;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=\"utf-8\"","Content-Transfer-Encoding":"8bit","Message-Id":"<20260429-pic32mk-board-support-v1-3-1dfac14f8e2d@voltumotor.com>","References":"<20260429-pic32mk-board-support-v1-0-1dfac14f8e2d@voltumotor.com>","In-Reply-To":"<20260429-pic32mk-board-support-v1-0-1dfac14f8e2d@voltumotor.com>","To":"qemu-devel@nongnu.org","Cc":"=?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= ,\n Jiaxun Yang , Paolo Bonzini ,\n Fabiano Rosas , Laurent Vivier ,\n Pierrick Bouvier ,\n Ericson Joseph ","X-Mailer":"b4 0.15.2","Received-SPF":"pass client-ip=2607:f8b0:4864:20::1329;\n envelope-from=ericsonjoseph@gmail.com; helo=mail-dy1-x1329.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-Mailman-Approved-At":"Wed, 29 Apr 2026 19:34:51 -0400","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"Add the Microchip PIC32MK GPK/MCM board to the MIPS system emulator\ndocumentation, listing all supported peripherals, the firmware load\naddress, and example command lines for basic UART and CAN FD usage.\n\nSigned-off-by: Ericson Joseph \n---\n docs/system/target-mips.rst | 52 +++++++++++++++++++++++++++++++++++++++++++++\n 1 file changed, 52 insertions(+)","diff":"diff --git a/docs/system/target-mips.rst b/docs/system/target-mips.rst\nindex 2a152e1338..571c7b6fa8 100644\n--- a/docs/system/target-mips.rst\n+++ b/docs/system/target-mips.rst\n@@ -15,6 +15,8 @@ machine types are emulated:\n - A MIPS Magnum R4000 machine \\\"magnum\\\". This machine needs the\n 64-bit emulator.\n \n+- The Microchip PIC32MK GPK/MCM microcontroller family \\\"pic32mk\\\"\n+\n The Malta emulation supports the following devices:\n \n - Core board with MIPS 24Kf CPU and Galileo system controller\n@@ -78,6 +80,56 @@ The Loongson-3 virtual platform emulation supports:\n \n - Both KVM and TCG supported\n \n+The PIC32MK GPK/MCM emulation supports the following devices:\n+\n+- MIPS32 microAptiv MCU core (74Kf, little-endian, 120 MHz)\n+\n+- 256 KB SRAM, 1 MB program flash, 256 KB boot flash\n+\n+- EVIC — 216-source vectored interrupt controller\n+\n+- UART × 6 (UART1 connected to the first serial port by default)\n+\n+- Timer × 9 with prescaler and period-match interrupts\n+\n+- GPIO ports A–G with TRIS/LAT/PORT/ANSEL/CNPU/CNPD registers\n+\n+- SPI × 6 (master and slave modes)\n+\n+- I2C × 4\n+\n+- DMA × 8 channels\n+\n+- CAN FD × 4 (via QEMU ``can-bus`` objects, SocketCAN-compatible)\n+\n+- USB Full-Speed OTG × 2 (chardev PTY)\n+\n+- ADCHS — 12-bit high-speed ADC with 7 cores\n+\n+- NVM flash controller with optional host-file backing\n+\n+- Data EEPROM emulation over program flash\n+\n+- Output Compare (OC) × 16 and Input Capture (IC) × 16\n+\n+- CRU (Clock and Reset Unit), WDT (Watchdog), CFG (configuration)\n+\n+Running a firmware image::\n+\n+ qemu-system-mipsel -M pic32mk -bios firmware.bin \\\n+ -serial stdio -nographic -monitor none\n+\n+Connecting to a SocketCAN interface (e.g. ``vcan0``)::\n+\n+ qemu-system-mipsel -M pic32mk -bios firmware.bin \\\n+ -object can-bus,id=canbus0 \\\n+ -object can-host-socketcan,id=canhost0,if=vcan0,canbus=canbus0 \\\n+ -serial stdio -nographic\n+\n+Firmware must be a raw binary linked to start at 0xBFC40000\n+(Boot Flash 1). The reset vector at 0xBFC00000 contains a trampoline\n+that jumps to 0xBFC40000.\n+\n .. include:: cpu-models-mips.rst.inc\n \n .. _nanoMIPS-System-emulator:\n","prefixes":["RFC","3/3"]}