{"id":2230488,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2230488/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260429190532.26538-4-mohamed@unpredictable.fr/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.1/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260429190532.26538-4-mohamed@unpredictable.fr>","date":"2026-04-29T19:05:20","name":"[v21,03/15] accel, hw/arm, include/system/hvf: infrastructure changes for HVF vGIC","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"466bd55f5ceee3e13f5f00043c5885bec360cd80","submitter":{"id":91318,"url":"http://patchwork.ozlabs.org/api/1.1/people/91318/?format=json","name":"Mohamed Mediouni","email":"mohamed@unpredictable.fr"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260429190532.26538-4-mohamed@unpredictable.fr/mbox/","series":[{"id":502138,"url":"http://patchwork.ozlabs.org/api/1.1/series/502138/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=502138","date":"2026-04-29T19:05:29","name":"HVF: Add support for platform vGIC and nested virtualisation","version":21,"mbox":"http://patchwork.ozlabs.org/series/502138/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2230488/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2230488/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=unpredictable.fr header.i=@unpredictable.fr\n header.a=rsa-sha256 header.s=sig1 header.b=Lf9wyI5f;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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helo=outbound.ms.icloud.com","X-Spam_score_int":"-27","X-Spam_score":"-2.8","X-Spam_bar":"--","X-Spam_report":"(-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001,\n SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"Misc changes needed for HVF vGIC enablement.\n\nNote: x86_64 macOS exposes interrupt controller virtualisation since macOS 12.\nKeeping an #ifdef here in case we end up supporting that...\n\nHowever, given that x86_64 macOS is on its way out, it'll probably (?)\nnot be supported in QEMU.\n\nSigned-off-by: Mohamed Mediouni \n---\n accel/hvf/hvf-all.c | 46 ++++++++++++++++++++++++++++++++++++++\n accel/stubs/hvf-stub.c | 1 +\n hw/arm/virt.c | 23 +++++++++++++++----\n hw/intc/arm_gicv3_common.c | 3 +++\n include/system/hvf.h | 3 +++\n system/vl.c | 2 ++\n 6 files changed, 74 insertions(+), 4 deletions(-)","diff":"diff --git a/accel/hvf/hvf-all.c b/accel/hvf/hvf-all.c\nindex 5f357c6d19..add265e0c8 100644\n--- a/accel/hvf/hvf-all.c\n+++ b/accel/hvf/hvf-all.c\n@@ -10,6 +10,8 @@\n \n #include \"qemu/osdep.h\"\n #include \"qemu/error-report.h\"\n+#include \"qapi/error.h\"\n+#include \"qapi/qapi-visit-common.h\"\n #include \"accel/accel-ops.h\"\n #include \"exec/cpu-common.h\"\n #include \"system/address-spaces.h\"\n@@ -21,6 +23,7 @@\n #include \"trace.h\"\n \n bool hvf_allowed;\n+bool hvf_kernel_irqchip;\n \n const char *hvf_return_string(hv_return_t ret)\n {\n@@ -216,6 +219,43 @@ static int hvf_gdbstub_sstep_flags(AccelState *as)\n return SSTEP_ENABLE | SSTEP_NOIRQ;\n }\n \n+static void hvf_set_kernel_irqchip(Object *obj, Visitor *v,\n+ const char *name, void *opaque,\n+ Error **errp)\n+{\n+ OnOffSplit mode;\n+ if (!visit_type_OnOffSplit(v, name, &mode, errp)) {\n+ return;\n+ }\n+\n+ switch (mode) {\n+ case ON_OFF_SPLIT_ON:\n+#ifdef HOST_X86_64\n+ /* macOS 12 onwards exposes an HVF virtual APIC. */\n+ error_setg(errp, \"HVF: kernel irqchip is not currently implemented for x86.\");\n+ break;\n+#else\n+ hvf_kernel_irqchip = true;\n+ break;\n+#endif\n+\n+ case ON_OFF_SPLIT_OFF:\n+ hvf_kernel_irqchip = false;\n+ break;\n+\n+ case ON_OFF_SPLIT_SPLIT:\n+ error_setg(errp, \"HVF: split irqchip is not supported on HVF.\");\n+ break;\n+\n+ default:\n+ /*\n+ * The value was checked in visit_type_OnOffSplit() above. If\n+ * we get here, then something is wrong in QEMU.\n+ */\n+ abort();\n+ }\n+}\n+\n static void hvf_accel_class_init(ObjectClass *oc, const void *data)\n {\n AccelClass *ac = ACCEL_CLASS(oc);\n@@ -223,6 +263,12 @@ static void hvf_accel_class_init(ObjectClass *oc, const void *data)\n ac->init_machine = hvf_accel_init;\n ac->allowed = &hvf_allowed;\n ac->gdbstub_supported_sstep_flags = hvf_gdbstub_sstep_flags;\n+ hvf_kernel_irqchip = false;\n+ object_class_property_add(oc, \"kernel-irqchip\", \"on|off|split\",\n+ NULL, hvf_set_kernel_irqchip,\n+ NULL, NULL);\n+ object_class_property_set_description(oc, \"kernel-irqchip\",\n+ \"Configure HVF irqchip\");\n }\n \n static const TypeInfo hvf_accel_type = {\ndiff --git a/accel/stubs/hvf-stub.c b/accel/stubs/hvf-stub.c\nindex 42eadc5ca9..6bd08759ba 100644\n--- a/accel/stubs/hvf-stub.c\n+++ b/accel/stubs/hvf-stub.c\n@@ -10,3 +10,4 @@\n #include \"system/hvf.h\"\n \n bool hvf_allowed;\n+bool hvf_kernel_irqchip;\ndiff --git a/hw/arm/virt.c b/hw/arm/virt.c\nindex 77891f0820..47400214a2 100644\n--- a/hw/arm/virt.c\n+++ b/hw/arm/virt.c\n@@ -1163,7 +1163,7 @@ static void create_gic(VirtMachineState *vms, MemoryRegion *mem)\n * interrupts; there are always 32 of the former (mandated by GIC spec).\n */\n qdev_prop_set_uint32(vms->gic, \"num-irq\", NUM_IRQS + 32);\n- if (!kvm_irqchip_in_kernel()) {\n+ if (!kvm_irqchip_in_kernel() && !hvf_irqchip_in_kernel()) {\n qdev_prop_set_bit(vms->gic, \"has-security-extensions\", vms->secure);\n }\n \n@@ -1186,7 +1186,8 @@ static void create_gic(VirtMachineState *vms, MemoryRegion *mem)\n qdev_prop_set_array(vms->gic, \"redist-region-count\",\n redist_region_count);\n \n- if (!kvm_irqchip_in_kernel()) {\n+ if (!kvm_irqchip_in_kernel() &&\n+ !(hvf_enabled() && hvf_irqchip_in_kernel())) {\n if (vms->tcg_its) {\n object_property_set_link(OBJECT(vms->gic), \"sysmem\",\n OBJECT(mem), &error_fatal);\n@@ -1197,7 +1198,7 @@ static void create_gic(VirtMachineState *vms, MemoryRegion *mem)\n ARCH_GIC_MAINT_IRQ);\n }\n } else {\n- if (!kvm_irqchip_in_kernel()) {\n+ if (!kvm_irqchip_in_kernel() && !hvf_irqchip_in_kernel()) {\n qdev_prop_set_bit(vms->gic, \"has-virtualization-extensions\",\n vms->virt);\n }\n@@ -2444,7 +2445,15 @@ static void finalize_gic_version(VirtMachineState *vms)\n accel_name = \"KVM with kernel-irqchip=off\";\n } else if (whpx_enabled()) {\n gics_supported |= VIRT_GIC_VERSION_3_MASK;\n- } else if (tcg_enabled() || hvf_enabled() || qtest_enabled()) {\n+ } else if (hvf_enabled()) {\n+ if (!hvf_irqchip_in_kernel()) {\n+ gics_supported |= VIRT_GIC_VERSION_2_MASK;\n+ }\n+ /* Hypervisor.framework doesn't expose EL2<->1 transition notifiers */\n+ if (!(!hvf_irqchip_in_kernel() && vms->virt)) {\n+ gics_supported |= VIRT_GIC_VERSION_3_MASK;\n+ }\n+ } else if (tcg_enabled() || qtest_enabled()) {\n gics_supported |= VIRT_GIC_VERSION_2_MASK;\n if (module_object_class_by_name(\"arm-gicv3\")) {\n gics_supported |= VIRT_GIC_VERSION_3_MASK;\n@@ -2486,6 +2495,8 @@ static void finalize_msi_controller(VirtMachineState *vms)\n vms->msi_controller = VIRT_MSI_CTRL_GICV2M;\n } else if (whpx_enabled()) {\n vms->msi_controller = VIRT_MSI_CTRL_GICV2M;\n+ } else if (hvf_enabled() && hvf_irqchip_in_kernel()) {\n+ vms->msi_controller = VIRT_MSI_CTRL_GICV2M;\n } else {\n vms->msi_controller = VIRT_MSI_CTRL_ITS;\n }\n@@ -2505,6 +2516,10 @@ static void finalize_msi_controller(VirtMachineState *vms)\n error_report(\"ITS not supported on WHPX.\");\n exit(1);\n }\n+ if (hvf_enabled() && hvf_irqchip_in_kernel()) {\n+ error_report(\"ITS not supported on HVF when using the hardware vGIC.\");\n+ exit(1);\n+ }\n }\n \n assert(vms->msi_controller != VIRT_MSI_CTRL_AUTO);\ndiff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c\nindex 9c3fb2f4bf..f7ba74e6d5 100644\n--- a/hw/intc/arm_gicv3_common.c\n+++ b/hw/intc/arm_gicv3_common.c\n@@ -33,6 +33,7 @@\n #include \"hw/arm/linux-boot-if.h\"\n #include \"system/kvm.h\"\n #include \"system/whpx.h\"\n+#include \"system/hvf.h\"\n \n \n static void gicv3_gicd_no_migration_shift_bug_post_load(GICv3State *cs)\n@@ -659,6 +660,8 @@ const char *gicv3_class_name(void)\n return \"kvm-arm-gicv3\";\n } else if (whpx_enabled()) {\n return TYPE_WHPX_GICV3;\n+ } else if (hvf_enabled() && hvf_irqchip_in_kernel()) {\n+ return TYPE_HVF_GICV3;\n } else {\n if (kvm_enabled()) {\n error_report(\"Userspace GICv3 is not supported with KVM\");\ndiff --git a/include/system/hvf.h b/include/system/hvf.h\nindex d3dcf088b3..dc8da85979 100644\n--- a/include/system/hvf.h\n+++ b/include/system/hvf.h\n@@ -26,8 +26,11 @@\n #ifdef CONFIG_HVF_IS_POSSIBLE\n extern bool hvf_allowed;\n #define hvf_enabled() (hvf_allowed)\n+extern bool hvf_kernel_irqchip;\n+#define hvf_irqchip_in_kernel() (hvf_kernel_irqchip)\n #else /* !CONFIG_HVF_IS_POSSIBLE */\n #define hvf_enabled() 0\n+#define hvf_irqchip_in_kernel() 0\n #endif /* !CONFIG_HVF_IS_POSSIBLE */\n \n #define TYPE_HVF_ACCEL ACCEL_CLASS_NAME(\"hvf\")\ndiff --git a/system/vl.c b/system/vl.c\nindex 0e1fc217b4..516ed7890b 100644\n--- a/system/vl.c\n+++ b/system/vl.c\n@@ -1781,6 +1781,8 @@ static void qemu_apply_legacy_machine_options(QDict *qdict)\n false);\n object_register_sugar_prop(ACCEL_CLASS_NAME(\"whpx\"), \"kernel-irqchip\", value,\n false);\n+ object_register_sugar_prop(ACCEL_CLASS_NAME(\"hvf\"), \"kernel-irqchip\", value,\n+ false);\n qdict_del(qdict, \"kernel-irqchip\");\n }\n \n","prefixes":["v21","03/15"]}