{"id":2230483,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2230483/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260429190532.26538-10-mohamed@unpredictable.fr/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.1/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260429190532.26538-10-mohamed@unpredictable.fr>","date":"2026-04-29T19:05:26","name":"[v21,09/15] target/arm: hvf: add asserts for code paths not leveraged when using the vGIC","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"4374518e4479aabb166719b9fb79a31f877a316c","submitter":{"id":91318,"url":"http://patchwork.ozlabs.org/api/1.1/people/91318/?format=json","name":"Mohamed Mediouni","email":"mohamed@unpredictable.fr"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260429190532.26538-10-mohamed@unpredictable.fr/mbox/","series":[{"id":502138,"url":"http://patchwork.ozlabs.org/api/1.1/series/502138/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=502138","date":"2026-04-29T19:05:29","name":"HVF: Add support for platform vGIC and nested virtualisation","version":21,"mbox":"http://patchwork.ozlabs.org/series/502138/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2230483/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2230483/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=unpredictable.fr header.i=@unpredictable.fr\n header.a=rsa-sha256 header.s=sig1 header.b=G/OvQXpj;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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helo=outbound.ms.icloud.com","X-Spam_score_int":"-27","X-Spam_score":"-2.8","X-Spam_bar":"--","X-Spam_report":"(-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001,\n SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"When using the vGIC, timers are directly handled by the platform.\nNo vmexits ought to happen in that case. Abort if reaching those code paths.\n\nSigned-off-by: Mohamed Mediouni \nReviewed-by: Mads Ynddal \nReviewed-by: Philippe Mathieu-Daudé \n---\n target/arm/hvf/hvf.c | 3 +++\n 1 file changed, 3 insertions(+)","diff":"diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c\nindex 390a3529ff..38f88c1a80 100644\n--- a/target/arm/hvf/hvf.c\n+++ b/target/arm/hvf/hvf.c\n@@ -1696,6 +1696,7 @@ static int hvf_sysreg_read(CPUState *cpu, uint32_t reg, uint64_t *val)\n case SYSREG_ICC_SGI1R_EL1:\n case SYSREG_ICC_SRE_EL1:\n case SYSREG_ICC_CTLR_EL1:\n+ assert(!hvf_irqchip_in_kernel());\n /* Call the TCG sysreg handler. This is only safe for GICv3 regs. */\n if (hvf_sysreg_read_cp(cpu, \"GICv3\", reg, val)) {\n return 0;\n@@ -1986,6 +1987,7 @@ static int hvf_sysreg_write(CPUState *cpu, uint32_t reg, uint64_t val)\n case SYSREG_ICC_SGI0R_EL1:\n case SYSREG_ICC_SGI1R_EL1:\n case SYSREG_ICC_SRE_EL1:\n+ assert(!hvf_irqchip_in_kernel());\n /* Call the TCG sysreg handler. This is only safe for GICv3 regs. */\n if (hvf_sysreg_write_cp(cpu, \"GICv3\", reg, val)) {\n return 0;\n@@ -2393,6 +2395,7 @@ static int hvf_handle_vmexit(CPUState *cpu, hv_vcpu_exit_t *exit)\n ret = hvf_handle_exception(cpu, &exit->exception);\n break;\n case HV_EXIT_REASON_VTIMER_ACTIVATED:\n+ assert(!hvf_irqchip_in_kernel());\n qemu_set_irq(arm_cpu->gt_timer_outputs[GTIMER_VIRT], 1);\n cpu->accel->vtimer_masked = true;\n break;\n","prefixes":["v21","09/15"]}