{"id":2230480,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2230480/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260429190532.26538-14-mohamed@unpredictable.fr/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.1/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260429190532.26538-14-mohamed@unpredictable.fr>","date":"2026-04-29T19:05:30","name":"[v21,13/15] hvf: arm: physical timer emulation","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"4498bd20f11c1ff7e08a045ff3a4524990bfa2c3","submitter":{"id":91318,"url":"http://patchwork.ozlabs.org/api/1.1/people/91318/?format=json","name":"Mohamed Mediouni","email":"mohamed@unpredictable.fr"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260429190532.26538-14-mohamed@unpredictable.fr/mbox/","series":[{"id":502138,"url":"http://patchwork.ozlabs.org/api/1.1/series/502138/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=502138","date":"2026-04-29T19:05:29","name":"HVF: Add support for platform vGIC and nested virtualisation","version":21,"mbox":"http://patchwork.ozlabs.org/series/502138/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2230480/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2230480/checks/","tags":{},"headers":{"Return-Path":"<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=unpredictable.fr header.i=@unpredictable.fr\n header.a=rsa-sha256 header.s=sig1 header.b=L2BQXfAM;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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helo=outbound.ms.icloud.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_MSPIKE_H2=0.001, SPF_HELO_PASS=-0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development <qemu-devel.nongnu.org>","List-Unsubscribe":"<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>","List-Archive":"<https://lists.nongnu.org/archive/html/qemu-devel>","List-Post":"<mailto:qemu-devel@nongnu.org>","List-Help":"<mailto:qemu-devel-request@nongnu.org?subject=help>","List-Subscribe":"<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"Enable this through leveraging TCG's physical timer emulation.\nThis allows nested virtualisation to work with a kernel-irqchip=off + GICv2.\n\nSigned-off-by: Mohamed Mediouni <mohamed@unpredictable.fr>\n---\n target/arm/hvf/hvf.c | 28 +++++++++++++++++++---------\n 1 file changed, 19 insertions(+), 9 deletions(-)","diff":"diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c\nindex 51b37b3331..4f0f7ffba1 100644\n--- a/target/arm/hvf/hvf.c\n+++ b/target/arm/hvf/hvf.c\n@@ -189,7 +189,9 @@ void hvf_arm_init_debug(void)\n #define SYSREG_OSDLR_EL1      SYSREG(2, 0, 1, 3, 4)\n #define SYSREG_LORC_EL1       SYSREG(3, 0, 10, 4, 3)\n #define SYSREG_CNTPCT_EL0     SYSREG(3, 3, 14, 0, 1)\n+#define SYSREG_CNTP_TVAL_EL0   SYSREG(3, 3, 14, 2, 0)\n #define SYSREG_CNTP_CTL_EL0   SYSREG(3, 3, 14, 2, 1)\n+#define SYSREG_CNTP_CVAL_EL0   SYSREG(3, 3, 14, 2, 2)\n #define SYSREG_PMCR_EL0       SYSREG(3, 3, 9, 12, 0)\n #define SYSREG_PMUSERENR_EL0  SYSREG(3, 3, 9, 14, 0)\n #define SYSREG_PMCNTENSET_EL0 SYSREG(3, 3, 9, 12, 1)\n@@ -1719,9 +1721,15 @@ static int hvf_sysreg_read(CPUState *cpu, uint32_t reg, uint64_t *val)\n \n     switch (reg) {\n     case SYSREG_CNTPCT_EL0:\n-        *val = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) /\n-              gt_cntfrq_period_ns(arm_cpu);\n-        return 0;\n+    case SYSREG_CNTP_CTL_EL0:\n+    case SYSREG_CNTP_CVAL_EL0:\n+    case SYSREG_CNTP_TVAL_EL0:\n+        assert(!hvf_irqchip_in_kernel());\n+        /* Call the TCG sysreg handler. */\n+        if (hvf_sysreg_read_cp(cpu, \"PTimer\", reg, val)) {\n+            return 0;\n+        }\n+        break;\n     case SYSREG_OSLSR_EL1:\n         *val = env->cp15.oslsr_el1;\n         return 0;\n@@ -2015,12 +2023,14 @@ static int hvf_sysreg_write(CPUState *cpu, uint32_t reg, uint64_t val)\n         env->cp15.oslsr_el1 = val & 1;\n         return 0;\n     case SYSREG_CNTP_CTL_EL0:\n-        /*\n-         * Guests should not rely on the physical counter, but macOS emits\n-         * disable writes to it. Let it do so, but ignore the requests.\n-         */\n-        qemu_log_mask(LOG_UNIMP, \"Unsupported write to CNTP_CTL_EL0\\n\");\n-        return 0;\n+    case SYSREG_CNTP_CVAL_EL0:\n+    case SYSREG_CNTP_TVAL_EL0:\n+        assert(!hvf_irqchip_in_kernel());\n+        /* Call the TCG sysreg handler. */\n+        if (hvf_sysreg_write_cp(cpu, \"PTimer\", reg, val)) {\n+            return 0;\n+        }\n+        break;\n     case SYSREG_OSDLR_EL1:\n         /* Dummy register */\n         return 0;\n","prefixes":["v21","13/15"]}