{"id":2230414,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2230414/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260429180647.197072-3-thomas.falcon@intel.com/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/1.1/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20260429180647.197072-3-thomas.falcon@intel.com>","date":"2026-04-29T18:06:44","name":"[RFC,2/4] pcie/aspm: Enable all power-saving states during link state initialization","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"2ecade1d475106a0bb27fc25a5c25919aabd8064","submitter":{"id":93044,"url":"http://patchwork.ozlabs.org/api/1.1/people/93044/?format=json","name":"Falcon, Thomas","email":"thomas.falcon@intel.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260429180647.197072-3-thomas.falcon@intel.com/mbox/","series":[{"id":502124,"url":"http://patchwork.ozlabs.org/api/1.1/series/502124/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/list/?series=502124","date":"2026-04-29T18:06:44","name":"pcie/aspm: Enable all advertised ASPM states by default","version":1,"mbox":"http://patchwork.ozlabs.org/series/502124/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2230414/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2230414/checks/","tags":{},"headers":{"Return-Path":"\n <linux-pci+bounces-53417-incoming=patchwork.ozlabs.org@vger.kernel.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=nIWLhGr2;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.234.253.10; helo=sea.lore.kernel.org;\n envelope-from=linux-pci+bounces-53417-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com\n header.b=\"nIWLhGr2\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=192.198.163.15","smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=intel.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=intel.com"],"Received":["from sea.lore.kernel.org (sea.lore.kernel.org [172.234.253.10])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g5QJN0qykz1xqf\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 30 Apr 2026 04:07:48 +1000 (AEST)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sea.lore.kernel.org (Postfix) with ESMTP id B4920303FFF9\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 29 Apr 2026 18:07:12 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 95E2141B346;\n\tWed, 29 Apr 2026 18:07:05 +0000 (UTC)","from mgamail.intel.com (mgamail.intel.com [192.198.163.15])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id EAE1841B342;\n\tWed, 29 Apr 2026 18:07:00 +0000 (UTC)","from fmviesa003.fm.intel.com ([10.60.135.143])\n  by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 29 Apr 2026 11:06:55 -0700","from iherna2-mobl4.amr.corp.intel.com (HELO tfalcon-desk.intel.com)\n ([10.124.221.251])\n  by fmviesa003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 29 Apr 2026 11:06:54 -0700"],"ARC-Seal":"i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1777486024; cv=none;\n b=cw1JKr7PQUTkzjjCP7pFXoyIIpM4hQVvlVIx3NSj3VkTnUGvEl2uzJ8aCQy9/w7NH6EdTf2YDxGdGK7nZTXP6nhQLgUuyuPUNWevFyAFqpy9KIp4urKduVh8Izr+R9Ubv5/eWsZx2KTOlh4ZGfTIjAPHq7YsfgqJp22yDKUtD4A=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1777486024; c=relaxed/simple;\n\tbh=i9DctissnUwJ7gbXq/le4a2C0KOutO1M9loIHeYL1Lw=;\n\th=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:\n\t MIME-Version;\n b=PUGzdd7+yfCxcmOY7nEq6xnGRT1dtjxarMNfq09D5jo8grzTPIwcYq4LLaLdiySqZZwGmT5/eynS+KZL4OY2sIcLhqYIMR3m7KBrZtPniZuruAAcSmaFQnm+7nMW7hKlGAXWxwzRV2MNEh8vedxIuKDQMTFpy4OTLL7Dv/vkhwQ=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=intel.com;\n spf=pass smtp.mailfrom=intel.com;\n dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com\n header.b=nIWLhGr2; arc=none smtp.client-ip=192.198.163.15","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple;\n  d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n  t=1777486021; x=1809022021;\n  h=from:to:cc:subject:date:message-id:in-reply-to:\n   references:mime-version:content-transfer-encoding;\n  bh=i9DctissnUwJ7gbXq/le4a2C0KOutO1M9loIHeYL1Lw=;\n  b=nIWLhGr2oH9OB574DqFAIj3FpaADp3kw0Q9B/ZuKyZthTQi6MusX1Weh\n   5PnqzhoFPcFQHnXrxkVsCxcrBHqj2q+kWEXY+H+pgwYsbtmd7NQg7R+5J\n   Y1vE2e/GxPiBmQ7e2ik0YHAoiyz1SjIEHz8dmhhK6GJqEO5pjnit3/LW4\n   zWi6Ve9l68NmxaO2lGAVtZ6MAXgVgVUcemb9WbH1aAxlZW/3eJ/CoAkMW\n   fVOThzgb9YyQiTBfjqGcUqfMv4fgm9fx+Q6FHsldgv255TrG/sOVjuvUD\n   WPo+PiuA+fdZ8ku41+2XPJM4UQqVc4sH817t0EAfMG7vZQj1+mbwZBgyn\n   w==;","X-CSE-ConnectionGUID":["5NrUaydTRcKHv4JMOJ4ngQ==","0l/u9bIgQEKXPMYLrAqsww=="],"X-CSE-MsgGUID":["7yI7nKyMT1K2FVzWvuQD4g==","UasF+sk9QB2H/NXH9bhDcw=="],"X-IronPort-AV":["E=McAfee;i=\"6800,10657,11771\"; a=\"78532279\"","E=Sophos;i=\"6.23,206,1770624000\";\n   d=\"scan'208\";a=\"78532279\""],"X-ExtLoop1":"1","From":"Thomas Falcon <thomas.falcon@intel.com>","To":"Bjorn Helgaas <bhelgaas@google.com>,\n\t\"Rafael J . Wysocki\" <rafael@kernel.org>","Cc":"\"David E . Box\" <david.e.box@linux.intel.com>,\n\tLukas Wunner <lukas@wunner.de>,\n\tManivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>,\n\tLen Brown <lenb@kernel.org>,\n\tlinux-pci@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org,\n\tThomas Falcon <thomas.falcon@intel.com>","Subject":"[RFC PATCH 2/4] pcie/aspm: Enable all power-saving states during link\n state initialization","Date":"Wed, 29 Apr 2026 13:06:44 -0500","Message-ID":"<20260429180647.197072-3-thomas.falcon@intel.com>","X-Mailer":"git-send-email 2.43.0","In-Reply-To":"<20260429180647.197072-1-thomas.falcon@intel.com>","References":"<20260429180647.197072-1-thomas.falcon@intel.com>","Precedence":"bulk","X-Mailing-List":"linux-pci@vger.kernel.org","List-Id":"<linux-pci.vger.kernel.org>","List-Subscribe":"<mailto:linux-pci+subscribe@vger.kernel.org>","List-Unsubscribe":"<mailto:linux-pci+unsubscribe@vger.kernel.org>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit"},"content":"Setting powersave and powersupersave states at ASPM\nlink state initialization allows for a simpler and more\nmaintainable enabling flow that presumes all advertised\npower states work. Restrict this behavior to systems\nwith a BIOS release during or after 2025.\n\nSuggested-by: David E. Box <david.e.box@linux.intel.com>\nSigned-off-by: Thomas Falcon <thomas.falcon@intel.com>\n---\n drivers/pci/pcie/aspm.c | 28 ++++++++++++++++++++++++----\n 1 file changed, 24 insertions(+), 4 deletions(-)","diff":"diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c\nindex cd23c1462502..84d49aa8a5ba 100644\n--- a/drivers/pci/pcie/aspm.c\n+++ b/drivers/pci/pcie/aspm.c\n@@ -24,6 +24,7 @@\n #include <linux/printk.h>\n #include <linux/slab.h>\n #include <linux/time.h>\n+#include <linux/dmi.h>\n \n #include \"../pci.h\"\n \n@@ -1057,6 +1058,23 @@ static void free_link_state(struct pcie_link_state *link)\n \tkfree(link);\n }\n \n+static int pcie_aspm_legacy_config_check(void)\n+{\n+\tstatic bool legacy_aspm_config;\n+\tstatic bool checked;\n+\n+\tif (checked)\n+\t\treturn legacy_aspm_config;\n+\tif (dmi_get_bios_year() < 2025)\n+\t\tlegacy_aspm_config = true;\n+\n+\tpr_info(\"ASPM configuration is determined at %s time\\n\",\n+\t\t legacy_aspm_config ? \"build\" : \"boot\");\n+\tchecked = true;\n+\n+\treturn legacy_aspm_config;\n+}\n+\n static int pcie_aspm_sanity_check(struct pci_dev *pdev)\n {\n \tstruct pci_dev *child;\n@@ -1196,8 +1214,9 @@ void pcie_aspm_init_link_state(struct pci_dev *pdev)\n \t * the BIOS's expectation, we'll do so once pci_enable_device() is\n \t * called.\n \t */\n-\tif (aspm_policy != POLICY_POWERSAVE &&\n-\t    aspm_policy != POLICY_POWER_SUPERSAVE) {\n+\tif (!pcie_aspm_legacy_config_check() ||\n+\t    (aspm_policy != POLICY_POWERSAVE &&\n+\t     aspm_policy != POLICY_POWER_SUPERSAVE)) {\n \t\tpcie_config_aspm_path(link);\n \t\tpcie_set_clkpm(link, policy_to_clkpm_state(link));\n \t}\n@@ -1379,8 +1398,9 @@ void pcie_aspm_powersave_config_link(struct pci_dev *pdev)\n \tif (aspm_disabled || !link)\n \t\treturn;\n \n-\tif (aspm_policy != POLICY_POWERSAVE &&\n-\t    aspm_policy != POLICY_POWER_SUPERSAVE)\n+\tif (!pcie_aspm_legacy_config_check() ||\n+\t    (aspm_policy != POLICY_POWERSAVE &&\n+\t     aspm_policy != POLICY_POWER_SUPERSAVE))\n \t\treturn;\n \n \tdown_read(&pci_bus_sem);\n","prefixes":["RFC","2/4"]}