{"id":2230399,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2230399/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-aspeed/patch/20260429-winbond-v6-18-rc1-cont-read-v3-5-0f38b3c229ad@bootlin.com/","project":{"id":57,"url":"http://patchwork.ozlabs.org/api/1.1/projects/57/?format=json","name":"Linux ASPEED SoC development","link_name":"linux-aspeed","list_id":"linux-aspeed.lists.ozlabs.org","list_email":"linux-aspeed@lists.ozlabs.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260429-winbond-v6-18-rc1-cont-read-v3-5-0f38b3c229ad@bootlin.com>","date":"2026-04-29T17:56:42","name":"[v3,05/11] spi: spi-mem: Create a secondary read operation","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"e7cb58836ae88e52bc5787208b0717008528c598","submitter":{"id":73368,"url":"http://patchwork.ozlabs.org/api/1.1/people/73368/?format=json","name":"Miquel Raynal","email":"miquel.raynal@bootlin.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-aspeed/patch/20260429-winbond-v6-18-rc1-cont-read-v3-5-0f38b3c229ad@bootlin.com/mbox/","series":[{"id":502122,"url":"http://patchwork.ozlabs.org/api/1.1/series/502122/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-aspeed/list/?series=502122","date":"2026-04-29T17:56:39","name":"mtd: spinand: Winbond continuous read support","version":3,"mbox":"http://patchwork.ozlabs.org/series/502122/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2230399/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2230399/checks/","tags":{},"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-aspeed@lists.ozlabs.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=bootlin.com header.i=@bootlin.com header.a=rsa-sha256\n header.s=dkim header.b=K0amzfyc;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org\n (client-ip=2404:9400:21b9:f100::1; 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charset=\"utf-8\"","Content-Transfer-Encoding":"7bit","Message-Id":"\n <20260429-winbond-v6-18-rc1-cont-read-v3-5-0f38b3c229ad@bootlin.com>","References":"\n <20260429-winbond-v6-18-rc1-cont-read-v3-0-0f38b3c229ad@bootlin.com>","In-Reply-To":"\n <20260429-winbond-v6-18-rc1-cont-read-v3-0-0f38b3c229ad@bootlin.com>","To":"Mark Brown , Richard Weinberger ,\n Vignesh Raghavendra , Michael Walle ,\n Miquel Raynal ,\n Takahiro Kuwano ,\n Lorenzo Bianconi , Ray Liu ,\n Chin-Ting Kuo , =?utf-8?q?C=C3=A9dric_Le_Goa?=\n\t=?utf-8?q?ter?= , Joel Stanley ,\n Andrew Jeffery ,\n Avi Fishman , Tomer Maimon ,\n Tali Perry , Patrick Venture ,\n Nancy Yuen , Benjamin Fair ,\n Maxime Coquelin ,\n Alexandre Torgue , =?utf-8?q?Jonathan_Neusch?=\n\t=?utf-8?q?=C3=A4fer?= ","Cc":"Pratyush Yadav ,\n Thomas Petazzoni ,\n Steam Lin , Santhosh Kumar K ,\n linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org,\n linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org,\n linux-aspeed@lists.ozlabs.org, openbmc@lists.ozlabs.org,\n linux-stm32@st-md-mailman.stormreply.com","X-Mailer":"b4 0.14.3","X-Last-TLS-Session-Version":"TLSv1.3","X-Spam-Status":"No, score=-0.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID,\n\tDKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS autolearn=disabled\n\tversion=4.0.1","X-Spam-Checker-Version":"SpamAssassin 4.0.1 (2024-03-25) on lists.ozlabs.org"},"content":"In some situations, direct mappings may need to use different\noperation templates.\n\nFor instance, when enabling continuous reads, Winbond SPI NANDs no\nlonger expect address cycles because they would be ignoring them\notherwise. Hence, right after the command opcode, they start counting\ndummy cycles, followed by the data cycles as usual.\n\nThis breaks the assumptions of \"reads from cache\" always being done\nidentically once the best variant has been picked up, across the\nlifetime of the system.\n\nIn order to support this feature, we must give direct mapping more than\na single operation template to use, in order to switch to using\nsecondary operations upon request by the upper layer.\n\nCreate the concept of optional secondary operation template, which may\nor may not be fulfilled by the SPI NAND and SPI NOR cores. If the\nunderlying SPI controller does not leverage any kind of direct mapping\nacceleration, the feature has no impact and can be freely\nused. Otherwise, the controller driver needs to opt-in for using this\nfeature, if supported.\n\nThe condition checked to know whether a secondary operation has been\nprovided or not is to look for a non zero opcode to limit the creation\nof extra variables. In practice, the opcode 0x00 exist, but is not\nrelated to any cache related operation.\n\nAcked-by: Mark Brown \nSigned-off-by: Miquel Raynal \n---\nThe choice of defining two variables named primary and secondary instead\nof using an array of templates is on purpose, to simplify the reading. I\nfind less obvious the use of an array here but this is personal taste.\n---\n drivers/spi/spi-mem.c | 17 +++++++++++++++++\n include/linux/spi/spi-mem.h | 5 +++++\n 2 files changed, 22 insertions(+)","diff":"diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c\nindex e2eaa1ba4ff6..f64eda9bbd9f 100644\n--- a/drivers/spi/spi-mem.c\n+++ b/drivers/spi/spi-mem.c\n@@ -713,6 +713,23 @@ spi_mem_dirmap_create(struct spi_mem *mem,\n \tif (info->primary_op_tmpl.data.dir == SPI_MEM_NO_DATA)\n \t\treturn ERR_PTR(-EINVAL);\n \n+\t/* Apply similar constraints to the secondary template */\n+\tif (info->secondary_op_tmpl.cmd.opcode) {\n+\t\tif (!info->secondary_op_tmpl.addr.nbytes ||\n+\t\t info->secondary_op_tmpl.addr.nbytes > 8)\n+\t\t\treturn ERR_PTR(-EINVAL);\n+\n+\t\tif (info->secondary_op_tmpl.data.dir == SPI_MEM_NO_DATA)\n+\t\t\treturn ERR_PTR(-EINVAL);\n+\n+\t\tif (!spi_mem_supports_op(mem, &info->secondary_op_tmpl))\n+\t\t\treturn ERR_PTR(-EOPNOTSUPP);\n+\n+\t\tif (ctlr->mem_ops && ctlr->mem_ops->dirmap_create &&\n+\t\t !spi_mem_controller_is_capable(ctlr, secondary_op_tmpl))\n+\t\t\treturn ERR_PTR(-EOPNOTSUPP);\n+\t}\n+\n \tdesc = kzalloc_obj(*desc);\n \tif (!desc)\n \t\treturn ERR_PTR(-ENOMEM);\ndiff --git a/include/linux/spi/spi-mem.h b/include/linux/spi/spi-mem.h\nindex 9a96ddace3eb..2012a3b2ef91 100644\n--- a/include/linux/spi/spi-mem.h\n+++ b/include/linux/spi/spi-mem.h\n@@ -227,6 +227,8 @@ struct spi_mem_op {\n * struct spi_mem_dirmap_info - Direct mapping information\n * @op_tmpl: operation template that should be used by the direct mapping when\n *\t the memory device is accessed\n+ * @secondary_op_tmpl: secondary template, may be used as an alternative to the\n+ * primary template (decided by the upper layer)\n * @offset: absolute offset this direct mapping is pointing to\n * @length: length in byte of this direct mapping\n *\n@@ -239,6 +241,7 @@ struct spi_mem_op {\n struct spi_mem_dirmap_info {\n \tstruct spi_mem_op *op_tmpl;\n \tstruct spi_mem_op primary_op_tmpl;\n+\tstruct spi_mem_op secondary_op_tmpl;\n \tu64 offset;\n \tu64 length;\n };\n@@ -382,12 +385,14 @@ struct spi_controller_mem_ops {\n * @swap16: Supports swapping bytes on a 16 bit boundary when configured in\n *\t Octal DTR\n * @per_op_freq: Supports per operation frequency switching\n+ * @secondary_op_tmpl: Supports leveraging a secondary memory operation template\n */\n struct spi_controller_mem_caps {\n \tbool dtr;\n \tbool ecc;\n \tbool swap16;\n \tbool per_op_freq;\n+\tbool secondary_op_tmpl;\n };\n \n #define spi_mem_controller_is_capable(ctlr, cap)\t\\\n","prefixes":["v3","05/11"]}