{"id":2230201,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2230201/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260429122617.7324-11-ilpo.jarvinen@linux.intel.com/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/1.1/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20260429122617.7324-11-ilpo.jarvinen@linux.intel.com>","date":"2026-04-29T12:26:16","name":"[10/11] PCI: Lower bound bridge window alignment","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"e7192c6229f6722ee93ebabd0b10773e40d715d9","submitter":{"id":83553,"url":"http://patchwork.ozlabs.org/api/1.1/people/83553/?format=json","name":"Ilpo Järvinen","email":"ilpo.jarvinen@linux.intel.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260429122617.7324-11-ilpo.jarvinen@linux.intel.com/mbox/","series":[{"id":502050,"url":"http://patchwork.ozlabs.org/api/1.1/series/502050/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/list/?series=502050","date":"2026-04-29T12:26:06","name":"PCI: pci_resource_alignment() improvement + cleanups","version":1,"mbox":"http://patchwork.ozlabs.org/series/502050/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2230201/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2230201/checks/","tags":{},"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=OPZWZ8YJ;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; 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charset=UTF-8","Content-Transfer-Encoding":"8bit"},"content":"pci_resource_alignment() does not consider bridge windows special,\nyet their alignment is subject to different requirements from BAR\nalignment.\n\nAdd lower bound to bridge window alignment to help callers out to\nalways have large enough alignment.\n\nSigned-off-by: Ilpo Järvinen \n---\n drivers/pci/setup-res.c | 12 +++++++++++-\n 1 file changed, 11 insertions(+), 1 deletion(-)","diff":"diff --git a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c\nindex 18e8775ea848..c15bce20815d 100644\n--- a/drivers/pci/setup-res.c\n+++ b/drivers/pci/setup-res.c\n@@ -19,7 +19,10 @@\n #include \n #include \n #include \n+#include \n #include \n+#include \n+\n #include \"pci.h\"\n \n static void pci_std_update_resource(struct pci_dev *dev, int resno)\n@@ -250,12 +253,19 @@ resource_size_t pci_resource_alignment(const struct pci_dev *dev,\n \t\t\t\t const struct resource *res)\n {\n \tint resno = pci_resource_num(dev, res);\n+\tresource_size_t min_align = 0;\n \n \tif (pci_resource_is_iov(resno))\n \t\treturn pci_sriov_resource_alignment(dev, resno);\n+\n \tif (dev->class >> 8 == PCI_CLASS_BRIDGE_CARDBUS)\n \t\treturn pci_cardbus_resource_alignment(res);\n-\treturn resource_alignment(res);\n+\n+\tif (pci_resource_is_bridge_win(resno) &&\n+\t (res->flags & (IORESOURCE_IO|IORESOURCE_MEM)))\n+\t\tmin_align = pci_min_window_alignment(dev->bus, res->flags);\n+\n+\treturn max(resource_alignment(res), min_align);\n }\n \n /*\n","prefixes":["10/11"]}