{"id":2230052,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2230052/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/patch/20260429-eliza_pinctrl-v2-1-feff875e8137@oss.qualcomm.com/","project":{"id":42,"url":"http://patchwork.ozlabs.org/api/1.1/projects/42/?format=json","name":"Linux GPIO development","link_name":"linux-gpio","list_id":"linux-gpio.vger.kernel.org","list_email":"linux-gpio@vger.kernel.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260429-eliza_pinctrl-v2-1-feff875e8137@oss.qualcomm.com>","date":"2026-04-29T06:15:45","name":"[v2] pinctrl: qcom: Remove unused macro definitions","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"309681cc2484598c302f4c1d4820b9b34c1f33af","submitter":{"id":90731,"url":"http://patchwork.ozlabs.org/api/1.1/people/90731/?format=json","name":"Maulik Shah (mkshah)","email":"maulik.shah@oss.qualcomm.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-gpio/patch/20260429-eliza_pinctrl-v2-1-feff875e8137@oss.qualcomm.com/mbox/","series":[{"id":501993,"url":"http://patchwork.ozlabs.org/api/1.1/series/501993/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/list/?series=501993","date":"2026-04-29T06:15:45","name":"[v2] pinctrl: qcom: Remove unused macro definitions","version":2,"mbox":"http://patchwork.ozlabs.org/series/501993/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2230052/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2230052/checks/","tags":{},"headers":{"Return-Path":"\n <linux-gpio+bounces-35748-incoming=patchwork.ozlabs.org@vger.kernel.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-gpio@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=IMOPTaYk;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=jfQSXj3N;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.234.253.10; helo=sea.lore.kernel.org;\n envelope-from=linux-gpio+bounces-35748-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com\n header.b=\"IMOPTaYk\";\n\tdkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.b=\"jfQSXj3N\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=205.220.180.131","smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=oss.qualcomm.com"],"Received":["from sea.lore.kernel.org (sea.lore.kernel.org [172.234.253.10])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g56WL3pzqz1yHv\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 29 Apr 2026 16:16:14 +1000 (AEST)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sea.lore.kernel.org (Postfix) with ESMTP id CB5803032046\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 29 Apr 2026 06:15:58 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 7473C3750AC;\n\tWed, 29 Apr 2026 06:15:58 +0000 (UTC)","from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com\n [205.220.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id B15503168EE\n\tfor <linux-gpio@vger.kernel.org>; Wed, 29 Apr 2026 06:15:55 +0000 (UTC)","from pps.filterd (m0279868.ppops.net [127.0.0.1])\n\tby mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id\n 63T27b7J4070705\n\tfor <linux-gpio@vger.kernel.org>; Wed, 29 Apr 2026 06:15:54 GMT","from mail-pj1-f72.google.com (mail-pj1-f72.google.com\n [209.85.216.72])\n\tby mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4dtttjm0kf-1\n\t(version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT)\n\tfor <linux-gpio@vger.kernel.org>; Wed, 29 Apr 2026 06:15:54 +0000 (GMT)","by mail-pj1-f72.google.com with SMTP id\n 98e67ed59e1d1-3648018e142so3087723a91.2\n        for <linux-gpio@vger.kernel.org>;\n Tue, 28 Apr 2026 23:15:54 -0700 (PDT)","from hu-mkshah-hyd.qualcomm.com ([202.46.23.25])\n        by smtp.gmail.com with ESMTPSA id\n d9443c01a7336-2b98895c613sm9879475ad.56.2026.04.28.23.15.50\n        (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n        Tue, 28 Apr 2026 23:15:52 -0700 (PDT)"],"ARC-Seal":"i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1777443358; cv=none;\n b=Cby4iU7nkwtyrFOoRy5nyJDWTwZYHCnUU8g6zTeUh9/Dqc1eO79qfnMusy8FSotudoWCTU9RNxOZQP4oGQprVWlU6+5G4Q4TrdHqUPoydHqt6pfhdL/hswTyeXcQViAI0blhyYAF0o1hkd7217u9V5SrOAhPUgnRpIYxgo/6V48=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1777443358; c=relaxed/simple;\n\tbh=e7zeGWMXkOw+MoY5DIcTASE/E7QHmk+Ob+lmuf1tucQ=;\n\th=From:Date:Subject:MIME-Version:Content-Type:Message-Id:To:Cc;\n b=tz8Hn70BFsVDOhOLJ02lWXo9gf9Qb57LIx7U/vxi9q9LckYxmPsv2Df29qPqhAed2jpNC8ZjOFJMviBJZ2p0WoTq0V1YnA6fqiIBkhSWHxag/5Lg/nt3aHIYN2R5TLXMWAwX1xB7m5dK2ncM2p19f2EHqEmKRWeDYmoPLT87THA=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com;\n spf=pass smtp.mailfrom=oss.qualcomm.com;\n dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com\n header.b=IMOPTaYk;\n dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.b=jfQSXj3N; arc=none smtp.client-ip=205.220.180.131","DKIM-Signature":["v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h=\n\tcc:content-transfer-encoding:content-type:date:from:message-id\n\t:mime-version:subject:to; s=qcppdkim1; bh=mQI9HlZWs6GzOzl44yFNiB\n\tkIxqXXUO2Luqt6FeS3o58=; b=IMOPTaYkV5FHc1YcLKGWd8cCMQCJlgM4yqAyn9\n\t2E4eYTPq4llgxyCGwtKb5MWHbGf+nl8HvMbPy5yCk/gcig27ClpkPqfjmAVOFvq+\n\t66YBHig2aH+KSkuUF/crCLl/dIqswarZPJakyOeEcqC7x5jLRx5W8/gvVoNGfoVh\n\tA63LMorM3Foo+CJCgt51gKtVmCujX2K9DIyLdKDhEk/GD/R7Jkz6NrXzKT/YxFSI\n\tnm1t/01QkQ1RA72nD6a1uMQ8krK9BD2M5j6cuvRyikZXpBO5YjcWWD+5ARiWuG/o\n\tEAgkkcsBQ0X5xRRNbAlV91a1J+M/mWDXc+3FGLl5Xyd2xuvw==","v=1; a=rsa-sha256; c=relaxed/relaxed;\n        d=oss.qualcomm.com; s=google; t=1777443354; x=1778048154;\n darn=vger.kernel.org;\n        h=cc:to:message-id:content-transfer-encoding:mime-version:subject\n         :date:from:from:to:cc:subject:date:message-id:reply-to;\n        bh=mQI9HlZWs6GzOzl44yFNiBkIxqXXUO2Luqt6FeS3o58=;\n        b=jfQSXj3Nl9Xrbuu3jgUOlZKlv55sSDlD1SucfBRmeCD8WAZes/FV9bsHqzXVFPgkQM\n         IymbWCIdU1jAvDCxYyukXlwoG31ZOJtqFsJy7ZoKS0AwALz1qzBxxOvVw0jzAg6aOrg0\n         Gl+E5NwVra2FXyMudKm3xHiBkK6+Z5S5dKYTOpjOrDzMvEvvk+GeGM1JnQHOT47VJn19\n         mqbSOfTS35E8zFGt24BdU1KUDuPvRGEJw8/lDRhGeZmU/lvfFkrhPfp3NpripipjA37E\n         4NA+Haoqa9x5p3iMf7nIDWBSOjD5zP1OQcKrO7NgYGRkHqWr9GzdOAXM0e6rndtZPXUL\n         wevA=="],"X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n        d=1e100.net; s=20251104; t=1777443354; x=1778048154;\n        h=cc:to:message-id:content-transfer-encoding:mime-version:subject\n         :date:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date\n         :message-id:reply-to;\n        bh=mQI9HlZWs6GzOzl44yFNiBkIxqXXUO2Luqt6FeS3o58=;\n        b=cLdQIawlHpeXOk040TAkrWOoV4kn+MvDFNI+FTYnIpqXHd1XhK2T6vQdVfUGbiLICq\n         JHiaheT+UkOT7UfSX9WdxqmSx76dbUpDFJC/kqT4wqbNV93B+08GKoQAhQn18YyA6gMp\n         45m4yYm2aOrb0ASds71ipRPc66Zg1RBVIT61pKp1H9fWP6DlFIHcCfpWsp6Y3kVqvWS/\n         bxEHxP7VBOrur7D+YF8FeNXv8DZCC3Pov3XUBhauJgZIh71fRNw1tz15qyiytP9aDr3m\n         0YogBfJo5Y2o0d3Ks0GBjEgBFngGFel1XOx0DCzZ8HHCaapDpoVI3p1osJow1fGDeAp3\n         cgzg==","X-Forwarded-Encrypted":"i=1;\n AFNElJ9hUv+LzBTRwXADjFAz4PKaneWf1tm/kOq8lDWmeZArvfcOKermH5FCwqvM72BGUZkzdUSVCEr5a3G7@vger.kernel.org","X-Gm-Message-State":"AOJu0YxeZ6ySnZw7+8IfMfi9CWg5nVmymj0shrVavijNLBuAgVLTpG5C\n\tnBMMuzyzWEoTG5XUjYub9codDrGAbPq4DNj/V7/SIBoo3UQpTmduMFx2wAStwj2jzVeIo1NstPP\n\tnhfNknTejl+kF16YO0A/Y+tSYUWFehSKpnj5n0mL3eTj8cJxadqb84UXk49uqIWF0","X-Gm-Gg":"AeBDietpOOnJmd+5g16w/ulYUy9tELo/0/5WU9sZ2ymc8sxzYpvdh2qOGbKw0n4yB4/\n\tTf/23oWFvese21FDITNtEasEQRm0/D+/YjvglnVhbeHb1NeSeKF8OWFBj1uwfZHO3t6I/dp0TJ8\n\tAAeMAlIgQ5KNAR/Apu3h2Sli8XFqsY/lUEDlna3pHu1mjUYsldD54Qvup5FWRZKp42Rc6VuutDA\n\t80i1r+/s40bdvuXBkJ9l1dVc0BCyhHkSABDzfu8+G5sik0yB7iF6HG2ooIB5oLXYLajmAouStLO\n\tbriqqZCo1zPVujzk62ymc1P13Mq52TzLY4y8EoR1kO8zRLlqJ4HdKVdRlzzbShQ0p0X54zeDyvG\n\tnZx7cb9C7hBTleuM8ZrpjpzpkavCEsyWKPQIJICV27Nr3y8DNa1aHGN/KEdif","X-Received":["by 2002:a17:90b:562c:b0:35f:c5cd:cc5 with SMTP id\n 98e67ed59e1d1-364a0f59ff8mr2546859a91.24.1777443353604;\n        Tue, 28 Apr 2026 23:15:53 -0700 (PDT)","by 2002:a17:90b:562c:b0:35f:c5cd:cc5 with SMTP id\n 98e67ed59e1d1-364a0f59ff8mr2546832a91.24.1777443353063;\n        Tue, 28 Apr 2026 23:15:53 -0700 (PDT)"],"From":"Maulik Shah <maulik.shah@oss.qualcomm.com>","Date":"Wed, 29 Apr 2026 11:45:45 +0530","Subject":"[PATCH v2] pinctrl: qcom: Remove unused macro definitions","Precedence":"bulk","X-Mailing-List":"linux-gpio@vger.kernel.org","List-Id":"<linux-gpio.vger.kernel.org>","List-Subscribe":"<mailto:linux-gpio+subscribe@vger.kernel.org>","List-Unsubscribe":"<mailto:linux-gpio+unsubscribe@vger.kernel.org>","MIME-Version":"1.0","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"7bit","Message-Id":"<20260429-eliza_pinctrl-v2-1-feff875e8137@oss.qualcomm.com>","X-B4-Tracking":"v=1; b=H4sIABCi8WkC/13M0QqCMBTG8VeRc91km21EV71HSMx5lgfU6WZSy\n d69JXTTzYH/ge+3QcRAGOFcbBBwpUh+zCEPBdjOjHdk1OYGyaXmR64Y9vQ2t4lGu4SeVSfZtJW\n wFaKDvJkCOnru3rXO3VFcfHjt/Cq+35+k/6RVMMGUdI3j2Fil7cXHWM4P01s/DGU+UKeUPv3qT\n UexAAAA","X-Change-ID":"20260405-eliza_pinctrl-382bd31c3eef","To":"Bjorn Andersson <andersson@kernel.org>, Linus Walleij <linusw@kernel.org>","Cc":"linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org,\n        linux-kernel@vger.kernel.org,\n        Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>,\n        Maulik Shah <maulik.shah@oss.qualcomm.com>","X-Mailer":"b4 0.14.2","X-Developer-Signature":"v=1; a=ed25519-sha256; t=1777443350; l=4243;\n i=maulik.shah@oss.qualcomm.com; s=20240109; h=from:subject:message-id;\n bh=e7zeGWMXkOw+MoY5DIcTASE/E7QHmk+Ob+lmuf1tucQ=;\n b=R8ireRA3WnFLHvUezaHRI+HOQBUJJ6RnA24Mod5Uzewfj0W7m8VVX+jC2K9rnu8PUbUYTSiOr\n p5JU07htNgBAdZ8GlK8neGV3/ZmqACLFS9nkLylxtM4zerLnI16F6ZE","X-Developer-Key":"i=maulik.shah@oss.qualcomm.com; a=ed25519;\n pk=bd9h5FIIliUddIk8p3BlQWBlzKEQ/YW5V+fe759hTWQ=","X-Proofpoint-Spam-Details-Enc":"AW1haW4tMjYwNDI5MDA1OSBTYWx0ZWRfXy3KqIy+8sQLV\n 17+Me5B+5wfQQi5YhobSkelWJnSOSHXprysBCCc0xTWk77Zok1PiJHLfggTOcO18hE8J528qJQb\n RM2Inmjg1432Z/zWtmqowUCSbpT7FvqOT+yroGHdNGiVH3npNyw0ZS8NhWJx+h9gdVGU2pi+W24\n hEHGXytGcGVucCtFYqXkOXos74YlSUEPZaVH8itLd6iKVQZWi8KR1rc5d9R2J8bRejYWE6zgY4b\n Cml03y46lwS8Tl7c7XD+6fE/iHjz9G6OHlufFnMQ+zL7SKrGxFz4mlpbmPh1BlHikDGd/2fsdgD\n Abc6rbAxX/GSSQJ8pOPxZvbMrfoNj4myd9E1hpwG2U1QOh6ROkM/Lr5B1JKHo9j2pTn98/itwfW\n s+RGGA+Gv/EE+XKzHL2GkyC1FokX0PyBwFp3eIj95NINT1iW8xg/lnrYFtWwFiKJ9uhiDOtyNuZ\n hclkRjFvq+OUYkxEo0w==","X-Authority-Analysis":"v=2.4 cv=TZKmcxQh c=1 sm=1 tr=0 ts=69f1a21a cx=c_pps\n a=RP+M6JBNLl+fLTcSJhASfg==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17\n a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10\n a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22\n a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=d3BPJbV3xAIa76psgLIA:9 a=QEXdDO2ut3YA:10\n a=iS9zxrgQBfv6-_F4QbHw:22","X-Proofpoint-GUID":"wJi2nzOh3A0TK1yXJWPJDtgnWqVc6hV9","X-Proofpoint-ORIG-GUID":"wJi2nzOh3A0TK1yXJWPJDtgnWqVc6hV9","X-Proofpoint-Virus-Version":"vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-28_05,2026-04-28_01,2025-10-01_01","X-Proofpoint-Spam-Details":"rule=outbound_notspam policy=outbound score=0\n priorityscore=1501 spamscore=0 adultscore=0 phishscore=0 clxscore=1015\n suspectscore=0 bulkscore=0 malwarescore=0 impostorscore=0 lowpriorityscore=0\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2604290059"},"content":"Remove SDC_QDSD_PINGROUP, QUP_I3C and UFS_RESET macros as on some\nplatforms they are unused.\n\nNo functional impact.\n\nReviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>\nSigned-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>\n---\nChanges in v2:\n- Rebased on linux next-20260428 tag\n- Link to v1: https://lore.kernel.org/r/20260406-eliza_pinctrl-v1-1-52fbf0ebc56c@oss.qualcomm.com\n---\n drivers/pinctrl/qcom/pinctrl-eliza.c   | 24 ------------------------\n drivers/pinctrl/qcom/pinctrl-qcm2290.c | 23 -----------------------\n drivers/pinctrl/qcom/pinctrl-qdu1000.c |  6 ------\n drivers/pinctrl/qcom/pinctrl-sm4450.c  |  7 -------\n 4 files changed, 60 deletions(-)\n\n\n---\nbase-commit: 9974969c14031a097d6b45bcb7a06bb4aa525c40\nchange-id: 20260405-eliza_pinctrl-382bd31c3eef\n\nBest regards,","diff":"diff --git a/drivers/pinctrl/qcom/pinctrl-eliza.c b/drivers/pinctrl/qcom/pinctrl-eliza.c\nindex c1f756cbcdeba3fac95364f5d7dde2c24de3acbd..c395ca7e6081b752c51a924a3bcfddbfabfdb403 100644\n--- a/drivers/pinctrl/qcom/pinctrl-eliza.c\n+++ b/drivers/pinctrl/qcom/pinctrl-eliza.c\n@@ -54,30 +54,6 @@\n \t\t.intr_detection_width = 2,\t\\\n \t}\n \n-#define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv)\t\\\n-\t{\t\t\t\t\t        \\\n-\t\t.grp = PINCTRL_PINGROUP(#pg_name,\t\\\n-\t\t\tpg_name##_pins,\t\t\t\\\n-\t\t\tARRAY_SIZE(pg_name##_pins)),\t\\\n-\t\t.ctl_reg = ctl,\t\t\t\t\\\n-\t\t.io_reg = 0,\t\t\t\t\\\n-\t\t.intr_cfg_reg = 0,\t\t\t\\\n-\t\t.intr_status_reg = 0,\t\t\t\\\n-\t\t.mux_bit = -1,\t\t\t\t\\\n-\t\t.pull_bit = pull,\t\t\t\\\n-\t\t.drv_bit = drv,\t\t\t\t\\\n-\t\t.oe_bit = -1,\t\t\t\t\\\n-\t\t.in_bit = -1,\t\t\t\t\\\n-\t\t.out_bit = -1,\t\t\t\t\\\n-\t\t.intr_enable_bit = -1,\t\t\t\\\n-\t\t.intr_status_bit = -1,\t\t\t\\\n-\t\t.intr_target_bit = -1,\t\t\t\\\n-\t\t.intr_raw_status_bit = -1,\t\t\\\n-\t\t.intr_polarity_bit = -1,\t\t\\\n-\t\t.intr_detection_bit = -1,\t\t\\\n-\t\t.intr_detection_width = -1,\t\t\\\n-\t}\n-\n #define UFS_RESET(pg_name, ctl, io)\t\t\t\\\n \t{\t\t\t\t\t        \\\n \t\t.grp = PINCTRL_PINGROUP(#pg_name,\t\\\ndiff --git a/drivers/pinctrl/qcom/pinctrl-qcm2290.c b/drivers/pinctrl/qcom/pinctrl-qcm2290.c\nindex 3b28ac4988859238417d0c4f483e718065ccf48f..844d3dc9e72cdc4b77a58ce8c11a0ff85cb8d6fa 100644\n--- a/drivers/pinctrl/qcom/pinctrl-qcm2290.c\n+++ b/drivers/pinctrl/qcom/pinctrl-qcm2290.c\n@@ -75,29 +75,6 @@\n \t\t.intr_detection_width = -1,\t\t\\\n \t}\n \n-#define UFS_RESET(pg_name, offset)\t\t\t\t\\\n-\t{\t\t\t\t\t        \\\n-\t\t.grp = PINCTRL_PINGROUP(#pg_name, \t\\\n-\t\t\tpg_name##_pins, \t\t\\\n-\t\t\tARRAY_SIZE(pg_name##_pins)),\t\\\n-\t\t.ctl_reg = offset,\t\t\t\\\n-\t\t.io_reg = offset + 0x4,\t\t\t\\\n-\t\t.intr_cfg_reg = 0,\t\t\t\\\n-\t\t.intr_status_reg = 0,\t\t\t\\\n-\t\t.mux_bit = -1,\t\t\t\t\\\n-\t\t.pull_bit = 3,\t\t\t\t\\\n-\t\t.drv_bit = 0,\t\t\t\t\\\n-\t\t.oe_bit = -1,\t\t\t\t\\\n-\t\t.in_bit = -1,\t\t\t\t\\\n-\t\t.out_bit = 0,\t\t\t\t\\\n-\t\t.intr_enable_bit = -1,\t\t\t\\\n-\t\t.intr_status_bit = -1,\t\t\t\\\n-\t\t.intr_target_bit = -1,\t\t\t\\\n-\t\t.intr_raw_status_bit = -1,\t\t\\\n-\t\t.intr_polarity_bit = -1,\t\t\\\n-\t\t.intr_detection_bit = -1,\t\t\\\n-\t\t.intr_detection_width = -1,\t\t\\\n-\t}\n static const struct pinctrl_pin_desc qcm2290_pins[] = {\n \tPINCTRL_PIN(0, \"GPIO_0\"),\n \tPINCTRL_PIN(1, \"GPIO_1\"),\ndiff --git a/drivers/pinctrl/qcom/pinctrl-qdu1000.c b/drivers/pinctrl/qcom/pinctrl-qdu1000.c\nindex 5125df7eb12722912ecf0a14d65d6da4f77f9933..77da87aa72aa2b631fdc24def7d651b6c8a8ffff 100644\n--- a/drivers/pinctrl/qcom/pinctrl-qdu1000.c\n+++ b/drivers/pinctrl/qcom/pinctrl-qdu1000.c\n@@ -99,12 +99,6 @@\n \t\t.intr_detection_width = -1,\t\t\\\n \t}\n \n-#define QUP_I3C(qup_mode, qup_offset)\t\t\t\\\n-\t{\t\t\t\t\t\t\\\n-\t\t.mode = qup_mode,\t\t\t\\\n-\t\t.offset = qup_offset,\t\t\t\\\n-\t}\n-\n static const struct pinctrl_pin_desc qdu1000_pins[] = {\n \tPINCTRL_PIN(0, \"GPIO_0\"),\n \tPINCTRL_PIN(1, \"GPIO_1\"),\ndiff --git a/drivers/pinctrl/qcom/pinctrl-sm4450.c b/drivers/pinctrl/qcom/pinctrl-sm4450.c\nindex 83650f173b0132e7f96f6c558868f57f63d7158a..51a66a20dc6635fb74e083c8fb1012491a8cb055 100644\n--- a/drivers/pinctrl/qcom/pinctrl-sm4450.c\n+++ b/drivers/pinctrl/qcom/pinctrl-sm4450.c\n@@ -99,13 +99,6 @@\n \t\t.intr_detection_width = -1,\t\t\\\n \t}\n \n-#define QUP_I3C(qup_mode, qup_offset)\t\t\t\\\n-\t{\t\t\t\t\t\t\\\n-\t\t.mode = qup_mode,\t\t\t\\\n-\t\t.offset = qup_offset,\t\t\t\\\n-\t}\n-\n-\n static const struct pinctrl_pin_desc sm4450_pins[] = {\n \tPINCTRL_PIN(0, \"GPIO_0\"),\n \tPINCTRL_PIN(1, \"GPIO_1\"),\n","prefixes":["v2"]}