{"id":2230026,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2230026/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260429044752.4176397-50-alistair.francis@wdc.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.1/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260429044752.4176397-50-alistair.francis@wdc.com>","date":"2026-04-29T04:47:50","name":"[PULL,49/51] target/riscv: Rename riscv_pm_get_virt_pmm() to riscv_pm_get_vm_ldst_pmm()","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"32b1ace154665389a4883fe6a1bdabb3ee36db27","submitter":{"id":64571,"url":"http://patchwork.ozlabs.org/api/1.1/people/64571/?format=json","name":"Alistair Francis","email":"alistair23@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260429044752.4176397-50-alistair.francis@wdc.com/mbox/","series":[{"id":501983,"url":"http://patchwork.ozlabs.org/api/1.1/series/501983/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501983","date":"2026-04-29T04:47:05","name":"[PULL,01/51] hw/riscv/riscv-iommu: Use standard EN_PRI bit for PRI","version":1,"mbox":"http://patchwork.ozlabs.org/series/501983/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2230026/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2230026/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=RPBR9/2K;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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helo=mail-pl1-x62b.google.com","X-Spam_score_int":"-17","X-Spam_score":"-1.8","X-Spam_bar":"-","X-Spam_report":"(-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"From: Frank Chang \n\nRename riscv_pm_get_virt_pmm() to riscv_pm_get_vm_ldst_pmm() to better\nreflect its actual usage. This function is used when checking the PMM\nfield for virtual-machine load/store instructions (HLV.* and HSV.*),\nrather than for VS/VU modes.\n\nSigned-off-by: Frank Chang \nReviewed-by: Daniel Henrique Barboza \nReviewed-by: Alistair Francis \nMessage-ID: <20260421093715.2995067-6-frank.chang@sifive.com>\nSigned-off-by: Alistair Francis \n---\n target/riscv/cpu.h | 2 +-\n target/riscv/internals.h | 2 +-\n target/riscv/cpu_helper.c | 2 +-\n 3 files changed, 3 insertions(+), 3 deletions(-)","diff":"diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h\nindex 672f0dab0f..138183e017 100644\n--- a/target/riscv/cpu.h\n+++ b/target/riscv/cpu.h\n@@ -890,7 +890,7 @@ bool riscv_cpu_is_32bit(RISCVCPU *cpu);\n \n bool riscv_cpu_virt_mem_enabled(CPURISCVState *env);\n RISCVPmPmm riscv_pm_get_pmm(CPURISCVState *env);\n-RISCVPmPmm riscv_pm_get_virt_pmm(CPURISCVState *env);\n+RISCVPmPmm riscv_pm_get_vm_ldst_pmm(CPURISCVState *env);\n uint32_t riscv_pm_get_pmlen(RISCVPmPmm pmm);\n \n RISCVException riscv_csrr(CPURISCVState *env, int csrno,\ndiff --git a/target/riscv/internals.h b/target/riscv/internals.h\nindex d090db2641..7eb6edbe90 100644\n--- a/target/riscv/internals.h\n+++ b/target/riscv/internals.h\n@@ -209,7 +209,7 @@ static inline target_ulong adjust_addr_body(CPURISCVState *env,\n \n /* get pmm field depending on whether addr is */\n if (is_virt_addr) {\n- pmm = riscv_pm_get_virt_pmm(env);\n+ pmm = riscv_pm_get_vm_ldst_pmm(env);\n } else {\n pmm = riscv_pm_get_pmm(env);\n }\ndiff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c\nindex 2b3fea81d5..ef1ff7cb0b 100644\n--- a/target/riscv/cpu_helper.c\n+++ b/target/riscv/cpu_helper.c\n@@ -214,7 +214,7 @@ RISCVPmPmm riscv_pm_get_pmm(CPURISCVState *env)\n #endif\n }\n \n-RISCVPmPmm riscv_pm_get_virt_pmm(CPURISCVState *env)\n+RISCVPmPmm riscv_pm_get_vm_ldst_pmm(CPURISCVState *env)\n {\n #ifndef CONFIG_USER_ONLY\n int priv_mode;\n","prefixes":["PULL","49/51"]}