{"id":2230013,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2230013/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260429044752.4176397-29-alistair.francis@wdc.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.1/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260429044752.4176397-29-alistair.francis@wdc.com>","date":"2026-04-29T04:47:29","name":"[PULL,28/51] target/riscv: Add the Zvfbfa extension implied rule","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"48d799f533cdfccce78c59dea2771ea0236f2fd0","submitter":{"id":64571,"url":"http://patchwork.ozlabs.org/api/1.1/people/64571/?format=json","name":"Alistair Francis","email":"alistair23@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260429044752.4176397-29-alistair.francis@wdc.com/mbox/","series":[{"id":501983,"url":"http://patchwork.ozlabs.org/api/1.1/series/501983/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501983","date":"2026-04-29T04:47:05","name":"[PULL,01/51] hw/riscv/riscv-iommu: Use standard EN_PRI bit for PRI","version":1,"mbox":"http://patchwork.ozlabs.org/series/501983/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2230013/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2230013/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=Lnj3KHJL;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g54jT55Fpz1xqf\n\tfor ; Wed, 29 Apr 2026 14:54:53 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wHwse-00067I-IH; Wed, 29 Apr 2026 00:50:36 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1wHwsc-00063K-KA\n for qemu-devel@nongnu.org; Wed, 29 Apr 2026 00:50:34 -0400","from mail-pl1-x631.google.com ([2607:f8b0:4864:20::631])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from )\n id 1wHwsb-0000dK-2o\n for qemu-devel@nongnu.org; Wed, 29 Apr 2026 00:50:34 -0400","by mail-pl1-x631.google.com with SMTP id\n d9443c01a7336-2ab077e3f32so53037135ad.3\n for ; Tue, 28 Apr 2026 21:50:32 -0700 (PDT)","from toolbx.alistair23.me ([2403:581e:fdf9:0:6209:4521:6813:45b7])\n by smtp.gmail.com with ESMTPSA id\n d9443c01a7336-2b988772ae8sm7756145ad.7.2026.04.28.21.50.26\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Tue, 28 Apr 2026 21:50:31 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=gmail.com; s=20251104; t=1777438231; x=1778043031; darn=nongnu.org;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:cc:to:from:from:to:cc:subject:date\n :message-id:reply-to;\n bh=EnJkJpchAM7vwOFSUOFAUxKHXhQnmjW3rca5keBbe/Q=;\n b=Lnj3KHJL7ndnF9+vPk1qDUdudOQ8N01Kz4P5oC3NM0jKbcw009Y/yJeim6PiGcsW4u\n hRVRx3QgP0+Zc9TF+nbNjiy03byea1+3GhLurkjUxqA/C8/7kNZt9c10iZbDn0By90pR\n I9Cpnehd3+yamzp5/y5Ee6Nl6hS5UqisnRWOJR5OQD4NB3fG1YMlBjGHNwG/LK3E4XYv\n /0407jMuvsXUxeiL9dr6xkT0yte6e2Vj56vMKry0kc0CVv1tADxjxbnYgLWmy1g0eymS\n X2xSCukeJJdCwrhnoV1DcTdgvQBdWsz5wQasQJqh+pSO+X4/DZjXSPJa+H+wu8nY37av\n RdxQ==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20251104; t=1777438231; x=1778043031;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from\n :to:cc:subject:date:message-id:reply-to;\n bh=EnJkJpchAM7vwOFSUOFAUxKHXhQnmjW3rca5keBbe/Q=;\n b=rFiiv8yLEuS0/QQSfnnCvrf1b+J4nEGgrwpN0+pCFNPF+eKfOpg5cC8uWspv5XC5ZB\n BUAcvcl2ckyCm7CH1Jw3rqbLMzPZqtggiWAvpi61krG2Si0Ys1xsllVxXIGuW06CMg7o\n otvWXTx6QRPqm9DSO2gKYIW/qm0g+P0J/86lhGeO1qnc11OmFIGWaOhLkmWHmobbUdbe\n Dc9EyjcM7JWhj28yvwKc1ZvdeeX2UWTW2yHixb1daL8dUPNwmgaNSdHaYPQ6+3sIq60T\n 5gIMqQvottXVW7ucpvifLwjzSm9vCwtYnZJAUqZGPt09RYKq/Pf1HxvxkOUoCGz+T1mg\n AO9A==","X-Forwarded-Encrypted":"i=1;\n AFNElJ+QeKou5ehgfQuBD3Old3++6W/ZSQQhOnlJXDq2TqmZQNNZbvGiHLEeO4e7D79RTetVwYxn4N+Zg4gf@nongnu.org","X-Gm-Message-State":"AOJu0YwcExYq/uxDWAMbCpmS7zeltIFdMbY2pE2GpefmK6H9iZSB4fM6\n mE6UxIthsRxy7Ex7zK9zHxluJ2jCEh8FD2AxN7IPORE8BNP28rXzE4Mi","X-Gm-Gg":"AeBDiesZRL8t2gZH1vMGhGJGDc3zkRi8srDPbPfJ8FEAA4qziuQK4gtS88Kb+GMiFSs\n 1RXNsQt5YYOK5p0ndMP8kXAOXqpTwDa0XNxe6iVDqVlQE8WVNierF1hf8lD6vZhEnfKUAfgTnbx\n Gil9jSfcDeBlC840Qx5SjDZa5VKi1N+SjqjnHvGuc4IGrcQIo6kMUC9hFxywns7kgNlTHQjnntJ\n XWHrNSGqPj2eNizJmx9cS51El27T05cs6AYZrRN/wjg7SUYSK0b0J0QnTJ5QNFm71pyIp/cUH99\n wAa6cLRAszUJsu41fVMD8iVvL0OwFWQhA0MhTI58rem+aAhQCDDrdqav7pJhcjd9HF/leuINoLz\n YREDIzK6w3C6KKpmq46+W5QoXkAYstYXy+7nCSkP8pbMyHb/kYtaWoWhPDoQ9lZVgmqD+GQB4+q\n fkv+LTlEaI7jhbP8tcnzwPq4lcyjqjxjRfOcegaZHbFodCjlhw3WuY","X-Received":"by 2002:a17:903:2ed0:b0:2ae:cb0e:fd59 with SMTP id\n d9443c01a7336-2b97c4120bdmr60169505ad.8.1777438231583;\n Tue, 28 Apr 2026 21:50:31 -0700 (PDT)","From":"alistair23@gmail.com","X-Google-Original-From":"alistair.francis@wdc.com","To":"palmer@dabbelt.com, liwei1518@gmail.com, daniel.barboza@oss.qualcomm.com,\n zhiwei_liu@linux.alibaba.com, chao.liu.zevorn@gmail.com,\n qemu-riscv@nongnu.org, qemu-devel@nongnu.org","Cc":"alistair23@gmail.com, Max Chou ,\n Daniel Henrique Barboza ,\n Nutty Liu ,\n Alistair Francis ","Subject":"[PULL 28/51] target/riscv: Add the Zvfbfa extension implied rule","Date":"Wed, 29 Apr 2026 14:47:29 +1000","Message-ID":"<20260429044752.4176397-29-alistair.francis@wdc.com>","X-Mailer":"git-send-email 2.53.0","In-Reply-To":"<20260429044752.4176397-1-alistair.francis@wdc.com>","References":"<20260429044752.4176397-1-alistair.francis@wdc.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=2607:f8b0:4864:20::631;\n envelope-from=alistair23@gmail.com; helo=mail-pl1-x631.google.com","X-Spam_score_int":"-17","X-Spam_score":"-1.8","X-Spam_bar":"-","X-Spam_report":"(-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"From: Max Chou \n\nAccording to the Zvfbfa isa spec:\nThe Zvfbfa extension requires the Zve32f and Zfbfmin extensions.\n\nReviewed-by: Daniel Henrique Barboza \nReviewed-by: Nutty Liu \nReviewed-by: Chao Liu \nReviewed-by: Alistair Francis \nSigned-off-by: Max Chou \nMessage-ID: <20260402125234.1371897-3-max.chou@sifive.com>\nSigned-off-by: Alistair Francis \n---\n target/riscv/cpu.c | 13 +++++++++++--\n 1 file changed, 11 insertions(+), 2 deletions(-)","diff":"diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c\nindex 7c652dea78..bbab96385b 100644\n--- a/target/riscv/cpu.c\n+++ b/target/riscv/cpu.c\n@@ -2622,6 +2622,15 @@ static RISCVCPUImpliedExtsRule SSCTR_IMPLIED = {\n },\n };\n \n+static RISCVCPUImpliedExtsRule ZVFBFA_IMPLIED = {\n+ .ext = CPU_CFG_OFFSET(ext_zvfbfa),\n+ .implied_multi_exts = {\n+ CPU_CFG_OFFSET(ext_zve32f), CPU_CFG_OFFSET(ext_zfbfmin),\n+\n+ RISCV_IMPLIED_EXTS_RULE_END\n+ },\n+};\n+\n RISCVCPUImpliedExtsRule *riscv_misa_ext_implied_rules[] = {\n &RVA_IMPLIED, &RVD_IMPLIED, &RVF_IMPLIED,\n &RVM_IMPLIED, &RVV_IMPLIED, NULL\n@@ -2635,8 +2644,8 @@ RISCVCPUImpliedExtsRule *riscv_multi_ext_implied_rules[] = {\n &ZHINX_IMPLIED, &ZHINXMIN_IMPLIED, &ZICNTR_IMPLIED,\n &ZIHPM_IMPLIED, &ZK_IMPLIED, &ZKN_IMPLIED,\n &ZKS_IMPLIED, &ZVBB_IMPLIED, &ZVE32F_IMPLIED,\n- &ZVE32X_IMPLIED, &ZVE64D_IMPLIED, &ZVE64F_IMPLIED,\n- &ZVE64X_IMPLIED, &ZVFBFMIN_IMPLIED, &ZVFBFWMA_IMPLIED,\n+ &ZVE32X_IMPLIED, &ZVE64D_IMPLIED, &ZVE64F_IMPLIED, &ZVE64X_IMPLIED,\n+ &ZVFBFA_IMPLIED, &ZVFBFMIN_IMPLIED, &ZVFBFWMA_IMPLIED,\n &ZVFH_IMPLIED, &ZVFHMIN_IMPLIED, &ZVKN_IMPLIED,\n &ZVKNC_IMPLIED, &ZVKNG_IMPLIED, &ZVKNHB_IMPLIED,\n &ZVKS_IMPLIED, &ZVKSC_IMPLIED, &ZVKSG_IMPLIED, &SSCFG_IMPLIED,\n","prefixes":["PULL","28/51"]}