{"id":2230005,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2230005/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260429044752.4176397-33-alistair.francis@wdc.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.1/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260429044752.4176397-33-alistair.francis@wdc.com>","date":"2026-04-29T04:47:33","name":"[PULL,32/51] target/riscv: Introduce altfmt into DisasContext","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"f8e7355559db64494bcd973a5da1de43500b5665","submitter":{"id":64571,"url":"http://patchwork.ozlabs.org/api/1.1/people/64571/?format=json","name":"Alistair Francis","email":"alistair23@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260429044752.4176397-33-alistair.francis@wdc.com/mbox/","series":[{"id":501983,"url":"http://patchwork.ozlabs.org/api/1.1/series/501983/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501983","date":"2026-04-29T04:47:05","name":"[PULL,01/51] hw/riscv/riscv-iommu: Use standard EN_PRI bit for PRI","version":1,"mbox":"http://patchwork.ozlabs.org/series/501983/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2230005/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2230005/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=qvC4TyuU;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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helo=mail-pl1-x630.google.com","X-Spam_score_int":"-17","X-Spam_score":"-1.8","X-Spam_bar":"-","X-Spam_report":"(-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"From: Max Chou \n\nReviewed-by: Daniel Henrique Barboza \nReviewed-by: Chao Liu \nReviewed-by: Alistair Francis \nSigned-off-by: Max Chou \nMessage-ID: <20260402125234.1371897-7-max.chou@sifive.com>\nSigned-off-by: Alistair Francis \n---\n target/riscv/translate.c | 3 +++\n 1 file changed, 3 insertions(+)","diff":"diff --git a/target/riscv/translate.c b/target/riscv/translate.c\nindex f6b915a7fb..f8ccf34438 100644\n--- a/target/riscv/translate.c\n+++ b/target/riscv/translate.c\n@@ -101,6 +101,7 @@ typedef struct DisasContext {\n bool cfg_vta_all_1s;\n bool vstart_eq_zero;\n bool vl_eq_vlmax;\n+ bool altfmt;\n CPUState *cs;\n TCGv zero;\n /* actual address width */\n@@ -1310,6 +1311,7 @@ static void riscv_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs)\n RISCVCPUClass *mcc = RISCV_CPU_GET_CLASS(cs);\n RISCVCPU *cpu = RISCV_CPU(cs);\n uint32_t tb_flags = ctx->base.tb->flags;\n+ uint64_t ext_tb_flags = ctx->base.tb->cs_base;\n \n ctx->pc_save = ctx->base.pc_first;\n ctx->priv = FIELD_EX32(tb_flags, TB_FLAGS, PRIV);\n@@ -1329,6 +1331,7 @@ static void riscv_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs)\n ctx->cfg_vta_all_1s = cpu->cfg.rvv_ta_all_1s;\n ctx->vstart_eq_zero = FIELD_EX32(tb_flags, TB_FLAGS, VSTART_EQ_ZERO);\n ctx->vl_eq_vlmax = FIELD_EX32(tb_flags, TB_FLAGS, VL_EQ_VLMAX);\n+ ctx->altfmt = FIELD_EX64(ext_tb_flags, EXT_TB_FLAGS, ALTFMT);\n ctx->misa_mxl_max = mcc->def->misa_mxl_max;\n ctx->xl = FIELD_EX32(tb_flags, TB_FLAGS, XL);\n ctx->address_xl = FIELD_EX32(tb_flags, TB_FLAGS, AXL);\n","prefixes":["PULL","32/51"]}