{"id":2229986,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2229986/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/patch/20260429035134.1023330-3-happycpu@gmail.com/","project":{"id":42,"url":"http://patchwork.ozlabs.org/api/1.1/projects/42/?format=json","name":"Linux GPIO development","link_name":"linux-gpio","list_id":"linux-gpio.vger.kernel.org","list_email":"linux-gpio@vger.kernel.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260429035134.1023330-3-happycpu@gmail.com>","date":"2026-04-29T03:51:34","name":"[v2,2/2] gpio: 74x164: support lines-initial-states for boot-time output state","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"280c34ce76260338d38d6d8dd5509d037d1f8226","submitter":{"id":93205,"url":"http://patchwork.ozlabs.org/api/1.1/people/93205/?format=json","name":"정찬홍","email":"happycpu@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-gpio/patch/20260429035134.1023330-3-happycpu@gmail.com/mbox/","series":[{"id":501981,"url":"http://patchwork.ozlabs.org/api/1.1/series/501981/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/list/?series=501981","date":"2026-04-29T03:51:34","name":null,"version":2,"mbox":"http://patchwork.ozlabs.org/series/501981/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2229986/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2229986/checks/","tags":{},"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-gpio@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=Mkcd4255;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c04:e001:36c::12fc:5321; helo=tor.lore.kernel.org;\n envelope-from=linux-gpio+bounces-35746-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com\n header.b=\"Mkcd4255\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=209.85.210.179","smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=gmail.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=gmail.com"],"Received":["from tor.lore.kernel.org (tor.lore.kernel.org\n [IPv6:2600:3c04:e001:36c::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g53Pf2ClSz1yHv\n\tfor ; Wed, 29 Apr 2026 13:56:06 +1000 (AEST)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby tor.lore.kernel.org (Postfix) with ESMTP id 58F3B3086186\n\tfor ; Wed, 29 Apr 2026 03:51:57 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 1315B3112BC;\n\tWed, 29 Apr 2026 03:51:46 +0000 (UTC)","from mail-pf1-f179.google.com (mail-pf1-f179.google.com\n [209.85.210.179])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 0A727388E6B\n\tfor ; Wed, 29 Apr 2026 03:51:42 +0000 (UTC)","by mail-pf1-f179.google.com with SMTP id\n d2e1a72fcca58-82cf636dac8so5209102b3a.3\n for ;\n Tue, 28 Apr 2026 20:51:42 -0700 (PDT)","from happycpu-p1.. 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Today the driver always kicks that first write\nfrom a zero-initialised buffer, so every output comes up low until user\nspace issues a write. Boards that rely on the chain to drive signals\nwhose power-on state matters (active-low indicators, reset lines, etc.)\nhave no way to express the desired initial pattern via DT.\n\nRead the optional lines-initial-states bitmask, recently documented for\nthis binding, into chip->buffer before the first\n__gen_74x164_write_config() so the chain comes up in a known state on\nthe very first SPI transaction. Bit N maps to GPIO line N (matching the\nnxp,pcf8575 convention); on this output-only device, bit=0 drives the\nline low and bit=1 drives it high. Property absence keeps the existing\nzeroing behaviour intact.\n\nSuggested-by: Linus Walleij \nSigned-off-by: Chanhong Jung \n---\n drivers/gpio/gpio-74x164.c | 17 ++++++++++++++++-\n 1 file changed, 16 insertions(+), 1 deletion(-)","diff":"diff --git a/drivers/gpio/gpio-74x164.c b/drivers/gpio/gpio-74x164.c\nindex c226524ef..5ca61cf52 100644\n--- a/drivers/gpio/gpio-74x164.c\n+++ b/drivers/gpio/gpio-74x164.c\n@@ -112,7 +112,7 @@ static int gen_74x164_probe(struct spi_device *spi)\n {\n \tstruct device *dev = &spi->dev;\n \tstruct gen_74x164_chip *chip;\n-\tu32 nregs;\n+\tu32 nregs, init_state;\n \tint ret;\n \n \t/*\n@@ -134,6 +134,21 @@ static int gen_74x164_probe(struct spi_device *spi)\n \n \tchip->registers = nregs;\n \n+\t/*\n+\t * Optionally seed the chain with a board-specified pattern so the\n+\t * outputs come up in a known state on the first SPI write. The\n+\t * property follows the nxp,pcf8575 convention where bit N maps to\n+\t * GPIO line N. On this output-only device, bit=0 drives the line\n+\t * low and bit=1 drives it high. The bitmask covers up to 32 lines;\n+\t * any further outputs come up zeroed by devm_kzalloc().\n+\t */\n+\tif (!device_property_read_u32(dev, \"lines-initial-states\", &init_state)) {\n+\t\tunsigned int i;\n+\n+\t\tfor (i = 0; i < min(nregs, 4U); i++)\n+\t\t\tchip->buffer[nregs - 1 - i] = (init_state >> (i * 8)) & 0xff;\n+\t}\n+\n \tchip->gpiod_oe = devm_gpiod_get_optional(dev, \"enable\", GPIOD_OUT_LOW);\n \tif (IS_ERR(chip->gpiod_oe))\n \t\treturn PTR_ERR(chip->gpiod_oe);\n","prefixes":["v2","2/2"]}