{"id":2229740,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2229740/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/20260428163936.7987968D09@verein.lst.de/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/1.1/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20260428163936.7987968D09@verein.lst.de>","date":"2026-04-28T16:39:36","name":"[v2,6/9] pci: brcmstb: Get and use bridge and rescal reset properties","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"d5da6c3e3f572a4bd47fee681718c439c47be31e","submitter":{"id":2722,"url":"http://patchwork.ozlabs.org/api/1.1/people/2722/?format=json","name":"Torsten Duwe","email":"duwe@lst.de"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/20260428163936.7987968D09@verein.lst.de/mbox/","series":[{"id":501902,"url":"http://patchwork.ozlabs.org/api/1.1/series/501902/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=501902","date":"2026-04-28T16:23:19","name":"ARM: RPi5: Enable PCIe","version":2,"mbox":"http://patchwork.ozlabs.org/series/501902/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2229740/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2229740/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=85.214.62.61; helo=phobos.denx.de;\n envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org)","phobos.denx.de;\n dmarc=fail (p=none dis=none) header.from=lst.de","phobos.denx.de;\n spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de","phobos.denx.de;\n dmarc=fail (p=none dis=none) header.from=lst.de","phobos.denx.de; spf=pass smtp.mailfrom=duwe@lst.de"],"Received":["from phobos.denx.de (phobos.denx.de [85.214.62.61])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g4mVT5K55z1yHv\n\tfor ; Wed, 29 Apr 2026 02:44:17 +1000 (AEST)","from h2850616.stratoserver.net (localhost [IPv6:::1])\n\tby phobos.denx.de (Postfix) with ESMTP id E33338468B;\n\tTue, 28 Apr 2026 18:43:24 +0200 (CEST)","by phobos.denx.de (Postfix, from userid 109)\n id 2414F845D8; Tue, 28 Apr 2026 18:39:40 +0200 (CEST)","from verein.lst.de (verein.lst.de [213.95.11.211])\n (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id 2F86E845E3\n for ; Tue, 28 Apr 2026 18:39:38 +0200 (CEST)","by verein.lst.de (Postfix, from userid 2005)\n id 7987968D09; Tue, 28 Apr 2026 18:39:36 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=-1.9 required=5.0 tests=BAYES_00,\n RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=ham\n autolearn_force=no version=3.4.2","Subject":"[PATCH v2 6/9] pci: brcmstb: Get and use bridge and rescal reset\n properties","To":"Peter Robinson ,\n Matthias Brugger ","Cc":"=?unknown-8bit?q?Tom_Rini_=3Ctrini=40konsulko=2Ecom=3E=2C=22Jan_=C4=8Cer?=\n\t=?unknown-8bit?q?m=C3=A1k=22_=3Csairon=40sairon=2Ecz=3E=2CAndrea_della_Port?=\n\t=?unknown-8bit?q?a_=3Candrea=2Eporta=40suse=2Ecom=3E=2C=22Ivan_T=2E_Ivanov?=\n\t=?unknown-8bit?q?=22_=3Ciivanov=40suse=2Ede=3E=2C_Stanimir_Varbanov_=3Cstan?=\n\t=?unknown-8bit?q?imir=2Evarbanov=40suse=2Ecom=3E=2C_Oleksii_Moisieiev_=3COl?=\n\t=?unknown-8bit?q?eksii=5FMoisieiev=40epam=2Ecom=3E=2C_Volodymyr_Babchuk_=3C?=\n\t=?unknown-8bit?q?volodymyr=5Fbabchuk=40epam=2Ecom=3E=2C_Marek_Vasut_=3Cmare?=\n\t=?unknown-8bit?q?k=2Evasut+renesas=40mailbox=2Eorg=3E=2CPaul_Barker_=3Cpaul?=\n\t=?unknown-8bit?q?=2Ebarker=2Ect=40bp=2Erenesas=2Ecom=3E=2CPatrice_Chotard_?=\n\t=?unknown-8bit?q?=3Cpatrice=2Echotard=40foss=2Est=2Ecom=3E=2CChristian_Mara?=\n\t=?unknown-8bit?q?ngi_=3Cansuelsmth=40gmail=2Ecom=3E=2CPatrick_Delaunay_=3Cp?=\n\t=?unknown-8bit?q?atrick=2Edelaunay=40foss=2Est=2Ecom=3E=2CHuan_Zhou_=3Cme?=\n\t=?unknown-8bit?q?=40per1cycle=2Eorg=3E=2CGabriel_Fernandez_=3Cgabriel=2Efer?=\n\t=?unknown-8bit?q?nandez=40foss=2Est=2Ecom=3E=2CKever_Yang_=3Ckever=2Eyang?=\n\t=?unknown-8bit?q?=40rock-chips=2Ecom=3E=2CJonas_Karlman_=3Cjonas=40kwiboo?=\n\t=?unknown-8bit?q?=2Ese=3E=2CJoseph_Chen_=3Cchenjh=40rock-chips=2Ecom=3E=2CE?=\n\t=?unknown-8bit?q?laine_Zhang_=3Czhangqing=40rock-chips=2Ecom=3E=2C_Pedro_Fa?=\n\t=?unknown-8bit?q?lcato_=3Cpfalcato=40suse=2Ede=3E=2Cu-boot=40lists=2Edenx?=\n\t=?unknown-8bit?q?=2Ede?=","In-Reply-To":"<20260428162319.99B4268B05@verein.lst.de>","Message-Id":"<20260428163936.7987968D09@verein.lst.de>","Date":"Tue, 28 Apr 2026 18:39:36 +0200 (CEST)","From":"duwe@lst.de (Torsten Duwe)","X-Mailman-Approved-At":"Tue, 28 Apr 2026 18:43:21 +0200","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.39","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" ","X-Virus-Scanned":"clamav-milter 0.103.8 at phobos.denx.de","X-Virus-Status":"Clean"},"content":"From: Torsten Duwe \n\nCheck whether the device tree has nodes for the two reset controls and use\nthem if so.\n\nSigned-off-by: Torsten Duwe \nCo-authored-by: Oleksii Moisieiev \nTested-by: Pedro Falcato \n\n---\n drivers/pci/pcie_brcmstb.c | 51 +++++++++++++++++++++++++++++++++++++-\n 1 file changed, 50 insertions(+), 1 deletion(-)","diff":"diff --git a/drivers/pci/pcie_brcmstb.c b/drivers/pci/pcie_brcmstb.c\nindex 261f8790528..1f97cda5cc7 100644\n--- a/drivers/pci/pcie_brcmstb.c\n+++ b/drivers/pci/pcie_brcmstb.c\n@@ -21,6 +21,7 @@\n #include \n #include \n #include \n+#include \n \n /* PCIe parameters */\n #define BRCM_NUM_PCIE_OUT_WINS\t\t\t\t4\n@@ -83,6 +84,8 @@ struct brcm_pcie {\n \n \tint\t\t\tgen;\n \tbool\t\t\tssc;\n+\tstruct reset_ctl\trescal;\n+\tstruct reset_ctl\tbridge_reset;\n \tconst struct brcm_pcie_cfg_data *pcie_cfg;\n };\n \n@@ -147,6 +150,34 @@ static void brcm_pcie_perst_set_2712(struct brcm_pcie *pcie, u32 val)\n \twritel(tmp, pcie->base + PCIE_MISC_PCIE_CTRL);\n }\n \n+static void brcm_pcie_get_resets_dt(struct udevice *dev)\n+{\n+\tstruct brcm_pcie *pcie = dev_get_priv(dev);\n+\tint ret;\n+\n+\tret = reset_get_by_name(dev, \"rescal\", &pcie->rescal);\n+\tif (ret) {\n+\t\tprintf(\"Unable to get rescal reset\\n\");\n+\t\treturn;\n+\t}\n+\n+\tret = reset_get_by_name(dev, \"bridge\", &pcie->bridge_reset);\n+\tif (ret) {\n+\t\tprintf(\"Unable to get bridge reset\\n\");\n+\t\treturn;\n+\t}\n+}\n+\n+static void brcm_pcie_do_reset(struct udevice *dev)\n+{\n+\tstruct brcm_pcie *pcie = dev_get_priv(dev);\n+\tint ret;\n+\n+\tret = reset_deassert(&pcie->rescal);\n+\tif (ret)\n+\t\tprintf(\"failed to deassert 'rescal'\\n\");\n+}\n+\n static void brcm_pcie_bridge_sw_init_set_generic(struct brcm_pcie *pcie, u32 val)\n {\n \tif (val)\n@@ -157,6 +188,14 @@ static void brcm_pcie_bridge_sw_init_set_generic(struct brcm_pcie *pcie, u32 val\n \t\t\t RGR1_SW_INIT_1_INIT_MASK);\n }\n \n+static void brcm_pcie_bridge_sw_init_set_2712(struct brcm_pcie *pcie, u32 val)\n+{\n+\tif (val)\n+\t\treset_assert(&pcie->bridge_reset);\n+\telse\n+\t\treset_deassert(&pcie->bridge_reset);\n+}\n+\n /**\n * brcm_pcie_link_up() - Check whether the PCIe link is up\n * @pcie: Pointer to the PCIe controller state\n@@ -413,6 +452,12 @@ static int brcm_pcie_probe(struct udevice *dev)\n \tu16 nlw, cls, lnksta;\n \tu32 tmp;\n \n+\t/*\n+\t * Ensure rescal reset for BCM2712 is really disabled.\n+\t */\n+\tif (pcie->pcie_cfg->type == BCM2712)\n+\t\tbrcm_pcie_do_reset(dev);\n+\n \t/*\n \t * Reset the bridge, assert the fundamental reset. Note for some SoCs,\n \t * e.g. BCM7278, the fundamental reset should not be asserted here.\n@@ -611,6 +656,10 @@ static int brcm_pcie_of_to_plat(struct udevice *dev)\n \t\tpcie->gen = max_link_speed;\n \n \tpcie->pcie_cfg = (const struct brcm_pcie_cfg_data *)dev_get_driver_data(dev);\n+\n+\tif (pcie->pcie_cfg->type == BCM2712)\n+\t\tbrcm_pcie_get_resets_dt(dev);\n+\n \treturn 0;\n }\n \n@@ -645,7 +694,7 @@ static const struct brcm_pcie_cfg_data bcm2712_cfg = {\n \t.offsets\t= pcie_offsets_bcm2712,\n \t.type\t\t= BCM2712,\n \t.perst_set\t= brcm_pcie_perst_set_2712,\n-\t.bridge_sw_init_set = brcm_pcie_bridge_sw_init_set_generic,\n+\t.bridge_sw_init_set = brcm_pcie_bridge_sw_init_set_2712,\n \t.rc_mode\t= brcm_pcie_rc_mode,\n };\n \n","prefixes":["v2","6/9"]}