{"id":2229505,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2229505/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260428102503.1641162-1-ashish.a6@samsung.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.1/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260428102503.1641162-1-ashish.a6@samsung.com>","date":"2026-04-28T10:25:03","name":"hw/i3c/dw-i3c: Fix incorrect BCR/DCR extraction during ENTDAA","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"8cc4838b9f75c949aa9644472d2f45f070ee1a83","submitter":{"id":92321,"url":"http://patchwork.ozlabs.org/api/1.1/people/92321/?format=json","name":"Ashish Anand","email":"ashish.a6@samsung.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260428102503.1641162-1-ashish.a6@samsung.com/mbox/","series":[{"id":501820,"url":"http://patchwork.ozlabs.org/api/1.1/series/501820/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501820","date":"2026-04-28T10:25:03","name":"hw/i3c/dw-i3c: Fix incorrect BCR/DCR extraction during ENTDAA","version":1,"mbox":"http://patchwork.ozlabs.org/series/501820/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2229505/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2229505/checks/","tags":{},"headers":{"Return-Path":"<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=samsung.com header.i=@samsung.com header.a=rsa-sha256\n header.s=mail20170921 header.b=sKyFRG2T;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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a=rsa-sha256; c=relaxed/relaxed; d=samsung.com;\n s=mail20170921; t=1777372159;\n bh=huQEJryrU0XmT5jl2BmzMNK7M+oZGFikG3TqCT2zfyA=;\n h=From:To:Cc:Subject:Date:References:From;\n b=sKyFRG2T9qhBU+qwbug6YVcgXMUxQSFgk+iwXrKmPzPYrGYtTUXOOGVDdAOnMqv3K\n XowLIHsu8ba4f83hOayZg4tySv8WY43je7T8tXEpC36julTy7mtGeq1xLSgQ2mgTN8\n bLAsnQVP4UQnUaHkjp248fAl+GVe8OXwan6X0e5M=","From":"Ashish Anand <ashish.a6@samsung.com>","To":"qemu-devel@nongnu.org","Cc":"komlodi@google.com, clg@kaod.org, jamin_lin@aspeedtech.com,\n nabihestefan@google.com, saurabh@samsung.com, vishwa.mg@samsung.com,\n y.kaushal@samsung.com, ashish.anand202@gmail.com, Ashish Anand\n <ashish.a6@samsung.com>","Subject":"[PATCH] hw/i3c/dw-i3c: Fix incorrect BCR/DCR extraction during ENTDAA","Date":"Tue, 28 Apr 2026 15:55:03 +0530","Message-ID":"<20260428102503.1641162-1-ashish.a6@samsung.com>","X-Mailer":"git-send-email 2.43.0","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-CMS-MailID":"20260428102910epcas5p3980610701ef7374b681f74d75bc34f29","X-Msg-Generator":"CA","Content-Type":"text/plain; charset=\"utf-8\"","CMS-TYPE":"105P","cpgsPolicy":"CPGSC10-542,Y","X-CFilter-Loop":"Reflected","X-CMS-RootMailID":"20260428102910epcas5p3980610701ef7374b681f74d75bc34f29","References":"\n <CGME20260428102910epcas5p3980610701ef7374b681f74d75bc34f29@epcas5p3.samsung.com>","Received-SPF":"pass client-ip=203.254.224.34;\n envelope-from=ashish.a6@samsung.com; helo=mailout4.samsung.com","X-Spam_score_int":"-43","X-Spam_score":"-4.4","X-Spam_bar":"----","X-Spam_report":"(-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001,\n SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development <qemu-devel.nongnu.org>","List-Unsubscribe":"<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>","List-Archive":"<https://lists.nongnu.org/archive/html/qemu-devel>","List-Post":"<mailto:qemu-devel@nongnu.org>","List-Help":"<mailto:qemu-devel-request@nongnu.org?subject=help>","List-Subscribe":"<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"The target_info union in dw_i3c_addr_assign_cmd() declares pid, bcr,\nand dcr as separate union members, causing them to all alias b[0]\nrather than their correct positions in the ENTDAA response buffer.\nThis results in dw_i3c_update_char_table() being called with BCR and\nDCR both read from b[0] instead of b[6] and b[7] respectively,\ncorrupting the device characteristics table on every ENTDAA operation.\n\nFixed this by replacing the broken members with a nested struct using\nuint8_t fields, matching the I3C spec wire format: six bytes of PID\nfollowed by BCR and DCR.\n\nSigned-off-by: Ashish Anand <ashish.a6@samsung.com>\n---\n\nThe nested struct approach avoids bitfields and __attribute__((packed)),\nboth of which introduce implementation-defined behavior for this layout.\n\nThis bug was discovered during end-to-end ENTDAA testing where BCR and\nDCR values observed in the char table register did not match the target's\nactual BCR and DCR values.\n\nA follow-up patch adding a standalone DW I3C test machine and qtest\ncoverage for ENTDAA, private transfers, and IBI is planned.\n\n hw/i3c/dw-i3c.c | 17 +++++++++++------\n 1 file changed, 11 insertions(+), 6 deletions(-)","diff":"diff --git a/hw/i3c/dw-i3c.c b/hw/i3c/dw-i3c.c\nindex d87d42be89..1c5e09ccbb 100644\n--- a/hw/i3c/dw-i3c.c\n+++ b/hw/i3c/dw-i3c.c\n@@ -1507,9 +1507,11 @@ static void dw_i3c_addr_assign_cmd(DWI3C *s, DWI3CAddrAssignCmd cmd)\n     for (i = 0; i < cmd.dev_count; i++) {\n         uint8_t addr = dw_i3c_target_addr(s, cmd.dev_index + i);\n         union {\n-            uint64_t pid:48;\n-            uint8_t bcr;\n-            uint8_t dcr;\n+            struct {\n+                uint8_t pid[6];\n+                uint8_t bcr;\n+                uint8_t dcr;\n+            };\n             uint32_t w[2];\n             uint8_t b[8];\n         } target_info;\n@@ -1544,9 +1546,12 @@ static void dw_i3c_addr_assign_cmd(DWI3C *s, DWI3CAddrAssignCmd cmd)\n             err = DW_I3C_RESP_QUEUE_ERR_DAA_NACK;\n             break;\n         }\n-        dw_i3c_update_char_table(s, cmd.dev_index + i,\n-                                            target_info.pid, target_info.bcr,\n-                                            target_info.dcr, addr);\n+        uint64_t pid = 0;\n+        for (int j = 0; j < 6; j++) {\n+            pid |= (uint64_t)target_info.pid[j] << (j * 8);\n+        }\n+        dw_i3c_update_char_table(s, cmd.dev_index + i, pid, target_info.bcr,\n+                                 target_info.dcr, addr);\n \n         /* Push the PID, BCR, and DCR to the RX queue. */\n         dw_i3c_push_rx(s, target_info.w[0]);\n","prefixes":[]}