{"id":2229404,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2229404/?format=json","web_url":"http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260428082654.44364-3-larysa.zaremba@intel.com/","project":{"id":46,"url":"http://patchwork.ozlabs.org/api/1.1/projects/46/?format=json","name":"Intel Wired Ethernet development","link_name":"intel-wired-lan","list_id":"intel-wired-lan.osuosl.org","list_email":"intel-wired-lan@osuosl.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260428082654.44364-3-larysa.zaremba@intel.com>","date":"2026-04-28T08:26:36","name":"[iwl-next,v7,02/14] libie: add PCI device initialization helpers to libie","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"b2b615f10d17bbe930d64a291565ddeb5959e8b3","submitter":{"id":84900,"url":"http://patchwork.ozlabs.org/api/1.1/people/84900/?format=json","name":"Larysa Zaremba","email":"larysa.zaremba@intel.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260428082654.44364-3-larysa.zaremba@intel.com/mbox/","series":[{"id":501793,"url":"http://patchwork.ozlabs.org/api/1.1/series/501793/?format=json","web_url":"http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=501793","date":"2026-04-28T08:26:34","name":"Introduce iXD driver","version":7,"mbox":"http://patchwork.ozlabs.org/series/501793/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2229404/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2229404/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","intel-wired-lan@lists.osuosl.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","intel-wired-lan@lists.osuosl.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=osuosl.org header.i=@osuosl.org header.a=rsa-sha256\n header.s=default header.b=ayboWGQ5;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=osuosl.org\n (client-ip=2605:bc80:3010::138; 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a=\"78376853\"","E=Sophos;i=\"6.23,203,1770624000\"; d=\"scan'208\";a=\"78376853\"","E=Sophos;i=\"6.23,203,1770624000\"; d=\"scan'208\";a=\"232881467\""],"X-ExtLoop1":"1","From":"Larysa Zaremba ","To":"intel-wired-lan@lists.osuosl.org, Tony Nguyen ","Cc":"aleksander.lobakin@intel.com, sridhar.samudrala@intel.com,\n Michal Swiatkowski ,\n Larysa Zaremba ,\n \"Fijalkowski, Maciej\" ,\n Emil Tantilov ,\n Madhu Chittim , Josh Hay ,\n \"Keller, Jacob E\" ,\n jayaprakash.shanmugam@intel.com, Jiri Pirko ,\n \"David S. Miller\" ,\n Eric Dumazet , Jakub Kicinski ,\n Paolo Abeni , Simon Horman ,\n Jonathan Corbet ,\n Richard Cochran ,\n Przemek Kitszel ,\n Andrew Lunn , netdev@vger.kernel.org,\n linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,\n Phani R Burra , Bharath R ,\n Samuel Salin ","Date":"Tue, 28 Apr 2026 10:26:36 +0200","Message-ID":"<20260428082654.44364-3-larysa.zaremba@intel.com>","X-Mailer":"git-send-email 2.47.0","In-Reply-To":"<20260428082654.44364-1-larysa.zaremba@intel.com>","References":"<20260428082654.44364-1-larysa.zaremba@intel.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-Mailman-Original-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1777364827; x=1808900827;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=2qax7nco0SWfXRerBGGvC3VwD9pMRUIbeFvXIs1xib8=;\n b=cQ8VH2BRlGHQAiqGtMzgr8dltjEVbdJB5sPEPTkzUkfZ2Gpx5tbjFSUu\n FlUudbqhb6NNtfH/M5z8PaPrzMSEwPqWwGl6nkIVh8LRcu3LgCObbds2o\n JZFj2hOOGbehG4WgMTxCe8oqeSC7mJAzM5iwK2MeqqWk06bQqS8G6nYjW\n 8CU3N0BSJH6+4Is5CaU+84nUmc37hPBOCTYUAdzgum1fEacHmFMUgXEV7\n 6ZkEq7+Oq1GjHENruB4e0gYkim2EAE0AF3CpJxsMcPdMl3O3vg9TbIJXK\n NgMVXOWsYbIYHrZpGNNIUgQSb6Ez+2SMQiSB177/5/VrZGmwNRNyZFuaG\n Q==;","X-Mailman-Original-Authentication-Results":["smtp1.osuosl.org;\n dmarc=pass (p=none dis=none)\n header.from=intel.com","smtp1.osuosl.org;\n dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com\n header.a=rsa-sha256 header.s=Intel header.b=cQ8VH2BR"],"Subject":"[Intel-wired-lan] [PATCH iwl-next v7 02/14] libie: add PCI device\n initialization helpers to libie","X-BeenThere":"intel-wired-lan@osuosl.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Intel Wired Ethernet Linux Kernel Driver Development\n ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"intel-wired-lan-bounces@osuosl.org","Sender":"\"Intel-wired-lan\" "},"content":"From: Phani R Burra \n\nAdd support functions for drivers to configure PCI functionality and access\nMMIO space.\n\nReviewed-by: Maciej Fijalkowski \nSigned-off-by: Phani R Burra \nCo-developed-by: Victor Raj \nSigned-off-by: Victor Raj \nCo-developed-by: Sridhar Samudrala \nSigned-off-by: Sridhar Samudrala \nCo-developed-by: Pavan Kumar Linga \nSigned-off-by: Pavan Kumar Linga \nCo-developed-by: Larysa Zaremba \nSigned-off-by: Larysa Zaremba \nTested-by: Bharath R \nTested-by: Samuel Salin \nSigned-off-by: Tony Nguyen \n---\n drivers/net/ethernet/intel/libie/Kconfig | 6 +\n drivers/net/ethernet/intel/libie/Makefile | 4 +\n drivers/net/ethernet/intel/libie/pci.c | 208 ++++++++++++++++++++++\n include/linux/intel/libie/pci.h | 56 ++++++\n 4 files changed, 274 insertions(+)\n create mode 100644 drivers/net/ethernet/intel/libie/pci.c\n create mode 100644 include/linux/intel/libie/pci.h","diff":"diff --git a/drivers/net/ethernet/intel/libie/Kconfig b/drivers/net/ethernet/intel/libie/Kconfig\nindex 70831c7e336e..500a95c944a8 100644\n--- a/drivers/net/ethernet/intel/libie/Kconfig\n+++ b/drivers/net/ethernet/intel/libie/Kconfig\n@@ -23,3 +23,9 @@ config LIBIE_FWLOG\n \t for it. Firmware logging is using admin queue interface to communicate\n \t with the device. Debugfs is a user interface used to config logging\n \t and dump all collected logs.\n+\n+config LIBIE_PCI\n+\ttristate\n+\thelp\n+\t Helper functions for management of PCI resources belonging\n+\t to networking devices.\ndiff --git a/drivers/net/ethernet/intel/libie/Makefile b/drivers/net/ethernet/intel/libie/Makefile\nindex db57fc6780ea..a28509cb9086 100644\n--- a/drivers/net/ethernet/intel/libie/Makefile\n+++ b/drivers/net/ethernet/intel/libie/Makefile\n@@ -12,3 +12,7 @@ libie_adminq-y\t\t\t:= adminq.o\n obj-$(CONFIG_LIBIE_FWLOG) \t+= libie_fwlog.o\n \n libie_fwlog-y\t\t\t:= fwlog.o\n+\n+obj-$(CONFIG_LIBIE_PCI)\t\t+= libie_pci.o\n+\n+libie_pci-y\t\t\t:= pci.o\ndiff --git a/drivers/net/ethernet/intel/libie/pci.c b/drivers/net/ethernet/intel/libie/pci.c\nnew file mode 100644\nindex 000000000000..7276a3533b54\n--- /dev/null\n+++ b/drivers/net/ethernet/intel/libie/pci.c\n@@ -0,0 +1,208 @@\n+// SPDX-License-Identifier: GPL-2.0-only\n+/* Copyright (C) 2025 Intel Corporation */\n+\n+#include \n+\n+/**\n+ * libie_find_mmio_region - find MMIO region containing a range\n+ * @mmio_list: list that contains MMIO region info\n+ * @offset: range start offset\n+ * @size: range size\n+ * @bar_idx: BAR index containing the range to search\n+ *\n+ * Return: pointer to a MMIO region overlapping with the range in any way or\n+ *\t NULL if no such region is mapped.\n+ */\n+static struct libie_pci_mmio_region *\n+libie_find_mmio_region(const struct list_head *mmio_list,\n+\t\t resource_size_t offset, resource_size_t size,\n+\t\t int bar_idx)\n+{\n+\tresource_size_t end_offset = offset + size;\n+\tstruct libie_pci_mmio_region *mr;\n+\n+\tlist_for_each_entry(mr, mmio_list, list) {\n+\t\tresource_size_t mr_end = mr->offset + mr->size;\n+\t\tresource_size_t mr_start = mr->offset;\n+\n+\t\tif (mr->bar_idx != bar_idx)\n+\t\t\tcontinue;\n+\t\tif (offset < mr_end && end_offset > mr_start)\n+\t\t\treturn mr;\n+\t}\n+\n+\treturn NULL;\n+}\n+\n+/**\n+ * __libie_pci_get_mmio_addr - get the MMIO virtual address\n+ * @mmio_info: contains list of MMIO regions\n+ * @offset: register offset to find\n+ * @num_args: number of additional arguments present\n+ *\n+ * This function finds the virtual address of a register offset by iterating\n+ * through the non-linear MMIO regions that are mapped by the driver.\n+ *\n+ * Return: valid MMIO virtual address or NULL.\n+ */\n+void __iomem *__libie_pci_get_mmio_addr(struct libie_mmio_info *mmio_info,\n+\t\t\t\t\tresource_size_t offset,\n+\t\t\t\t\tint num_args, ...)\n+{\n+\tstruct libie_pci_mmio_region *mr;\n+\tint bar_idx = 0;\n+\tva_list args;\n+\n+\tif (num_args) {\n+\t\tva_start(args, num_args);\n+\t\tbar_idx = va_arg(args, int);\n+\t\tva_end(args);\n+\t}\n+\n+\tlist_for_each_entry(mr, &mmio_info->mmio_list, list)\n+\t\tif (bar_idx == mr->bar_idx && offset >= mr->offset &&\n+\t\t offset < mr->offset + mr->size) {\n+\t\t\toffset -= mr->offset;\n+\n+\t\t\treturn mr->addr + offset;\n+\t\t}\n+\n+\treturn NULL;\n+}\n+EXPORT_SYMBOL_NS_GPL(__libie_pci_get_mmio_addr, \"LIBIE_PCI\");\n+\n+/**\n+ * __libie_pci_map_mmio_region - map PCI device MMIO region\n+ * @mmio_info: struct to store the mapped MMIO region\n+ * @offset: MMIO region start offset\n+ * @size: MMIO region size\n+ * @num_args: number of additional arguments present\n+ *\n+ * Return: true on success, false on memory map failure.\n+ */\n+bool __libie_pci_map_mmio_region(struct libie_mmio_info *mmio_info,\n+\t\t\t\t resource_size_t offset,\n+\t\t\t\t resource_size_t size, int num_args, ...)\n+{\n+\tstruct pci_dev *pdev = mmio_info->pdev;\n+\tstruct libie_pci_mmio_region *mr;\n+\tresource_size_t pa;\n+\tvoid __iomem *va;\n+\tint bar_idx = 0;\n+\tva_list args;\n+\n+\tif (num_args) {\n+\t\tva_start(args, num_args);\n+\t\tbar_idx = va_arg(args, int);\n+\t\tva_end(args);\n+\t}\n+\n+\tif (offset + size > pci_resource_len(pdev, bar_idx))\n+\t\treturn false;\n+\n+\tmr = libie_find_mmio_region(&mmio_info->mmio_list, offset, size,\n+\t\t\t\t bar_idx);\n+\tif (mr) {\n+\t\tpci_warn(pdev,\n+\t\t\t \"Mapping of BAR%u (offset=%llu, size=%llu) intersecting region (offset=%llu, size=%llu) already exists\\n\",\n+\t\t\t bar_idx, (unsigned long long)mr->offset,\n+\t\t\t (unsigned long long)mr->size,\n+\t\t\t (unsigned long long)offset, (unsigned long long)size);\n+\t\treturn mr->offset <= offset &&\n+\t\t mr->offset + mr->size >= offset + size;\n+\t}\n+\n+\tpa = pci_resource_start(pdev, bar_idx) + offset;\n+\tva = ioremap(pa, size);\n+\tif (!va) {\n+\t\tpci_err(pdev, \"Failed to map BAR%u region\\n\", bar_idx);\n+\t\treturn false;\n+\t}\n+\n+\tmr = kvzalloc_obj(*mr);\n+\tif (!mr) {\n+\t\tiounmap(va);\n+\t\treturn false;\n+\t}\n+\n+\tmr->addr = va;\n+\tmr->offset = offset;\n+\tmr->size = size;\n+\tmr->bar_idx = bar_idx;\n+\n+\tlist_add_tail(&mr->list, &mmio_info->mmio_list);\n+\n+\treturn true;\n+}\n+EXPORT_SYMBOL_NS_GPL(__libie_pci_map_mmio_region, \"LIBIE_PCI\");\n+\n+/**\n+ * libie_pci_unmap_fltr_regs - unmap selected PCI device MMIO regions\n+ * @mmio_info: contains list of MMIO regions to unmap\n+ * @fltr: returns true, if region is to be unmapped\n+ */\n+void libie_pci_unmap_fltr_regs(struct libie_mmio_info *mmio_info,\n+\t\t\t bool (*fltr)(struct libie_mmio_info *mmio_info,\n+\t\t\t\t\t struct libie_pci_mmio_region *reg))\n+{\n+\tstruct libie_pci_mmio_region *mr, *tmp;\n+\n+\tlist_for_each_entry_safe(mr, tmp, &mmio_info->mmio_list, list) {\n+\t\tif (!fltr(mmio_info, mr))\n+\t\t\tcontinue;\n+\t\tiounmap(mr->addr);\n+\t\tlist_del(&mr->list);\n+\t\tkvfree(mr);\n+\t}\n+}\n+EXPORT_SYMBOL_NS_GPL(libie_pci_unmap_fltr_regs, \"LIBIE_PCI\");\n+\n+/**\n+ * libie_pci_unmap_all_mmio_regions - unmap all PCI device MMIO regions\n+ * @mmio_info: contains list of MMIO regions to unmap\n+ */\n+void libie_pci_unmap_all_mmio_regions(struct libie_mmio_info *mmio_info)\n+{\n+\tstruct libie_pci_mmio_region *mr, *tmp;\n+\n+\tlist_for_each_entry_safe(mr, tmp, &mmio_info->mmio_list, list) {\n+\t\tiounmap(mr->addr);\n+\t\tlist_del(&mr->list);\n+\t\tkvfree(mr);\n+\t}\n+}\n+EXPORT_SYMBOL_NS_GPL(libie_pci_unmap_all_mmio_regions, \"LIBIE_PCI\");\n+\n+/**\n+ * libie_pci_init_dev - enable and reserve PCI regions of the device\n+ * @pdev: PCI device information\n+ *\n+ * Return: %0 on success, -%errno on failure.\n+ */\n+int libie_pci_init_dev(struct pci_dev *pdev)\n+{\n+\tint err;\n+\n+\terr = pcim_enable_device(pdev);\n+\tif (err)\n+\t\treturn err;\n+\n+\tfor (int bar = 0; bar < PCI_STD_NUM_BARS; bar++)\n+\t\tif (pci_resource_flags(pdev, bar) & IORESOURCE_MEM) {\n+\t\t\terr = pcim_request_region(pdev, bar, pci_name(pdev));\n+\t\t\tif (err)\n+\t\t\t\treturn err;\n+\t\t}\n+\n+\terr = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));\n+\tif (err)\n+\t\treturn err;\n+\n+\tpci_set_master(pdev);\n+\n+\treturn 0;\n+}\n+EXPORT_SYMBOL_NS_GPL(libie_pci_init_dev, \"LIBIE_PCI\");\n+\n+MODULE_DESCRIPTION(\"Common Ethernet PCI library\");\n+MODULE_LICENSE(\"GPL\");\ndiff --git a/include/linux/intel/libie/pci.h b/include/linux/intel/libie/pci.h\nnew file mode 100644\nindex 000000000000..effd072c55c8\n--- /dev/null\n+++ b/include/linux/intel/libie/pci.h\n@@ -0,0 +1,56 @@\n+/* SPDX-License-Identifier: GPL-2.0-only */\n+/* Copyright (C) 2025 Intel Corporation */\n+\n+#ifndef __LIBIE_PCI_H\n+#define __LIBIE_PCI_H\n+\n+#include \n+\n+/**\n+ * struct libie_pci_mmio_region - structure for MMIO region info\n+ * @list: used to add a MMIO region to the list of MMIO regions in\n+ *\t libie_mmio_info\n+ * @addr: virtual address of MMIO region start\n+ * @offset: start offset of the MMIO region\n+ * @size: size of the MMIO region\n+ * @bar_idx: BAR index to which the MMIO region belongs to\n+ */\n+struct libie_pci_mmio_region {\n+\tstruct list_head\tlist;\n+\tvoid __iomem\t\t*addr;\n+\tresource_size_t\t\toffset;\n+\tresource_size_t\t\tsize;\n+\tu16\t\t\tbar_idx;\n+};\n+\n+/**\n+ * struct libie_mmio_info - contains list of MMIO regions\n+ * @pdev: PCI device pointer\n+ * @mmio_list: list of MMIO regions\n+ */\n+struct libie_mmio_info {\n+\tstruct pci_dev\t\t*pdev;\n+\tstruct list_head\tmmio_list;\n+};\n+\n+#define libie_pci_map_mmio_region(mmio_info, offset, size, ...)\t\\\n+\t__libie_pci_map_mmio_region(mmio_info, offset, size,\t\t\\\n+\t\t\t\t COUNT_ARGS(__VA_ARGS__), ##__VA_ARGS__)\n+\n+#define libie_pci_get_mmio_addr(mmio_info, offset, ...)\t\t\\\n+\t__libie_pci_get_mmio_addr(mmio_info, offset,\t\t\t\\\n+\t\t\t\t COUNT_ARGS(__VA_ARGS__), ##__VA_ARGS__)\n+\n+bool __libie_pci_map_mmio_region(struct libie_mmio_info *mmio_info,\n+\t\t\t\t resource_size_t offset, resource_size_t size,\n+\t\t\t\t int num_args, ...);\n+void __iomem *__libie_pci_get_mmio_addr(struct libie_mmio_info *mmio_info,\n+\t\t\t\t\tresource_size_t offset,\n+\t\t\t\t\tint num_args, ...);\n+void libie_pci_unmap_all_mmio_regions(struct libie_mmio_info *mmio_info);\n+void libie_pci_unmap_fltr_regs(struct libie_mmio_info *mmio_info,\n+\t\t\t bool (*fltr)(struct libie_mmio_info *mmio_info,\n+\t\t\t\t\t struct libie_pci_mmio_region *reg));\n+int libie_pci_init_dev(struct pci_dev *pdev);\n+\n+#endif /* __LIBIE_PCI_H */\n","prefixes":["iwl-next","v7","02/14"]}