{"id":2229374,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2229374/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260428-features-v1-1-1841b39da7e6@rsg.ci.i.u-tokyo.ac.jp/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.1/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260428-features-v1-1-1841b39da7e6@rsg.ci.i.u-tokyo.ac.jp>","date":"2026-04-28T08:07:27","name":"target/arm/kvm: Cache host CPU probe failure","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"ca31864d0fef1fd7ace654523b3be143a3f83164","submitter":{"id":90980,"url":"http://patchwork.ozlabs.org/api/1.1/people/90980/?format=json","name":"Akihiko Odaki","email":"odaki@rsg.ci.i.u-tokyo.ac.jp"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260428-features-v1-1-1841b39da7e6@rsg.ci.i.u-tokyo.ac.jp/mbox/","series":[{"id":501784,"url":"http://patchwork.ozlabs.org/api/1.1/series/501784/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501784","date":"2026-04-28T08:07:27","name":"target/arm/kvm: Cache host CPU probe failure","version":1,"mbox":"http://patchwork.ozlabs.org/series/501784/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2229374/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2229374/checks/","tags":{},"headers":{"Return-Path":"<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=fail reason=\"key not found in DNS\" header.d=rsg.ci.i.u-tokyo.ac.jp\n header.i=@rsg.ci.i.u-tokyo.ac.jp header.a=rsa-sha256 header.s=rs20250326\n header.b=Qd8ZIubz;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g4Y3n61RVz1yHX\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 28 Apr 2026 18:08:53 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wHdU4-0004a0-WE; Tue, 28 Apr 2026 04:07:57 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <odaki@rsg.ci.i.u-tokyo.ac.jp>)\n id 1wHdU2-0004Z3-Ca; Tue, 28 Apr 2026 04:07:54 -0400","from www3579.sakura.ne.jp ([49.212.243.89])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <odaki@rsg.ci.i.u-tokyo.ac.jp>)\n id 1wHdTy-0004Mo-W4; Tue, 28 Apr 2026 04:07:53 -0400","from h205.csg.ci.i.u-tokyo.ac.jp (h205.csg.ci.i.u-tokyo.ac.jp\n [133.11.54.205]) (authenticated bits=0)\n by www3579.sakura.ne.jp (8.16.1/8.16.1) with ESMTPSA id 63S87UMu001425\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO);\n Tue, 28 Apr 2026 17:07:40 +0900 (JST)\n (envelope-from odaki@rsg.ci.i.u-tokyo.ac.jp)"],"DKIM-Signature":"a=rsa-sha256; bh=ZsX0U/9xuugcD5yPUItOyYoEt/O08ddTGev4YjQLges=;\n c=relaxed/relaxed; d=rsg.ci.i.u-tokyo.ac.jp;\n h=From:Message-Id:To:Subject:Date;\n s=rs20250326; t=1777363660; v=1;\n b=Qd8ZIubzI5Go3svg+MQDT+IkczHKpm0rpdhXDb84Nyv+yTYXv1ox54SmwrqzCAPC\n 5Pfoxq6Iyv2RzCfVrlMn+qmP/qyYp1Liz5rPdjzcvBiYvJquGyxUfBaHveJgl+t7\n ZQHIXn4sy4w+/UmMkRSUPObvJjyahO0qEyENnlpx6hNt+G0HRxyRYkHAFsaNYuS8\n I6hU2c4AiWBbefZANUN8wRXY1tLzPHNR98Gj9neiGesPlsbz99RtYtxdConl7Lxv\n UxbXR0c6FTgl9vJGDw1/1FkrkmbDrKx0dbtsocbJdry/ALCJEpIFsmXJUCUgwjuX\n ib3DAgupeWTxj7SMwh1blA==","From":"Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp>","Date":"Tue, 28 Apr 2026 17:07:27 +0900","Subject":"[PATCH] target/arm/kvm: Cache host CPU probe failure","MIME-Version":"1.0","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"7bit","Message-Id":"<20260428-features-v1-1-1841b39da7e6@rsg.ci.i.u-tokyo.ac.jp>","X-B4-Tracking":"v=1; b=H4sIAAAAAAAC/yXMQQ5AMBCF4avIrDWpkqZxFbGo6WAskA4iEXdXL\n L/kf+8CocgkUGcXRDpYeJkTijwDHP08kOKQDEYbqyvjVE9+2yOJ8rYM6EOHziKkfI3U8/ldNe1\n v2buJcHv3cN8PThZJNmwAAAA=","X-Change-ID":"20260428-features-a63dcadbc86c","To":"qemu-devel@nongnu.org","Cc":"Peter Maydell <peter.maydell@linaro.org>,\n Paolo Bonzini <pbonzini@redhat.com>, qemu-arm@nongnu.org,\n kvm@vger.kernel.org, Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp>","X-Mailer":"b4 0.16-dev-16047","Received-SPF":"pass client-ip=49.212.243.89;\n envelope-from=odaki@rsg.ci.i.u-tokyo.ac.jp; helo=www3579.sakura.ne.jp","X-Spam_score_int":"-16","X-Spam_score":"-1.7","X-Spam_bar":"-","X-Spam_report":"(-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_INVALID=0.1,\n DKIM_SIGNED=0.1, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=no autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development <qemu-devel.nongnu.org>","List-Unsubscribe":"<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>","List-Archive":"<https://lists.nongnu.org/archive/html/qemu-devel>","List-Post":"<mailto:qemu-devel@nongnu.org>","List-Help":"<mailto:qemu-devel-request@nongnu.org?subject=help>","List-Subscribe":"<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"kvm_arm_set_cpu_features_from_host() does not properly handle host CPU\nprobe failure with caching. The current algorithm can be summarized as\nfollows:\n\n    If dtb_compatible is not cached:\n        If kvm_arm_create_scratch_host_vcpu() fails:\n            Report failure\n\n        Cache dtb_compatible\n\n        If getting register values fails:\n            Report failure\n\n    Report success\n\nThis algorithm has the following problems:\n\n- If kvm_arm_create_scratch_host_vcpu() fails, probing may be repeated.\n- If getting register values fails, later invocations incorrectly report\n  success.\n\nMake two changes to fix them:\n\n- Cache dtb_compatible whenever a probe is attempted.\n- Record probe failure by assigning QEMU_KVM_ARM_TARGET_NONE to\n  arm_host_cpu_features.target.\n\nSuggested-by: Peter Maydell <peter.maydell@linaro.org>\nSigned-off-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp>\n---\nSupersedes: <20260422-arm-v1-1-106a9a9e22dd@rsg.ci.i.u-tokyo.ac.jp>\n---\n target/arm/kvm.c | 38 ++++++++++++++++++++++----------------\n 1 file changed, 22 insertions(+), 16 deletions(-)\n\n\n---\nbase-commit: 98b060da3a4f92b2a994ead5b16a87e783baf77c\nchange-id: 20260428-features-a63dcadbc86c\n\nBest regards,\n--  \nAkihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp>","diff":"diff --git a/target/arm/kvm.c b/target/arm/kvm.c\nindex d4a68874b880..7d194ea112b1 100644\n--- a/target/arm/kvm.c\n+++ b/target/arm/kvm.c\n@@ -273,7 +273,7 @@ static uint32_t kvm_arm_sve_get_vls(int fd)\n     return vls[0] & MAKE_64BIT_MASK(0, ARM_MAX_VQ);\n }\n \n-static bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)\n+static void kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)\n {\n     /* Identify the feature bits corresponding to the host CPU, and\n      * fill out the ARMHostCPUClass fields accordingly. To do this\n@@ -287,6 +287,13 @@ static bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)\n     uint64_t features = 0;\n     int err;\n \n+    ahcf->target = QEMU_KVM_ARM_TARGET_NONE;\n+    ahcf->dtb_compatible = \"arm,armv8\";\n+\n+    if (!kvm_enabled()) {\n+        return;\n+    }\n+\n     /*\n      * target = -1 informs kvm_arm_create_scratch_host_vcpu()\n      * to use the preferred target\n@@ -326,11 +333,9 @@ static bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)\n     }\n \n     if (!kvm_arm_create_scratch_host_vcpu(fdarray, &init)) {\n-        return false;\n+        return;\n     }\n \n-    ahcf->target = init.target;\n-    ahcf->dtb_compatible = \"arm,armv8\";\n     int fd = fdarray[2];\n \n     err = get_host_cpu_reg(fd, ahcf, ID_AA64PFR0_EL1_IDX);\n@@ -454,7 +459,7 @@ static bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)\n     kvm_arm_destroy_scratch_host_vcpu(fdarray);\n \n     if (err < 0) {\n-        return false;\n+        return;\n     }\n \n     /*\n@@ -471,9 +476,8 @@ static bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)\n         features |= 1ULL << ARM_FEATURE_EL2;\n     }\n \n+    ahcf->target = init.target;\n     ahcf->features = features;\n-\n-    return true;\n }\n \n void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu)\n@@ -481,18 +485,20 @@ void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu)\n     CPUARMState *env = &cpu->env;\n \n     if (!arm_host_cpu_features.dtb_compatible) {\n-        if (!kvm_enabled() ||\n-            !kvm_arm_get_host_cpu_features(&arm_host_cpu_features)) {\n-            /* We can't report this error yet, so flag that we need to\n-             * in arm_cpu_realizefn().\n-             */\n-            cpu->kvm_target = QEMU_KVM_ARM_TARGET_NONE;\n-            cpu->host_cpu_probe_failed = true;\n-            return;\n-        }\n+        kvm_arm_get_host_cpu_features(&arm_host_cpu_features);\n     }\n \n     cpu->kvm_target = arm_host_cpu_features.target;\n+\n+    if (cpu->kvm_target == QEMU_KVM_ARM_TARGET_NONE) {\n+        /*\n+         * We can't report this error yet, so flag that we need to\n+         * in arm_cpu_realizefn().\n+         */\n+        cpu->host_cpu_probe_failed = true;\n+        return;\n+    }\n+\n     cpu->dtb_compatible = arm_host_cpu_features.dtb_compatible;\n     cpu->isar = arm_host_cpu_features.isar;\n     cpu->sve_vq.supported = arm_host_cpu_features.sve_vq_supported;\n","prefixes":[]}