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","To":"robh@kernel.org,\n\tkrzk+dt@kernel.org,\n\tconor+dt@kernel.org,\n\tbhelgaas@google.com,\n\tfrank.li@nxp.com,\n\tl.stach@pengutronix.de,\n\tlpieralisi@kernel.org,\n\tkwilczynski@kernel.org,\n\tmani@kernel.org,\n\ts.hauer@pengutronix.de,\n\tkernel@pengutronix.de,\n\tfestevam@gmail.com","Cc":"linux-pci@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tdevicetree@vger.kernel.org,\n\timx@lists.linux.dev,\n\tlinux-kernel@vger.kernel.org,\n\tRichard Zhu ","Subject":"[PATCH v2 2/3] arm64: dts: imx95: Add dma, intr,\n aer and pme interrupters for pcie{0,1}","Date":"Tue, 28 Apr 2026 15:50:29 +0800","Message-Id":"<20260428075030.1626440-3-hongxing.zhu@nxp.com>","X-Mailer":"git-send-email 2.37.1","In-Reply-To":"<20260428075030.1626440-1-hongxing.zhu@nxp.com>","References":"<20260428075030.1626440-1-hongxing.zhu@nxp.com>","Content-Transfer-Encoding":"8bit","Content-Type":"text/plain","X-ClientProxiedBy":"SI1PR02CA0017.apcprd02.prod.outlook.com\n (2603:1096:4:1f4::10) To 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66a8956f-ffb8-4f12-085c-08dea4faae81","X-MS-Exchange-CrossTenant-AuthSource":"AM0PR04MB5220.eurprd04.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Internal","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"28 Apr 2026 07:49:31.2574\n (UTC)","X-MS-Exchange-CrossTenant-FromEntityHeader":"Hosted","X-MS-Exchange-CrossTenant-Id":"686ea1d3-bc2b-4c6f-a92c-d99c5c301635","X-MS-Exchange-CrossTenant-MailboxType":"HOSTED","X-MS-Exchange-CrossTenant-UserPrincipalName":"\n h3MvNVEfBXZMQlc05hAIiQZsMxh79OOaDM/Ofmmg7K38+DgYAtdxgeTrnajD0MArbXeKl1ibtO1ebGvcCQH+vw==","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"AMBPR04MB11720"},"content":"Add dma, intr, aer and pme interrupters for pcie{0,1}.\n\nSigned-off-by: Richard Zhu \n---\n arch/arm64/boot/dts/freescale/imx95.dtsi | 16 ++++++++++++----\n 1 file changed, 12 insertions(+), 4 deletions(-)","diff":"diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi\nindex 71394871d8dd0..6896d9c15bf53 100644\n--- a/arch/arm64/boot/dts/freescale/imx95.dtsi\n+++ b/arch/arm64/boot/dts/freescale/imx95.dtsi\n@@ -1861,8 +1861,12 @@ pcie0: pcie@4c300000 {\n \t\t\tbus-range = <0x00 0xff>;\n \t\t\tnum-lanes = <1>;\n \t\t\tnum-viewport = <8>;\n-\t\t\tinterrupts = ;\n-\t\t\tinterrupt-names = \"msi\";\n+\t\t\tinterrupts = ,\n+\t\t\t\t ,\n+\t\t\t\t ,\n+\t\t\t\t ,\n+\t\t\t\t ;\n+\t\t\tinterrupt-names = \"msi\", \"dma\", \"intr\", \"aer\", \"pme\";\n \t\t\t#interrupt-cells = <1>;\n \t\t\tinterrupt-map-mask = <0 0 0 0x7>;\n \t\t\tinterrupt-map = <0 0 0 1 &gic 0 0 GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,\n@@ -1936,8 +1940,12 @@ pcie1: pcie@4c380000 {\n \t\t\tbus-range = <0x00 0xff>;\n \t\t\tnum-lanes = <1>;\n \t\t\tnum-viewport = <8>;\n-\t\t\tinterrupts = ;\n-\t\t\tinterrupt-names = \"msi\";\n+\t\t\tinterrupts = ,\n+\t\t\t\t ,\n+\t\t\t\t ,\n+\t\t\t\t ,\n+\t\t\t\t ;\n+\t\t\tinterrupt-names = \"msi\", \"dma\", \"intr\", \"aer\", \"pme\";\n \t\t\t#interrupt-cells = <1>;\n \t\t\tinterrupt-map-mask = <0 0 0 0x7>;\n \t\t\tinterrupt-map = <0 0 0 1 &gic 0 0 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,\n","prefixes":["v2","2/3"]}