{"id":2229362,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2229362/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/20260428070017.16807-8-chen.huei.lok@altera.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/1.1/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20260428070017.16807-8-chen.huei.lok@altera.com>","date":"2026-04-28T07:00:16","name":"[v2,7/8] arch: arm: dts: n5x: switch to using upstream Linux DT config","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"5badf79b2be5902b150456d9e7adf76739089aa5","submitter":{"id":92584,"url":"http://patchwork.ozlabs.org/api/1.1/people/92584/?format=json","name":"Chen Huei Lok","email":"chen.huei.lok@altera.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/20260428070017.16807-8-chen.huei.lok@altera.com/mbox/","series":[{"id":501777,"url":"http://patchwork.ozlabs.org/api/1.1/series/501777/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=501777","date":"2026-04-28T07:00:09","name":"socfpga: n5x: Update Boot Support for N5X","version":2,"mbox":"http://patchwork.ozlabs.org/series/501777/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2229362/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2229362/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=altera.com header.i=@altera.com header.a=rsa-sha256\n header.s=selector2 header.b=ArdHZ9TJ;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=85.214.62.61; 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This helps reduce maintenance overhead and aligns U-Boot\nwith the Linux kernel's DTS hierarchy and naming conventions.\n\nThis change improves consistency between U-Boot and Linux by removing\ncustom/legacy DTS handling and instead relying on the standardized\ndefinitions provided by the upstream Linux DTS.\n\nSigned-off-by: Chen Huei Lok \n---\n arch/arm/dts/Makefile | 1 -\n arch/arm/dts/socfpga_n5x-u-boot.dtsi | 17 +++++++++++++++--\n arch/arm/dts/socfpga_n5x_socdk-u-boot.dtsi | 13 ++++++-------\n configs/socfpga_n5x_defconfig | 3 ++-\n 4 files changed, 23 insertions(+), 11 deletions(-)","diff":"diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile\nindex e79cfb4b633..86c6b4f465e 100644\n--- a/arch/arm/dts/Makefile\n+++ b/arch/arm/dts/Makefile\n@@ -460,7 +460,6 @@ dtb-$(CONFIG_ARCH_SOCFPGA) +=\t\t\t\t\\\n \tsocfpga_cyclone5_vining_fpga.dtb\t\t\\\n \tsocfpga_cyclone5_ac501soc.dtb\t\t\t\\\n \tsocfpga_cyclone5_ac550soc.dtb\t\t\t\\\n-\tsocfpga_n5x_socdk.dtb\t\t\t\t\\\n \tsocfpga_stratix10_socdk.dtb\n \n dtb-$(CONFIG_TARGET_DRA7XX_EVM) += dra72-evm.dtb dra7-evm.dtb\t\\\ndiff --git a/arch/arm/dts/socfpga_n5x-u-boot.dtsi b/arch/arm/dts/socfpga_n5x-u-boot.dtsi\nindex dbfd2abfd59..16b92ef48f4 100644\n--- a/arch/arm/dts/socfpga_n5x-u-boot.dtsi\n+++ b/arch/arm/dts/socfpga_n5x-u-boot.dtsi\n@@ -10,7 +10,13 @@\n #include \n \n /{\n-\tmemory {\n+\taliases {\n+\t\tspi0 = &qspi;\n+\t\ti2c0 = &i2c1;\n+\t};\n+\n+\tmemory@0 {\n+\t\tdevice_type = \"memory\";\n \t\t#address-cells = <2>;\n \t\t#size-cells = <2>;\n \t\tbootph-all;\n@@ -121,6 +127,14 @@\n \n &qspi {\n \tbootph-all;\n+\tcompatible = \"cdns,qspi-nor\";\n+\tflash0: flash@0 {\n+\t};\n+};\n+\n+&flash0 {\n+\t#address-cells = <1>;\n+\t#size-cells = <1>;\n };\n \n &rst {\n@@ -200,7 +214,6 @@\n \n &usb0 {\n \tclocks = <&clkmgr N5X_USB_CLK>;\n-\tdisable-over-current;\n \tbootph-all;\n };\n \ndiff --git a/arch/arm/dts/socfpga_n5x_socdk-u-boot.dtsi b/arch/arm/dts/socfpga_n5x_socdk-u-boot.dtsi\nindex 1f7e31bcae3..1bed87c1231 100644\n--- a/arch/arm/dts/socfpga_n5x_socdk-u-boot.dtsi\n+++ b/arch/arm/dts/socfpga_n5x_socdk-u-boot.dtsi\n@@ -8,12 +8,11 @@\n #include \"socfpga_n5x-u-boot.dtsi\"\n \n /{\n-\taliases {\n-\t\tspi0 = &qspi;\n-\t\ti2c0 = &i2c1;\n+\tchosen {\n+\t\tu-boot,spl-boot-order = &mmc;\n \t};\n \n-\tmemory {\n+\tmemory@0 {\n \t\t/*\n \t\t * Memory type: DDR4 (non-interleaving mode)\n \t\t * 16GB\n@@ -38,10 +37,10 @@\n };\n \n &flash0 {\n-\tcompatible = \"jedec,spi-nor\";\n-\tspi-tx-bus-width = <4>;\n-\tspi-rx-bus-width = <4>;\n \tbootph-all;\n+\tcdns,page-size = <256>;\n+\tcdns,block-size = <16>;\n+\t/delete-property/ cdns,read-delay;\n };\n \n &gmac0 {\ndiff --git a/configs/socfpga_n5x_defconfig b/configs/socfpga_n5x_defconfig\nindex 17dc55aa41a..8ad6316bce4 100644\n--- a/configs/socfpga_n5x_defconfig\n+++ b/configs/socfpga_n5x_defconfig\n@@ -10,7 +10,8 @@ CONFIG_SF_DEFAULT_MODE=0x2003\n CONFIG_ENV_SIZE=0x1000\n CONFIG_ENV_OFFSET=0x200\n CONFIG_DM_GPIO=y\n-CONFIG_DEFAULT_DEVICE_TREE=\"socfpga_n5x_socdk\"\n+CONFIG_DEFAULT_DEVICE_TREE=\"intel/socfpga_n5x_socdk\"\n+CONFIG_OF_UPSTREAM=y\n CONFIG_DM_RESET=y\n CONFIG_SPL_STACK=0xffe3f000\n CONFIG_SPL_TEXT_BASE=0xFFE00000\n","prefixes":["v2","7/8"]}