{"id":2229262,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2229262/?format=json","web_url":"http://patchwork.ozlabs.org/project/gcc/patch/20260427225937.5450-1-netanelkomm@gmail.com/","project":{"id":17,"url":"http://patchwork.ozlabs.org/api/1.1/projects/17/?format=json","name":"GNU Compiler Collection","link_name":"gcc","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20260427225937.5450-1-netanelkomm@gmail.com>","date":"2026-04-27T22:59:37","name":"[v2] match.pd: x != CST1 ? x + CST2 : CST3 -> x + CST2 [PR112659, PR122996]","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"16ebc8e238d4fbaf073e28e86f2fb7002fd5d3ee","submitter":{"id":92716,"url":"http://patchwork.ozlabs.org/api/1.1/people/92716/?format=json","name":"Netanel Komm","email":"netanelkomm@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/gcc/patch/20260427225937.5450-1-netanelkomm@gmail.com/mbox/","series":[{"id":501741,"url":"http://patchwork.ozlabs.org/api/1.1/series/501741/?format=json","web_url":"http://patchwork.ozlabs.org/project/gcc/list/?series=501741","date":"2026-04-27T22:59:37","name":"[v2] match.pd: x != CST1 ? x + CST2 : CST3 -> x + CST2 [PR112659, PR122996]","version":2,"mbox":"http://patchwork.ozlabs.org/series/501741/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2229262/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2229262/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","gcc-patches@gcc.gnu.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","gcc-patches@gcc.gnu.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=J148jClA;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=38.145.34.32; helo=vm01.sourceware.org;\n envelope-from=gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org;\n receiver=patchwork.ozlabs.org)","sourceware.org;\n\tdkim=pass (2048-bit key,\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=J148jClA","sourceware.org;\n dmarc=pass (p=none dis=none) header.from=gmail.com","sourceware.org; spf=pass smtp.mailfrom=gmail.com","server2.sourceware.org;\n arc=none smtp.remote-ip=209.85.128.46"],"Received":["from vm01.sourceware.org (vm01.sourceware.org [38.145.34.32])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g4Jwj70xNz1xvV\n\tfor ; Tue, 28 Apr 2026 09:01:56 +1000 (AEST)","from vm01.sourceware.org (localhost [127.0.0.1])\n\tby sourceware.org (Postfix) with ESMTP id 82BDB4BABF01\n\tfor ; Mon, 27 Apr 2026 23:01:54 +0000 (GMT)","from mail-wm1-f46.google.com (mail-wm1-f46.google.com\n [209.85.128.46])\n by sourceware.org (Postfix) with ESMTPS id 9BE964BA23C5\n for ; Mon, 27 Apr 2026 23:01:27 +0000 (GMT)","by mail-wm1-f46.google.com with SMTP id\n 5b1f17b1804b1-488af9fdaa7so63674025e9.1\n for ; Mon, 27 Apr 2026 16:01:27 -0700 (PDT)","from natis-laptop.technion.ac.il (IGLD-84-229-254-181.inter.net.il.\n [84.229.254.181]) by smtp.gmail.com with ESMTPSA id\n 5b1f17b1804b1-48a77aab1b4sm10055335e9.0.2026.04.27.16.01.24\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Mon, 27 Apr 2026 16:01:25 -0700 (PDT)"],"DKIM-Filter":["OpenDKIM Filter v2.11.0 sourceware.org 82BDB4BABF01","OpenDKIM Filter v2.11.0 sourceware.org 9BE964BA23C5"],"DMARC-Filter":"OpenDMARC Filter v1.4.2 sourceware.org 9BE964BA23C5","ARC-Filter":"OpenARC Filter v1.0.0 sourceware.org 9BE964BA23C5","ARC-Seal":"i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1777330887; cv=none;\n b=u7nCYejTdG3iMNbezsicV1RdAxLq/cS8HsAcXV8gBe+iMMtSfpCUMNDb59AAEeV26Zv1kQtG47laRupxK7lAgvhWeuC3rdT1ET/Q+poUQgcSmRnRGJbRFaou9+DcwBbkNYRZAnAzolMwlMImDNv+pbiKt/rxGAJCBvMnU5ew0/k=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=sourceware.org; s=key;\n t=1777330887; c=relaxed/simple;\n bh=fBq8QPIeD1RppkXM4OdnWQh4jFGHWRL1oOCEzL7qkno=;\n h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version;\n b=XP86m0c2SEAdxGz3GPNtCawOR1FkkA7O5lSafuycn/N3foNh9pTyRRvUJXRggrmi/5VZK6T2M2Tukh4trQp62bTL9ak6OTLjXXrvKrdSKqrqwl85p8YcN1OIJFPCN9tWI61XEB51KK1MVMS7sgHN8AqBZY1W2MpSPgqrOgwjWxI=","ARC-Authentication-Results":"i=1; server2.sourceware.org","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=gmail.com; s=20251104; t=1777330886; x=1777935686; darn=gcc.gnu.org;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:cc:to:from:from:to:cc:subject:date\n :message-id:reply-to;\n bh=/EmY4rQnehRKKLCUUFPmed3Y49VGR50189Tfl5asDtg=;\n b=J148jClAYD/9tX7HEw+xSOxe+FqKlVuqf2SgEglaQDGVXk2UxO1gnKmlNJr4skJ6iu\n ZD7Gx5DNm01msPEliHcQUTVbgFih+7OFeOaP8u6+8HF0l+cOJB8wIuXIcb3JhFWGI7QN\n Y7uj67m+JLj0z9d8uqNYrmTxSs8yMS/UtgvPUQwG3pEzIjzupbY0Z1mOsagiC4dCqIvF\n jPUtKnWOWXKV18cNz+QoetXymNCUws4JoaTzfv0FDomydUgF50Dt4Pxn1ODjX72JXwdb\n 2xRMkuz5hMBCKi3cmE9zj952Y4V+zbFolPMFBGhVA7JhboHIZ3wF3r2IOXvFF0oDOEhC\n r4uw==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20251104; t=1777330886; x=1777935686;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from\n :to:cc:subject:date:message-id:reply-to;\n bh=/EmY4rQnehRKKLCUUFPmed3Y49VGR50189Tfl5asDtg=;\n b=I3NUXRfyIhzZqAMHSGfF/VCbKxaIbRto60eCoIpRv8+FAqdO5ICvWWArXrxLH5yCRR\n 6yr1rkPeyCmJ26bAPpYd2MspkwbS47sYG2gxC4CgpTyeK47PZGhuWl30j/qKXvKGH432\n J958geZlUo2c27dYwJOzXHNeYQZAveoz3holzsOzRPD96+l5A2iUQPBAju1913r7Vnhh\n zoTV9sKTqtXTQs257VOdo7T+dmDatmJqc6e+oYn58cmLvhVVy2id9bBO70Ns6otBVNHd\n ON7WwyK11Toq6I8x5UcbRC+eqwSYceqZyVFBNEyMIjSvhmo1bI6lNI8HhvF+zUprHQeG\n RPCg==","X-Gm-Message-State":"AOJu0YyW4yaWBue+oLzCvlC4HSa0j8pHPKocto88KwNtYBR1ASE/EUH5\n 8ZDKsVNes9fCODZ1L2GqJWqm0tfGbNlSJYu02xPOPj+D56+Wj2N89qIR7/Tb2tG6","X-Gm-Gg":"AeBDiesOMHyiuSFoI+ECBbYMa+YoBqX1vjutn4+x6/w65rHDo33XPKoBO28K7J1b6sG\n qyY/XsyclFmjfj27fUCQAiDy0y8DgXBPsaeG6GBOGvBDMVSnltyUncl92e/A5Sh65/Dc6bf/28H\n D9LHeYL4fVR5UzP5gVWFauTIlr9Po/gCMWq8iTTr3vWEKkoBwL71Tkgmi5PLFjQJObHRXjxUT1x\n d6WFy8paXWUpmrnpBzoIYzWzDI3i+IWPMith7uVWrZ+sn/9s4+baYMt7ZCUcu8UB96I+bRqPJ+W\n IxfY7neMFkK2dq3IanRLQPDv2SU58avrbcvoMZyiGgswkJ9BdxNxLHOBLkqf7JnlmprJiljfFWF\n zjvdQWIwj53mozlpZsrCPIWMavt6uFMK8W1uXwTYJonaepQLqHyd+rGTZkb0TWLntflqv4mmFaB\n QConvmJxFfBHFSVELJuvGu4AIOK6XhCh1Gd08GxPAd8sQPBExMkww83VmctpFXFVAFNYdVB2UoX\n JZWbqmawje5ER+sYQk=","X-Received":"by 2002:a05:600c:6304:b0:488:c40b:c8bf with SMTP id\n 5b1f17b1804b1-48a77addb16mr8676275e9.2.1777330885618;\n Mon, 27 Apr 2026 16:01:25 -0700 (PDT)","From":"Netanel Komm ","To":"gcc-patches@gcc.gnu.org","Cc":"andrew.pinski@oss.qualcomm.com,\n\tNetanel Komm ","Subject":"[PATCH v2] match.pd: x != CST1 ? x + CST2 : CST3 -> x + CST2\n [PR112659, PR122996]","Date":"Tue, 28 Apr 2026 01:59:37 +0300","Message-Id":"<20260427225937.5450-1-netanelkomm@gmail.com>","X-Mailer":"git-send-email 2.34.1","In-Reply-To":"\n ","References":"\n ","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-BeenThere":"gcc-patches@gcc.gnu.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Gcc-patches mailing list ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org"},"content":"This patch extends the conditional addition simplification introduced\nin PR 122996 to handle a third constant and uniform vectors. This also\nresolves the missing vector addition fold noted in PR 112659.\n\nIt simplifies x != CST1 ? x + CST2 : CST3 into x + CST2 when\nCST1 + CST2 == CST3.\n\nBootstrapped and regression tested on x86_64-pc-linux-gnu.\n\n\tPR tree-optimization/112659\n\tPR tree-optimization/122996\n\ngcc/ChangeLog:\n\n\t* match.pd: Extend conditional addition pattern to handle\n\ta third constant and uniform vectors.\n\ngcc/testsuite/ChangeLog:\n\n\t* g++.dg/tree-ssa/cond-add-vec-1.C: New test (positive cases).\n\t* g++.dg/tree-ssa/cond-add-vec-2.C: New test (negative cases).\n\t* gcc.dg/tree-ssa/cond-add-1.c: New test (positive cases).\n\t* gcc.dg/tree-ssa/cond-add-2.c: New test (negative cases).\n---\nChanges in v2:\n - Checked for a vector conditional expression in forwprop1 instead of optimized\n to avoid architecture specific differences caused by the vector lowering pass.\n - Split the test files into positive and negative files.\n - Added another negative test case for the scalar version.\n\n gcc/match.pd | 19 +++++++---\n .../g++.dg/tree-ssa/cond-add-vec-1.C | 36 +++++++++++++++++++\n .../g++.dg/tree-ssa/cond-add-vec-2.C | 20 +++++++++++\n gcc/testsuite/gcc.dg/tree-ssa/cond-add-1.c | 24 +++++++++++++\n gcc/testsuite/gcc.dg/tree-ssa/cond-add-2.c | 11 ++++++\n 5 files changed, 105 insertions(+), 5 deletions(-)\n create mode 100644 gcc/testsuite/g++.dg/tree-ssa/cond-add-vec-1.C\n create mode 100644 gcc/testsuite/g++.dg/tree-ssa/cond-add-vec-2.C\n create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/cond-add-1.c\n create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/cond-add-2.c","diff":"diff --git a/gcc/match.pd b/gcc/match.pd\nindex cb3a558a07d..8cdb6ddcba3 100644\n--- a/gcc/match.pd\n+++ b/gcc/match.pd\n@@ -5251,11 +5251,20 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)\n \t&& expr_no_side_effects_p (@1))\n @2)))\n \n-/* x != CST1 ? x + CST2 : 0 -> x + CST2 when CST1 == -CST2. */\n-(simplify\n- (cond (ne @0 INTEGER_CST@2) (plus@1 @0 INTEGER_CST@3) integer_zerop)\n- (if (wi::to_wide (@2) == -wi::to_wide (@3))\n- @1))\n+/* x != CST1 ? x + CST2 : CST3 -> x + CST2 when CST1 + CST2 == CST3.\n+ * This handles both scalars and uniform vectors. */\n+(for cnd (cond vec_cond)\n+ (simplify\n+ (cnd (ne @0 uniform_integer_cst_p@1)\n+ (plus@2 @0 uniform_integer_cst_p@3)\n+ uniform_integer_cst_p@4)\n+ (with {\n+ tree cst1 = uniform_integer_cst_p (@1);\n+ tree cst2 = uniform_integer_cst_p (@3);\n+ tree cst3 = uniform_integer_cst_p (@4);\n+ }\n+ (if (wi::to_wide (cst1) + wi::to_wide (cst2) == wi::to_wide (cst3))\n+ @2))))\n \n /* Simplifications of shift and rotates. */\n \ndiff --git a/gcc/testsuite/g++.dg/tree-ssa/cond-add-vec-1.C b/gcc/testsuite/g++.dg/tree-ssa/cond-add-vec-1.C\nnew file mode 100644\nindex 00000000000..3faed2a91bb\n--- /dev/null\n+++ b/gcc/testsuite/g++.dg/tree-ssa/cond-add-vec-1.C\n@@ -0,0 +1,36 @@\n+/* { dg-do compile } */\n+/* { dg-options \"-O2 -fdump-tree-forwprop1\" } */\n+\n+#define vector4 __attribute__((vector_size(4*sizeof(int))))\n+#define vector4_u8 __attribute__((vector_size(4*sizeof(unsigned char))))\n+#define vector4_u32 __attribute__((vector_size(4*sizeof(unsigned int))))\n+#define vector2_u64 __attribute__((vector_size(2*sizeof(unsigned long))))\n+\n+void unopt(vector4 int *v) {\n+ vector4 int t = *v;\n+ vector4 int t1 = t + 8;\n+ *v = (t != -8) ? (t1) : (vector4 int){0, 0, 0, 0};\n+}\n+\n+vector2_u64 unsigned long f1 (vector2_u64 unsigned long x) { \n+ return x != (vector2_u64 unsigned long){5, 5}\n+\t ? x + (vector2_u64 unsigned long){10, 10}\n+\t : (vector2_u64 unsigned long){15, 15}; \n+}\n+\n+vector4_u32 unsigned int f2 (vector4_u32 unsigned int x)\n+{ \n+ return x != (vector4_u32 unsigned int){20, 20, 20, 20}\n+\t ? x - (vector4_u32 unsigned int){5, 5, 5, 5}\n+\t : (vector4_u32 unsigned int){15, 15, 15, 15}; \n+}\n+\n+vector4_u8 unsigned char\n+f3 (vector4_u8 unsigned char x)\n+{\n+ return x != (vector4_u8 unsigned char){100, 100, 100, 100}\n+\t ? x + (vector4_u8 unsigned char){166, 166, 166, 166}\n+\t : (vector4_u8 unsigned char){10, 10, 10, 10};\n+}\n+\n+/* { dg-final { scan-tree-dump-not \"VEC_COND_EXPR\" \"forwprop1\" } } */\ndiff --git a/gcc/testsuite/g++.dg/tree-ssa/cond-add-vec-2.C b/gcc/testsuite/g++.dg/tree-ssa/cond-add-vec-2.C\nnew file mode 100644\nindex 00000000000..5da12183327\n--- /dev/null\n+++ b/gcc/testsuite/g++.dg/tree-ssa/cond-add-vec-2.C\n@@ -0,0 +1,20 @@\n+/* { dg-do compile } */\n+/* { dg-options \"-O2 -fdump-tree-forwprop1\" } */\n+\n+#define vector4 __attribute__((vector_size(4*sizeof(int))))\n+#define vector2_u64 __attribute__((vector_size(2*sizeof(unsigned long))))\n+\n+vector4 int g1 (vector4 int x) {\n+ vector4 int cst1 = {5, 1};\n+ vector4 int cst2 = {10, 2};\n+ vector4 int cst3 = {15, 3};\n+ return x != cst1 ? x + cst2 : cst3;\n+}\n+\n+vector2_u64 unsigned long g2 (vector2_u64 unsigned long x) { \n+ return x != (vector2_u64 unsigned long){10, 10}\n+\t ? x + (vector2_u64 unsigned long){20, 20}\n+\t : (vector2_u64 unsigned long){40, 40}; \n+}\n+\n+/* { dg-final { scan-tree-dump-times \"VEC_COND_EXPR\" 2 \"forwprop1\" } } */\ndiff --git a/gcc/testsuite/gcc.dg/tree-ssa/cond-add-1.c b/gcc/testsuite/gcc.dg/tree-ssa/cond-add-1.c\nnew file mode 100644\nindex 00000000000..e4e4fc8db3e\n--- /dev/null\n+++ b/gcc/testsuite/gcc.dg/tree-ssa/cond-add-1.c\n@@ -0,0 +1,24 @@\n+/* { dg-do compile } */\n+/* { dg-options \"-O2 -fdump-tree-optimized\" } */\n+\n+typedef unsigned char u8;\n+typedef unsigned short u16;\n+typedef unsigned int u32;\n+typedef unsigned long u64;\n+\n+u64 f1 (u64 x) { return x != 5 ? x + 10 : 15; }\n+\n+u32 f2 (u32 x) { return x != 20 ? x - 5 : 15; }\n+\n+u16 f3 (u16 x) { return x == 100 ? 150 : x + 50; }\n+\n+u8 f4 (u8 x) { return x != 250 ? x + 2 : 252; }\n+\n+u8 f5 (u8 x) {\n+ if (x == 100)\n+ return 10;\n+ else\n+ return x + 166;\n+}\n+\n+/* { dg-final { scan-tree-dump-not \"if \" \"optimized\" } } */\ndiff --git a/gcc/testsuite/gcc.dg/tree-ssa/cond-add-2.c b/gcc/testsuite/gcc.dg/tree-ssa/cond-add-2.c\nnew file mode 100644\nindex 00000000000..c855ec36556\n--- /dev/null\n+++ b/gcc/testsuite/gcc.dg/tree-ssa/cond-add-2.c\n@@ -0,0 +1,11 @@\n+/* { dg-do compile } */\n+/* { dg-options \"-O2 -fdump-tree-optimized\" } */\n+\n+typedef unsigned int u32;\n+typedef unsigned long u64;\n+\n+u64 g1 (u64 x) { return x != 10 ? x + 20 : 40; }\n+\n+u32 g2 (u32 x) { return x == 100 ? 10 : x + 166; }\n+\n+/* { dg-final { scan-tree-dump-times \"if \" 2 \"optimized\" } } */\n","prefixes":["v2"]}