{"id":2229244,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2229244/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pwm/patch/20260427221155.2144848-20-dakr@kernel.org/","project":{"id":38,"url":"http://patchwork.ozlabs.org/api/1.1/projects/38/?format=json","name":"Linux PWM development","link_name":"linux-pwm","list_id":"linux-pwm.vger.kernel.org","list_email":"linux-pwm@vger.kernel.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260427221155.2144848-20-dakr@kernel.org>","date":"2026-04-27T22:11:17","name":"[19/24] rust: io: make IoMem and ExclusiveIoMem lifetime-parameterized","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"d737589480636de1ca19ea9404719f97d6d998eb","submitter":{"id":89037,"url":"http://patchwork.ozlabs.org/api/1.1/people/89037/?format=json","name":"Danilo Krummrich","email":"dakr@kernel.org"},"delegate":{"id":161009,"url":"http://patchwork.ozlabs.org/api/1.1/users/161009/?format=json","username":"mwilczynski","first_name":"Michał","last_name":"Wilczyński","email":"michalw628@gmail.com"},"mbox":"http://patchwork.ozlabs.org/project/linux-pwm/patch/20260427221155.2144848-20-dakr@kernel.org/mbox/","series":[{"id":501734,"url":"http://patchwork.ozlabs.org/api/1.1/series/501734/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pwm/list/?series=501734","date":"2026-04-27T22:10:58","name":"rust: device: Higher-Ranked Lifetime Types for device drivers","version":1,"mbox":"http://patchwork.ozlabs.org/series/501734/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2229244/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2229244/checks/","tags":{},"headers":{"Return-Path":"\n <linux-pwm+bounces-8722-incoming=patchwork.ozlabs.org@vger.kernel.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pwm@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=eFgnlEm3;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; 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a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1777328048; cv=none;\n b=vCDDvjPViWIEKdq5GVsC2jIyC8xWlBqFyPTmde1BPtI68ZJ05EgBzv9+IFa2sW12t9vbMWhJCE++MYH6d0lvbSBAhWgz02KzGGxjjySNLIbGC3Y1+W6vmFn+hv4Y4oXv31ivTERgRCD4yz7EMUU9ukLdc4XxoU9dxFRbZv2l/RI=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1777328048; c=relaxed/simple;\n\tbh=oDLfz4P+cSYONbkhLgBov+ZXz5OHB6gJXhSmiwV6qCg=;\n\th=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:\n\t MIME-Version;\n b=dSIdecJFv1OjWKLQhWESYOuZjdn1AkulYK+7ScCAJqXoeHDZfRB9DcFYN9/p9gT4Ik/7ObR3H7EoWoP07tSN/lAC6zZJOTxRdYvptLBHXfDT9KOWuodKy/EJnpoT4FgXKsrnMrMANqxjqINOSa1nDGvyhzFXH3nH4wQIsCT3Z5k=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=eFgnlEm3; arc=none smtp.client-ip=10.30.226.201","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n\ts=k20201202; t=1777328048;\n\tbh=oDLfz4P+cSYONbkhLgBov+ZXz5OHB6gJXhSmiwV6qCg=;\n\th=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n\tb=eFgnlEm3pXg0eh312U6fN2BXIxcUv+3BK/HvTQvxBpeyfFlsq75qrE28AMPb8sRuX\n\t Pr/Pv7dZIaEWsENJXnWAQnkU4n7ynPxpeQR+yLTS53RX4kCRHqFas5WyBPtqJkjx01\n\t ILKaNS0fdNS2mbtISXFmHUpph7D09Y+odVxPqvq1uC6jEIkPNUhtS3qyUFBznuTxsO\n\t TzuLthDfWjJn3ivkrCJdamlvkw4E9gP9C/MKAlgAaCOj780p6ArfelGybOkd21gj8/\n\t UHT+FQqvmH3wBafkn1BDQcrc6EmlUdxxYMyFb/KJXr1GSfQAntxNoTJ8US+pNWifBH\n\t u/viU9eFZOmoA==","From":"Danilo Krummrich <dakr@kernel.org>","To":"gregkh@linuxfoundation.org,\n\trafael@kernel.org,\n\tacourbot@nvidia.com,\n\taliceryhl@google.com,\n\tdavid.m.ertman@intel.com,\n\tira.weiny@intel.com,\n\tleon@kernel.org,\n\tviresh.kumar@linaro.org,\n\tm.wilczynski@samsung.com,\n\tukleinek@kernel.org,\n\tbhelgaas@google.com,\n\tkwilczynski@kernel.org,\n\tabdiel.janulgue@gmail.com,\n\trobin.murphy@arm.com,\n\tmarkus.probst@posteo.de,\n\tojeda@kernel.org,\n\tboqun@kernel.org,\n\tgary@garyguo.net,\n\tbjorn3_gh@protonmail.com,\n\tlossin@kernel.org,\n\ta.hindborg@kernel.org,\n\ttmgross@umich.edu","Cc":"driver-core@lists.linux.dev,\n\tlinux-kernel@vger.kernel.org,\n\tnova-gpu@lists.linux.dev,\n\tdri-devel@lists.freedesktop.org,\n\tlinux-pm@vger.kernel.org,\n\tlinux-pwm@vger.kernel.org,\n\tlinux-pci@vger.kernel.org,\n\trust-for-linux@vger.kernel.org,\n\tDanilo Krummrich <dakr@kernel.org>","Subject":"[PATCH 19/24] rust: io: make IoMem and ExclusiveIoMem\n lifetime-parameterized","Date":"Tue, 28 Apr 2026 00:11:17 +0200","Message-ID":"<20260427221155.2144848-20-dakr@kernel.org>","X-Mailer":"git-send-email 2.54.0","In-Reply-To":"<20260427221155.2144848-1-dakr@kernel.org>","References":"<20260427221155.2144848-1-dakr@kernel.org>","Precedence":"bulk","X-Mailing-List":"linux-pwm@vger.kernel.org","List-Id":"<linux-pwm.vger.kernel.org>","List-Subscribe":"<mailto:linux-pwm+subscribe@vger.kernel.org>","List-Unsubscribe":"<mailto:linux-pwm+unsubscribe@vger.kernel.org>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit"},"content":"Add a lifetime parameter to IoMem<'a, SIZE> and ExclusiveIoMem<'a,\nSIZE>, storing a &'a Device<Bound> reference to tie the mapping to the\ndevice's lifetime.\n\nThis mirrors the pci::Bar<'a, SIZE> design and enables drivers to hold\nI/O memory mappings directly in their HRT private data, tied to the\ndevice lifetime.\n\nIoRequest::iomap_* methods now return the mapping directly instead of\nwrapping it in Devres. Callers that need device-managed revocation can\ncall the new into_devres() method.\n\nSigned-off-by: Danilo Krummrich <dakr@kernel.org>\n---\n drivers/gpu/drm/tyr/driver.rs |   4 +-\n drivers/pwm/pwm_th1520.rs     |   4 +-\n rust/kernel/io/mem.rs         | 102 +++++++++++++++++-----------------\n 3 files changed, 55 insertions(+), 55 deletions(-)","diff":"diff --git a/drivers/gpu/drm/tyr/driver.rs b/drivers/gpu/drm/tyr/driver.rs\nindex 7cc47ec76863..eaa84efdfdf7 100644\n--- a/drivers/gpu/drm/tyr/driver.rs\n+++ b/drivers/gpu/drm/tyr/driver.rs\n@@ -37,7 +37,7 @@\n     regs, //\n };\n \n-pub(crate) type IoMem = kernel::io::mem::IoMem<SZ_2M>;\n+pub(crate) type IoMem = kernel::io::mem::IoMem<'static, SZ_2M>;\n \n pub(crate) struct TyrDrmDriver;\n \n@@ -109,7 +109,7 @@ fn probe(\n         let sram_regulator = Regulator::<regulator::Enabled>::get(pdev.as_ref(), c\"sram\")?;\n \n         let request = pdev.io_request_by_index(0).ok_or(ENODEV)?;\n-        let iomem = Arc::pin_init(request.iomap_sized::<SZ_2M>(), GFP_KERNEL)?;\n+        let iomem = Arc::new(request.iomap_sized::<SZ_2M>()?.into_devres()?, GFP_KERNEL)?;\n \n         issue_soft_reset(pdev.as_ref(), &iomem)?;\n         gpu::l2_power_on(pdev.as_ref(), &iomem)?;\ndiff --git a/drivers/pwm/pwm_th1520.rs b/drivers/pwm/pwm_th1520.rs\nindex 7139f3f4373d..a45fe359c371 100644\n--- a/drivers/pwm/pwm_th1520.rs\n+++ b/drivers/pwm/pwm_th1520.rs\n@@ -92,7 +92,7 @@ struct Th1520WfHw {\n #[pin_data(PinnedDrop)]\n struct Th1520PwmDriverData {\n     #[pin]\n-    iomem: devres::Devres<IoMem<TH1520_PWM_REG_SIZE>>,\n+    iomem: devres::Devres<IoMem<'static, TH1520_PWM_REG_SIZE>>,\n     clk: Clk,\n }\n \n@@ -351,7 +351,7 @@ fn probe(\n             dev,\n             TH1520_MAX_PWM_NUM,\n             try_pin_init!(Th1520PwmDriverData {\n-                iomem <- request.iomap_sized::<TH1520_PWM_REG_SIZE>(),\n+                iomem <- request.iomap_sized::<TH1520_PWM_REG_SIZE>()?.into_devres(),\n                 clk <- clk,\n             }),\n         )?;\ndiff --git a/rust/kernel/io/mem.rs b/rust/kernel/io/mem.rs\nindex a483e59054e8..12b773bc994d 100644\n--- a/rust/kernel/io/mem.rs\n+++ b/rust/kernel/io/mem.rs\n@@ -73,22 +73,19 @@ pub(crate) unsafe fn new(device: &'a Device<Bound>, resource: &'a Resource) -> S\n     ///       //\n     ///       // No runtime checks will apply when reading and writing.\n     ///       let request = pdev.io_request_by_index(0).ok_or(ENODEV)?;\n-    ///       let iomem = request.iomap_sized::<42>();\n-    ///       let iomem = KBox::pin_init(iomem, GFP_KERNEL)?;\n-    ///\n-    ///       let io = iomem.access(pdev.as_ref())?;\n+    ///       let iomem = request.iomap_sized::<42>()?;\n     ///\n     ///       // Read and write a 32-bit value at `offset`.\n-    ///       let data = io.read32(offset);\n+    ///       let data = iomem.read32(offset);\n     ///\n-    ///       io.write32(data, offset);\n+    ///       iomem.write32(data, offset);\n     ///\n     ///       # Ok(SampleDriver)\n     ///     }\n     /// }\n     /// ```\n-    pub fn iomap_sized<const SIZE: usize>(self) -> impl PinInit<Devres<IoMem<SIZE>>, Error> + 'a {\n-        IoMem::new(self)\n+    pub fn iomap_sized<const SIZE: usize>(self) -> Result<IoMem<'a, SIZE>> {\n+        IoMem::ioremap(self.device, self.resource)\n     }\n \n     /// Same as [`Self::iomap_sized`] but with exclusive access to the\n@@ -97,10 +94,8 @@ pub fn iomap_sized<const SIZE: usize>(self) -> impl PinInit<Devres<IoMem<SIZE>>,\n     /// This uses the [`ioremap()`] C API.\n     ///\n     /// [`ioremap()`]: https://docs.kernel.org/driver-api/device-io.html#getting-access-to-the-device\n-    pub fn iomap_exclusive_sized<const SIZE: usize>(\n-        self,\n-    ) -> impl PinInit<Devres<ExclusiveIoMem<SIZE>>, Error> + 'a {\n-        ExclusiveIoMem::new(self)\n+    pub fn iomap_exclusive_sized<const SIZE: usize>(self) -> Result<ExclusiveIoMem<'a, SIZE>> {\n+        ExclusiveIoMem::ioremap(self.device, self.resource)\n     }\n \n     /// Maps an [`IoRequest`] where the size is not known at compile time,\n@@ -138,27 +133,24 @@ pub fn iomap_exclusive_sized<const SIZE: usize>(\n     ///       // family of functions should be used, leading to runtime checks on every\n     ///       // access.\n     ///       let request = pdev.io_request_by_index(0).ok_or(ENODEV)?;\n-    ///       let iomem = request.iomap();\n-    ///       let iomem = KBox::pin_init(iomem, GFP_KERNEL)?;\n-    ///\n-    ///       let io = iomem.access(pdev.as_ref())?;\n+    ///       let iomem = request.iomap()?;\n     ///\n-    ///       let data = io.try_read32(offset)?;\n+    ///       let data = iomem.try_read32(offset)?;\n     ///\n-    ///       io.try_write32(data, offset)?;\n+    ///       iomem.try_write32(data, offset)?;\n     ///\n     ///       # Ok(SampleDriver)\n     ///     }\n     /// }\n     /// ```\n-    pub fn iomap(self) -> impl PinInit<Devres<IoMem<0>>, Error> + 'a {\n-        Self::iomap_sized::<0>(self)\n+    pub fn iomap(self) -> Result<IoMem<'a>> {\n+        self.iomap_sized::<0>()\n     }\n \n     /// Same as [`Self::iomap`] but with exclusive access to the underlying\n     /// region.\n-    pub fn iomap_exclusive(self) -> impl PinInit<Devres<ExclusiveIoMem<0>>, Error> + 'a {\n-        Self::iomap_exclusive_sized::<0>(self)\n+    pub fn iomap_exclusive(self) -> Result<ExclusiveIoMem<'a, 0>> {\n+        self.iomap_exclusive_sized::<0>()\n     }\n }\n \n@@ -167,9 +159,9 @@ pub fn iomap_exclusive(self) -> impl PinInit<Devres<ExclusiveIoMem<0>>, Error> +\n /// # Invariants\n ///\n /// - [`ExclusiveIoMem`] has exclusive access to the underlying [`IoMem`].\n-pub struct ExclusiveIoMem<const SIZE: usize> {\n+pub struct ExclusiveIoMem<'a, const SIZE: usize> {\n     /// The underlying `IoMem` instance.\n-    iomem: IoMem<SIZE>,\n+    iomem: IoMem<'a, SIZE>,\n \n     /// The region abstraction. This represents exclusive access to the\n     /// range represented by the underlying `iomem`.\n@@ -178,9 +170,9 @@ pub struct ExclusiveIoMem<const SIZE: usize> {\n     _region: Region,\n }\n \n-impl<const SIZE: usize> ExclusiveIoMem<SIZE> {\n+impl<'a, const SIZE: usize> ExclusiveIoMem<'a, SIZE> {\n     /// Creates a new `ExclusiveIoMem` instance.\n-    fn ioremap(resource: &Resource) -> Result<Self> {\n+    fn ioremap(dev: &'a Device<Bound>, resource: &Resource) -> Result<Self> {\n         let start = resource.start();\n         let size = resource.size();\n         let name = resource.name().unwrap_or_default();\n@@ -194,26 +186,29 @@ fn ioremap(resource: &Resource) -> Result<Self> {\n             )\n             .ok_or(EBUSY)?;\n \n-        let iomem = IoMem::ioremap(resource)?;\n+        let iomem = IoMem::ioremap(dev, resource)?;\n \n-        let iomem = ExclusiveIoMem {\n+        Ok(ExclusiveIoMem {\n             iomem,\n             _region: region,\n-        };\n-\n-        Ok(iomem)\n+        })\n     }\n \n-    /// Creates a new `ExclusiveIoMem` instance from a previously acquired [`IoRequest`].\n-    pub fn new<'a>(io_request: IoRequest<'a>) -> impl PinInit<Devres<Self>, Error> + 'a {\n-        let dev = io_request.device;\n-        let res = io_request.resource;\n-\n-        Devres::new(dev, Self::ioremap(res))\n+    /// Consume the `ExclusiveIoMem` and register it as a device-managed resource.\n+    ///\n+    /// The returned `Devres<ExclusiveIoMem<'static, SIZE>>` can outlive the original lifetime\n+    /// `'a`. Access to the I/O memory is revoked when the device is unbound.\n+    pub fn into_devres(self) -> Result<Devres<ExclusiveIoMem<'static, SIZE>>> {\n+        // SAFETY: Casting to `'static` is sound because `Devres` guarantees the\n+        // `ExclusiveIoMem` does not actually outlive the device -- access is revoked and the\n+        // resource is released when the device is unbound.\n+        let iomem: ExclusiveIoMem<'static, SIZE> = unsafe { core::mem::transmute(self) };\n+        let dev = iomem.iomem.dev;\n+        Devres::new(dev, iomem)\n     }\n }\n \n-impl<const SIZE: usize> Deref for ExclusiveIoMem<SIZE> {\n+impl<const SIZE: usize> Deref for ExclusiveIoMem<'_, SIZE> {\n     type Target = Mmio<SIZE>;\n \n     fn deref(&self) -> &Self::Target {\n@@ -230,12 +225,13 @@ fn deref(&self) -> &Self::Target {\n ///\n /// [`IoMem`] always holds an [`MmioRaw`] instance that holds a valid pointer to the\n /// start of the I/O memory mapped region.\n-pub struct IoMem<const SIZE: usize = 0> {\n+pub struct IoMem<'a, const SIZE: usize = 0> {\n+    dev: &'a Device<Bound>,\n     io: MmioRaw<SIZE>,\n }\n \n-impl<const SIZE: usize> IoMem<SIZE> {\n-    fn ioremap(resource: &Resource) -> Result<Self> {\n+impl<'a, const SIZE: usize> IoMem<'a, SIZE> {\n+    fn ioremap(dev: &'a Device<Bound>, resource: &Resource) -> Result<Self> {\n         // Note: Some ioremap() implementations use types that depend on the CPU\n         // word width rather than the bus address width.\n         //\n@@ -267,28 +263,32 @@ fn ioremap(resource: &Resource) -> Result<Self> {\n         }\n \n         let io = MmioRaw::new(addr as usize, size)?;\n-        let io = IoMem { io };\n \n-        Ok(io)\n+        Ok(IoMem { dev, io })\n     }\n \n-    /// Creates a new `IoMem` instance from a previously acquired [`IoRequest`].\n-    pub fn new<'a>(io_request: IoRequest<'a>) -> impl PinInit<Devres<Self>, Error> + 'a {\n-        let dev = io_request.device;\n-        let res = io_request.resource;\n-\n-        Devres::new(dev, Self::ioremap(res))\n+    /// Consume the `IoMem` and register it as a device-managed resource.\n+    ///\n+    /// The returned `Devres<IoMem<'static, SIZE>>` can outlive the original lifetime `'a`. Access\n+    /// to the I/O memory is revoked when the device is unbound.\n+    pub fn into_devres(self) -> Result<Devres<IoMem<'static, SIZE>>> {\n+        // SAFETY: Casting to `'static` is sound because `Devres` guarantees the `IoMem` does not\n+        // actually outlive the device -- access is revoked and the resource is released when the\n+        // device is unbound.\n+        let iomem: IoMem<'static, SIZE> = unsafe { core::mem::transmute(self) };\n+        let dev = iomem.dev;\n+        Devres::new(dev, iomem)\n     }\n }\n \n-impl<const SIZE: usize> Drop for IoMem<SIZE> {\n+impl<const SIZE: usize> Drop for IoMem<'_, SIZE> {\n     fn drop(&mut self) {\n         // SAFETY: Safe as by the invariant of `Io`.\n         unsafe { bindings::iounmap(self.io.addr() as *mut c_void) }\n     }\n }\n \n-impl<const SIZE: usize> Deref for IoMem<SIZE> {\n+impl<const SIZE: usize> Deref for IoMem<'_, SIZE> {\n     type Target = Mmio<SIZE>;\n \n     fn deref(&self) -> &Self::Target {\n","prefixes":["19/24"]}