{"id":2229155,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2229155/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260427181235.3003865-5-mhonap@nvidia.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.1/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260427181235.3003865-5-mhonap@nvidia.com>","date":"2026-04-27T18:12:30","name":"[RFC,4/9] hw/vfio/region: Add vfio_region_setup_with_ops() for custom region ops","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"086752a7c364575f09cb7ee278b94e7392310559","submitter":{"id":92895,"url":"http://patchwork.ozlabs.org/api/1.1/people/92895/?format=json","name":"Manish Honap","email":"mhonap@nvidia.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260427181235.3003865-5-mhonap@nvidia.com/mbox/","series":[{"id":501717,"url":"http://patchwork.ozlabs.org/api/1.1/series/501717/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501717","date":"2026-04-27T18:12:35","name":"QEMU: CXL Type-2 device passthrough via vfio-pci","version":1,"mbox":"http://patchwork.ozlabs.org/series/501717/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2229155/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2229155/checks/","tags":{},"headers":{"Return-Path":"<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=Nvidia.com header.i=@Nvidia.com header.a=rsa-sha256\n header.s=selector2 header.b=dBOoLSkx;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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helo=mail.nvidia.com; pr=C","permerror client-ip=2a01:111:f403:c100::f;\n envelope-from=mhonap@nvidia.com;\n helo=BL2PR02CU003.outbound.protection.outlook.com"],"From":"<mhonap@nvidia.com>","To":"<alwilliamson@nvidia.com>, <skolothumtho@nvidia.com>, <ankita@nvidia.com>,\n <mst@redhat.com>, <imammedo@redhat.com>, <anisinha@redhat.com>,\n <eric.auger@redhat.com>, <peter.maydell@linaro.org>,\n <shannon.zhaosl@gmail.com>, <jonathan.cameron@huawei.com>,\n <fan.ni@samsung.com>, <pbonzini@redhat.com>, <richard.henderson@linaro.org>,\n <marcel.apfelbaum@gmail.com>, <clg@redhat.com>, <cohuck@redhat.com>,\n <dan.j.williams@intel.com>, <dave.jiang@intel.com>,\n <alejandro.lucero-palau@amd.com>","CC":"<vsethi@nvidia.com>, <cjia@nvidia.com>, <targupta@nvidia.com>,\n <zhiw@nvidia.com>, <kjaju@nvidia.com>, <linux-cxl@vger.kernel.org>,\n <kvm@vger.kernel.org>, <qemu-devel@nongnu.org>, <qemu-arm@nongnu.org>,\n \"Manish Honap\" <mhonap@nvidia.com>","Subject":"[RFC 4/9] hw/vfio/region: Add vfio_region_setup_with_ops() for custom\n region ops","Date":"Mon, 27 Apr 2026 23:42:30 +0530","Message-ID":"<20260427181235.3003865-5-mhonap@nvidia.com>","X-Mailer":"git-send-email 2.25.1","In-Reply-To":"<20260427181235.3003865-1-mhonap@nvidia.com>","References":"<20260427181235.3003865-1-mhonap@nvidia.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","Content-Type":"text/plain","X-Originating-IP":"[10.126.230.37]","X-ClientProxiedBy":"rnnvmail202.nvidia.com (10.129.68.7) To\n rnnvmail201.nvidia.com (10.129.68.8)","X-EOPAttributedMessage":"0","X-MS-PublicTrafficType":"Email","X-MS-TrafficTypeDiagnostic":"DS1PEPF00017094:EE_|SJ0PR12MB6830:EE_","X-MS-Office365-Filtering-Correlation-Id":"9a0d3ccc-18c9-4912-2190-08dea488c86e","X-MS-Exchange-SenderADCheck":"1","X-MS-Exchange-AntiSpam-Relay":"0","X-Microsoft-Antispam":"BCL:0;\n ARA:13230040|1800799024|82310400026|376014|7416014|36860700016|921020|22082099003|18002099003|56012099003;","X-Microsoft-Antispam-Message-Info":"\n cAJQrGJzX6lTWkW3ZPpfnSFb2dZ2dc20cfZ6hxH4uqZ5+OyGsvaGfuOWomARGaQYBA6A2AXOqey1c/RCULqGaHEY60iTjLy2UZUYlfLnF+JpiH2IAL6o7Gr69rtc97uUuv45J9K3CjHL35ezY9fJ7RA+orOPTGmqtZmZjYMM34hOvB/aqnpOk4UZuMYs8PNjHCY4C8HyJhK9A82czBCURhVKPABqFMNIGEgnILVEABQUa5wYP2UXdQ4Xky/vdimdo3fYbXeWOqKT+CCbxJbdKvUKmTYarCMXYWTG1MSngtMW5L6fqEkenh3MUiTO0FrMdLAjfITz1hFRg95WFhHgAO2vJrMr0N+x0e/ACLNWMCCpuz/yBZeCi4GffN9nzfGRpnFXplZ1GGWcUP0jX7+4SkA+UHGZJuHTtNYo1mtw7k96gMacItJod9sOOyCB1xuJEtA1CNrtRLRBhs0jAZEPFltlMFh5tCpjAVm/hkq893HomGFFcGBIOEKvMyhkmFZujKuk5PBhtYku/uzIL/R6qK//33zG5mojSO48ydo/n7iLglJVzQngGXbCp5T4Qxnd5LCMCq0dwqUrZkz4OCjlCejnvsgJjSWz0+8wT2JoHBqmHL5MIgEXbRx6cFqFwgGA9nDDApinBK9Z1+lT/i/+wz2KnNfZ/wFBNXEAoM19mfWcvQGph1Mb7wg5jZ7SdCpJ1n87I6+mdqwMhywfMoDLY4dqARMoygroQRap3ClpXTS4TspMJMX8AKe8Zc6NBhDCskFmyoJ+OwZj6CfZwchywrd7rwxruuglgg/a8t4vXpgTHWUVtNUf3lsYsB+77IFl","X-Forefront-Antispam-Report":"CIP:216.228.117.160; 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Ip=[216.228.117.160];\n Helo=[mail.nvidia.com]","X-MS-Exchange-CrossTenant-AuthSource":"\n DS1PEPF00017094.namprd03.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Anonymous","X-MS-Exchange-CrossTenant-FromEntityHeader":"HybridOnPrem","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"SJ0PR12MB6830","X-Spam_score_int":"-10","X-Spam_score":"-1.1","X-Spam_bar":"-","X-Spam_report":"(-1.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n FORGED_SPF_HELO=1, SPF_HELO_PASS=-0.001,\n SPF_NONE=0.001 autolearn=no autolearn_force=no","X-Spam_action":"no action","X-Mailman-Approved-At":"Mon, 27 Apr 2026 15:57:41 -0400","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development <qemu-devel.nongnu.org>","List-Unsubscribe":"<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>","List-Archive":"<https://lists.nongnu.org/archive/html/qemu-devel>","List-Post":"<mailto:qemu-devel@nongnu.org>","List-Help":"<mailto:qemu-devel-request@nongnu.org?subject=help>","List-Subscribe":"<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"From: Manish Honap <mhonap@nvidia.com>\n\nvfio_region_setup() always initializes the region MemoryRegion with\nvfio_region_ops. CXL needs custom pread/pwrite ops for the Component\nRegister shadow region.\n\nAdd vfio_region_setup_with_ops() which accepts a const MemoryRegionOps *\nparameter. When non-NULL it is passed to memory_region_init_io(); when\nNULL the existing vfio_region_ops is used. vfio_region_setup() is\nretained unchanged as a thin wrapper for all existing callers.\n\nSigned-off-by: Zhi Wang <zhiw@nvidia.com>\nSigned-off-by: Manish Honap <mhonap@nvidia.com>\n---\n hw/vfio/region.c      | 15 ++++++++++++---\n hw/vfio/vfio-region.h |  3 +++\n 2 files changed, 15 insertions(+), 3 deletions(-)","diff":"diff --git a/hw/vfio/region.c b/hw/vfio/region.c\nindex 0342ca712a..9bbe758d6f 100644\n--- a/hw/vfio/region.c\n+++ b/hw/vfio/region.c\n@@ -228,8 +228,9 @@ static int vfio_setup_region_sparse_mmaps(VFIORegion *region,\n     return 0;\n }\n \n-int vfio_region_setup(Object *obj, VFIODevice *vbasedev, VFIORegion *region,\n-                      int index, const char *name, Error **errp)\n+int vfio_region_setup_with_ops(Object *obj, VFIODevice *vbasedev,\n+                               VFIORegion *region, int index, const char *name,\n+                               Error **errp, const MemoryRegionOps *ops)\n {\n     struct vfio_region_info *info = NULL;\n     int ret;\n@@ -249,7 +250,8 @@ int vfio_region_setup(Object *obj, VFIODevice *vbasedev, VFIORegion *region,\n \n     if (region->size) {\n         region->mem = g_new0(MemoryRegion, 1);\n-        memory_region_init_io(region->mem, obj, &vfio_region_ops,\n+        memory_region_init_io(region->mem, obj,\n+                              ops ? ops : &vfio_region_ops,\n                               region, name, region->size);\n \n         if (!vbasedev->no_mmap &&\n@@ -273,6 +275,13 @@ int vfio_region_setup(Object *obj, VFIODevice *vbasedev, VFIORegion *region,\n     return 0;\n }\n \n+int vfio_region_setup(Object *obj, VFIODevice *vbasedev, VFIORegion *region,\n+                      int index, const char *name, Error **errp)\n+{\n+    return vfio_region_setup_with_ops(obj, vbasedev, region, index,\n+                                      name, errp, NULL);\n+}\n+\n static void vfio_subregion_unmap(VFIORegion *region, int index)\n {\n     trace_vfio_region_unmap(memory_region_name(&region->mmaps[index].mem),\ndiff --git a/hw/vfio/vfio-region.h b/hw/vfio/vfio-region.h\nindex 9b21d4ee5b..84abbec1ec 100644\n--- a/hw/vfio/vfio-region.h\n+++ b/hw/vfio/vfio-region.h\n@@ -39,6 +39,9 @@ uint64_t vfio_region_read(void *opaque,\n                           hwaddr addr, unsigned size);\n int vfio_region_setup(Object *obj, VFIODevice *vbasedev, VFIORegion *region,\n                       int index, const char *name, Error **errp);\n+int vfio_region_setup_with_ops(Object *obj, VFIODevice *vbasedev,\n+                               VFIORegion *region, int index, const char *name,\n+                               Error **errp, const MemoryRegionOps *ops);\n int vfio_region_mmap(VFIORegion *region);\n void vfio_region_mmaps_set_enabled(VFIORegion *region, bool enabled);\n void vfio_region_unmap(VFIORegion *region);\n","prefixes":["RFC","4/9"]}